Bring MoxieLite core up to current spec
Rename 32-bit immediate load state symbols from 'imm' to 'imm32'
Add sign-extension instructions to MoxieLite core
Implement BRK instruction (software breakpoints)
Fix endianness problem
First sign of life on Altera based DE2 board
Fix big-endian unaligned loads
Allocate more space for on-chip firmware
Fix MoxieLite wait for bus acks
Add new async psram controller
Working timer tick interrupt! Firmware stopwatch application.
First interrupt serviced
Wire up timer and interrupt controller
Add external cellular RAM
Add SWI instruction support.
Add ssr and gsr instructions.
Start of GDB Target Engine
C program working on Marin SoC
Working Marin SoC
Wishbone MoxieLite wrapper almost there
Wishbone moxielite for marin SoC
marin SOC with MoxieLite core