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branch: master

Sep 23, 2012

  1. Anthony Green

    Update microcode generator

    authored September 23, 2012
  2. Anthony Green

    Handle multiple simultaneous register writes

    authored September 23, 2012

Sep 21, 2012

  1. Anthony Green

    Some core fixes from LBNL

    authored September 20, 2012

Sep 20, 2012

  1. Anthony Green

    Parameterize wishbone data bus width.

    authored September 20, 2012

Sep 14, 2012

  1. Anthony Green

    Update GCC and SRC. Bi-endian toolchain.

    authored September 14, 2012

Sep 08, 2012

  1. Anthony Green

    GCC to latest HEAD. Includes moxie prologue optimization.

    authored September 07, 2012

Aug 14, 2012

  1. Anthony Green

    Pull in fix for forked processes.

    authored August 14, 2012

Jun 30, 2012

  1. Anthony Green

    Fix typo

    authored June 29, 2012

Jun 29, 2012

  1. Anthony Green

    Clean up forwarding logic

    authored June 29, 2012
  2. Anthony Green

    Add pipeline forwarding logic and registerfile debug wires

    authored June 29, 2012
  3. Anthony Green

    Pipeline fixes

    authored June 29, 2012

Jun 23, 2012

  1. Anthony Green

    Define and use microcoded pipeline control signals

    authored June 23, 2012

Jun 19, 2012

  1. Anthony Green

    First use of microcode. Get register write enable from microcode.

    authored June 18, 2012
  2. Anthony Green

    Generate verilog friendly microcode output.

    authored June 18, 2012
  3. Anthony Green

    Add microcode description file and microcode generator script

    authored June 18, 2012

Jun 12, 2012

  1. Anthony Green

    Ignore more build artifacts

    authored June 12, 2012
  2. Anthony Green

    Add multi-port register file

    authored June 11, 2012

Jun 02, 2012

  1. Anthony Green

    Revert dcpu hack

    authored June 02, 2012
  2. remove merge conflict

    authored June 02, 2012
  3. remove merge conflict

    authored June 02, 2012

Apr 26, 2012

  1. Anthony Green

    Update to latest GCC head

    authored April 26, 2012

Feb 08, 2012

  1. Anthony Green

    Pipeline carries PC. JSR almost working.

    authored February 08, 2012

Feb 03, 2012

  1. Anthony Green

    Merge branch 'master' of github.com:/atgreen/moxiedev

    Conflicts:
    	scripts/kernel-trace-dump.lisp
    authored February 03, 2012
  2. Anthony Green

    Kernel instruction trace analyzer

    authored February 03, 2012
  3. Anthony Green

    Kernel instruction trace analyzer

    authored February 03, 2012
  4. Anthony Green

    Update copyright date

    authored February 03, 2012

Feb 01, 2012

  1. Anthony Green

    Upgrade uClibc

    authored February 01, 2012

Jan 25, 2012

  1. Anthony Green

    Update GCC

    authored January 25, 2012

Dec 07, 2011

  1. Anthony Green

    Upgrade dtc

    authored December 07, 2011

Nov 23, 2011

  1. Anthony Green

    Update newlib/libgloss

    authored November 23, 2011
  2. Anthony Green

    Update GCC

    authored November 23, 2011

Oct 14, 2011

  1. Anthony Green

    Pass PC through instruction fetcher.

    authored October 13, 2011

Oct 12, 2011

  1. Anthony Green

    Add uart bits.

    authored October 12, 2011
  2. Anthony Green

    Add state machine to execute stage for multi-operation instructions. …

    …Stall fetch/decode while processing multi-op instructions.
    authored October 12, 2011

Oct 11, 2011

  1. Anthony Green

    Implement push instruction

    authored October 11, 2011
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