Multiplication instructions generated for target that does not support them #124
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Here's a reproduction declare {i8, i1 } @llvm.umul.with.overflow.i8(i8, i8)
define {i8, i1} @test(i8 %a) {
%1 = call addrspace(1) { i8, i1 } @llvm.umul.with.overflow.i8(i8 %a, i8 13)
ret {i8, i1} %1
}Compile with ./bin/llc -march=avr -mcpu=attiny85 test.ll -o - Outputs
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I think I've seen a |
bogner
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…ave hardware MUL This change modifies the LLVM ISel lowering settings so that 8-bit/16-bit multiplication is expanded to calls into the compiler runtime library if the MCU being targeted does not support multiplication in hardware. Before this, MUL instructions would be generated on CPUs like the ATtiny85, triggering a CPU reset due to an illegal instruction at runtime. First raised in avr-rust/rust-legacy-fork#124. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351523 91177308-0d34-0410-b5e6-96231b3b80d8
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…ave hardware MUL This change modifies the LLVM ISel lowering settings so that 8-bit/16-bit multiplication is expanded to calls into the compiler runtime library if the MCU being targeted does not support multiplication in hardware. Before this, MUL instructions would be generated on CPUs like the ATtiny85, triggering a CPU reset due to an illegal instruction at runtime. First raised in avr-rust/rust-legacy-fork#124. llvm-svn: 351523
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…ave hardware MUL This change modifies the LLVM ISel lowering settings so that 8-bit/16-bit multiplication is expanded to calls into the compiler runtime library if the MCU being targeted does not support multiplication in hardware. Before this, MUL instructions would be generated on CPUs like the ATtiny85, triggering a CPU reset due to an illegal instruction at runtime. First raised in avr-rust/rust-legacy-fork#124.
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…ave hardware MUL This change modifies the LLVM ISel lowering settings so that 8-bit/16-bit multiplication is expanded to calls into the compiler runtime library if the MCU being targeted does not support multiplication in hardware. Before this, MUL instructions would be generated on CPUs like the ATtiny85, triggering a CPU reset due to an illegal instruction at runtime. First raised in avr-rust/rust-legacy-fork#124.
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Fixed in upstream LLVM at llvm-project/llvm-project-20170507@a684637. |
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…ave hardware MUL This change modifies the LLVM ISel lowering settings so that 8-bit/16-bit multiplication is expanded to calls into the compiler runtime library if the MCU being targeted does not support multiplication in hardware. Before this, MUL instructions would be generated on CPUs like the ATtiny85, triggering a CPU reset due to an illegal instruction at runtime. First raised in avr-rust/rust-legacy-fork#124. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351523 91177308-0d34-0410-b5e6-96231b3b80d8
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…ave hardware MUL This change modifies the LLVM ISel lowering settings so that 8-bit/16-bit multiplication is expanded to calls into the compiler runtime library if the MCU being targeted does not support multiplication in hardware. Before this, MUL instructions would be generated on CPUs like the ATtiny85, triggering a CPU reset due to an illegal instruction at runtime. First raised in avr-rust/rust-legacy-fork#124. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351523 91177308-0d34-0410-b5e6-96231b3b80d8
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Cherry-picked in a3b0834 |
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…ave hardware MUL This change modifies the LLVM ISel lowering settings so that 8-bit/16-bit multiplication is expanded to calls into the compiler runtime library if the MCU being targeted does not support multiplication in hardware. Before this, MUL instructions would be generated on CPUs like the ATtiny85, triggering a CPU reset due to an illegal instruction at runtime. First raised in avr-rust/rust-legacy-fork#124. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351523 91177308-0d34-0410-b5e6-96231b3b80d8
dylanmckay
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…ave hardware MUL This change modifies the LLVM ISel lowering settings so that 8-bit/16-bit multiplication is expanded to calls into the compiler runtime library if the MCU being targeted does not support multiplication in hardware. Before this, MUL instructions would be generated on CPUs like the ATtiny85, triggering a CPU reset due to an illegal instruction at runtime. First raised in avr-rust/rust-legacy-fork#124.
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------------------------------------------------------------------------ r351523 | dylanmckay | 2019-01-17 22:10:41 -0800 (Thu, 17 Jan 2019) | 12 lines [AVR] Expand 8/16-bit multiplication to libcalls on MCUs that don't have hardware MUL This change modifies the LLVM ISel lowering settings so that 8-bit/16-bit multiplication is expanded to calls into the compiler runtime library if the MCU being targeted does not support multiplication in hardware. Before this, MUL instructions would be generated on CPUs like the ATtiny85, triggering a CPU reset due to an illegal instruction at runtime. First raised in avr-rust/rust-legacy-fork#124. ------------------------------------------------------------------------ llvm-svn: 361551
dtzWill
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------------------------------------------------------------------------ r351523 | dylanmckay | 2019-01-17 22:10:41 -0800 (Thu, 17 Jan 2019) | 12 lines [AVR] Expand 8/16-bit multiplication to libcalls on MCUs that don't have hardware MUL This change modifies the LLVM ISel lowering settings so that 8-bit/16-bit multiplication is expanded to calls into the compiler runtime library if the MCU being targeted does not support multiplication in hardware. Before this, MUL instructions would be generated on CPUs like the ATtiny85, triggering a CPU reset due to an illegal instruction at runtime. First raised in avr-rust/rust-legacy-fork#124. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_80@361551 91177308-0d34-0410-b5e6-96231b3b80d8
JohnHolmesII
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…ave hardware MUL This change modifies the LLVM ISel lowering settings so that 8-bit/16-bit multiplication is expanded to calls into the compiler runtime library if the MCU being targeted does not support multiplication in hardware. Before this, MUL instructions would be generated on CPUs like the ATtiny85, triggering a CPU reset due to an illegal instruction at runtime. First raised in avr-rust/rust-legacy-fork#124. llvm-svn: 351523
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When compiling the following code:
using
rustc --target=avr-attiny85 main.rs --emit=asmand the following target:{ "llvm-target": "avr-unknown-unknown", "cpu": "attiny85", "target-endian": "little", "target-pointer-width": "16", "target-c-int-width": "16", "os": "unknown", "target-env": "", "target-vendor": "unknown", "arch": "avr", "data-layout": "e-P1-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8-a:8", "executables": true, "linker": "avr-gcc", "linker-flavor": "gcc", "pre-link-args": { "gcc": ["-Os", "-mmcu=attiny85"] }, "exe-suffix": ".elf", "post-link-args": { "gcc": ["-Wl,--gc-sections"] }, "singlethread": true, "no-builtins": false, "no-default-libraries": false }LLVM emits a
mulinstruction, even though they are not supported onattiny85.Unfortunately I don't have llvm tools available right now, to reduce the IR. I guess this is the responsible line:
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