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Documentation cleanup: now have a Doxygen brief description for all c…
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…lasses, plus a Doxyfile for generating documentation
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azonenberg committed Aug 3, 2018
1 parent eea5ae8 commit 68b7060
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Showing 16 changed files with 2,534 additions and 17 deletions.
7 changes: 6 additions & 1 deletion ARMCoreSightDevice.h
Expand Up @@ -30,11 +30,16 @@
/**
@file
@author Andrew D. Zonenberg
@brief Base class for ARM CoreSight components (other than CPU cores) on a debug APB bus
@brief Declaration of ARMCoreSightDevice
*/
#ifndef ARMCoreSightDevice_h
#define ARMCoreSightDevice_h

/**
@brief Base class for ARM CoreSight components (other than CPU cores) on a debug APB bus
\ingroup libjtaghal
*/
class ARMCoreSightDevice : public ARMAPBDevice
{
public:
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2 changes: 1 addition & 1 deletion ARMDebugAccessPort.h
Expand Up @@ -75,7 +75,7 @@ union ARMDebugPortIDRegister
} __attribute__ ((packed));

/**
@brief An AP attached to an ADIv5 DP
@brief Base class for all access ports within an ARMDebugPort
\ingroup libjtaghal
*/
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4 changes: 2 additions & 2 deletions ARMDebugMemAccessPort.h
Expand Up @@ -39,7 +39,7 @@
#include <stdlib.h>

/**
@brief ARM debug port identification register (see ADIv5 Architecture Specification figure 6-3)
@brief Contents of the CSW register in a MEM-AP (see ADIv5 Architecture Specification 7.6.4)
*/
union ARMDebugMemAPControlStatusWord
{
Expand Down Expand Up @@ -90,7 +90,7 @@ class ARMDebugAccessPort;
class ARMAPBDevice;

/**
@brief A memory mapped debug interface
@brief A bridge from an ARMDebugPort to an ARM memory bus
\ingroup libjtaghal
*/
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5 changes: 5 additions & 0 deletions ARMDebugPort.h
Expand Up @@ -36,6 +36,11 @@
#ifndef ARMDebugPort_h
#define ARMDebugPort_h

/**
@brief Base class for ARM debug ports (JTAG-DP, SWJ-DP, etc)
\ingroup libjtaghal
*/
class ARMDebugPort : public DebuggerInterface
{
public:
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2 changes: 1 addition & 1 deletion ARMDevice.h
Expand Up @@ -45,7 +45,7 @@ enum ARM_IDCODES
};

/**
@brief Abstract base class for all ARM Ltd devices (typically ARM DAPs)
@brief Abstract base class for all ARM Ltd JTAG devices (ADIv5 DAP or legacy CPUs with their own JTAG TAPs)
\ingroup libjtaghal
*/
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7 changes: 6 additions & 1 deletion ARMFlashPatchBreakpoint.h
Expand Up @@ -30,13 +30,18 @@
/**
@file
@author Andrew D. Zonenberg
@brief ARMv7-M Flash Patch/Breakpoint Unit
@brief Declaration of ARMFlashPatchBreakpoint
*/
#ifndef ARMFlashPatchBreakpoint_h
#define ARMFlashPatchBreakpoint_h

class ARMv7MProcessor;

/**
@brief Cortex-M Flash Patch/Breakpoint Unit (see ARMv7-M architecture ref C1.11)
\ingroup libjtaghal
*/
class ARMFlashPatchBreakpoint : public ARMCoreSightDevice
{
public:
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2 changes: 1 addition & 1 deletion ARMJtagDebugPort.h
Expand Up @@ -106,7 +106,7 @@ union ARMJtagDebugPortStatusRegister
class ARMDebugMemAccessPort;

/**
@brief An ARM debug port (contains one or more APs and a DP)
@brief An ARM JTAG-DP (contains one or more APs and a DP)
\ingroup libjtaghal
*/
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2 changes: 1 addition & 1 deletion ARMv7MProcessor.h
Expand Up @@ -40,7 +40,7 @@ class DebuggableDevice;
class ARMAPBDevice;

/**
@brief An ARM Cortex-M CPU core supporting the ARMv7-M architecture, as seen over a CoreSight APB bus
@brief An ARMv7 Cortex-M CPU core, as seen over a CoreSight APB bus
\ingroup libjtaghal
*/
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6 changes: 3 additions & 3 deletions ARMv7Processor.h
Expand Up @@ -58,7 +58,7 @@ enum ARMDebugArchVersion
};

/**
@brief ARM debug ID register (see ARMv7 ARM, C11.11.15)
@brief ARM debug ID register (see ARMv7 Architecture Reference Manual, C11.11.15)
*/
union ARMv7DebugIDRegister
{
Expand Down Expand Up @@ -104,7 +104,7 @@ union ARMv7DebugIDRegister
} __attribute__ ((packed));

/**
ARM debug status/control register (see ARMv7 ARM, C11.11.20)
@brief ARM debug status/control register (see ARMv7 Architecture Reference Manual, C11.11.20)
*/
union ARMv7DebugStatusControlRegister
{
Expand Down Expand Up @@ -192,7 +192,7 @@ union ARMv7DebugStatusControlRegister
} __attribute__ ((packed));

/**
@brief An ARM Cortex-A9 CPU core, as seen over a CoreSight APB bus
@brief An ARMv7 Cortex-A CPU core, as seen over a CoreSight APB bus
\ingroup libjtaghal
*/
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4 changes: 2 additions & 2 deletions ARMv8Processor.h
Expand Up @@ -58,7 +58,7 @@ enum ARMDebugArchVersion
};
*/
/**
@brief ARM debug ID register (see ARMv8 ARM, C11.11.15)
ARM debug ID register (see ARMv8 ARM, C11.11.15)
*/
/*
union ARMv8DebugIDRegister
Expand Down Expand Up @@ -194,7 +194,7 @@ union ARMv8DebugStatusControlRegister
} __attribute__ ((packed));
*/
/**
@brief An ARM Cortex-A9 CPU core, as seen over a CoreSight APB bus
@brief An ARMv8 Cortex-A CPU core, as seen over a CoreSight APB bus
\ingroup libjtaghal
*/
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2 changes: 1 addition & 1 deletion DebuggableDevice.h
Expand Up @@ -39,7 +39,7 @@
class DebuggerInterface;

/**
@brief Generic base class for all debuggable devices (MCUs etc)
@brief Generic base class for all debuggable devices (CPU cores etc)
\ingroup libjtaghal
*/
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