ADC conversion initialization flag issue #24
Closed
Comments
beckus
added a commit
that referenced
this issue
Dec 6, 2018
The SWSTART flag needs to be cleared to indicate conversion has started. Resolves issue #24.
Thank you for suggesting this fix. This seems reasonable so I made the change in commit 5a48797. |
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
I have failed running examples linked with libopencm3 on qemu for STM32. Namely, starting an ADC conversion with adc_start_conversion_regular(ADC1); hangs. Indeed, this function tests the
ADC_CR2_SWSTART bit of ADC_CR2 to check that conversion has started. In the RM0008 user manual of the STM32F1, we are told (p.231) that
Bit 22 SWSTART: Start conversion of regular channels
This bit is set by software to start conversion and cleared by hardware as soon as conversion
starts. It starts a conversion of a group of regular channels if SWSTART is selected as trigger
event by the EXTSEL[2:0] bits.
so I think it is reasonable to conclude stm32_adc_start_conv(Stm32Adc *s) of hw/arm/stm32_adc.c with s->ADC_CR2&=~ADC_CR2_SWSTART; just before timer_mod. At least this solves the libopencm3 ADC conversion initialization issue.
The text was updated successfully, but these errors were encountered: