Hardware design for picosecond timetagger
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timetag2-hw.pcb
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README.mkd

timetag2-hw

This is a hardware design for a high-precision timing instrument for time-correlated single photon counting experiments. The board consists of,

  • A FT2232H USB interface and accompanying EEPROM
  • A Spartan 6 FPGA
  • Four high-speed ECL output comparators
  • Room for a Pletronics oven-stabilized crystal oscillator
  • A few level-shifted GPIO pins
  • Some debug LEDs
  • A number of linear regulators to supply the many voltages needed around the board

The firmware for the FPGA is based around the CERN TDC core and can be found here.

Power

The device takes no power from the USB port. Instead, the device must be provided with stable +5V and -5V rails on the PWR connector located at the top of the board.

Inputs

The four inputs are driven by a threshold discriminator built around the Analog Devices ADCMP582 high-speed ECL output comparator. The resistors R1 and R2 set the threshold level which for NIM should be set slightly below 0V. A 50 ohm termination resistance is provided in the ADCMP582. Note that this is not a constant fraction discriminator and will not behave terribly well with fluctuating trigger amplitudes.

Power rails

  • +5V

    • Unregulated from outside world
  • -5V

    • Unregulated from outside world
  • +1.2V

    • Supplied by TPS79912 from +5V
  • +1.8V

    • Supplied by FT2232's LDO from +3.3V
    • Max 150mA
    • FT2232: 70mA
  • +3.3V

    • Supplied by TPS79933 from +5V
  • +2.5V

    • Supplied by TPS79933 from +5V
  • Vtt

    • Supplied by MAX1735