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Separated QIDs from MAX QS allocated

Changes:
   1) Fixed no. of IOQs supported by controller to exlude admin.
   2) Separated MaxQ allocated from MAX QID's.
   3) Changed return values to USHRT_MAX for invalid QID's.

link to review:
      http://dcgshare.lm.intel.com/reviews/r/883/
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commit 578e8eeae1a5c2521c1fa52b49ac60667a9fad86 1 parent dcad960
Sravan Kumar Thokala authored February 27, 2012
11  hw/nvme.c
@@ -135,7 +135,7 @@ static void msix_clr_pending(PCIDevice *dev, uint32_t vector)
135 135
 static int nvme_irqcq_empty(NVMEState *nvme_dev, uint32_t vector)
136 136
 {
137 137
     int index, ret_val = FAIL;
138  
-    for (index = 0; index < NVME_MAX_QID; index++) {
  138
+    for (index = 0; index < NVME_MAX_QS_ALLOCATED; index++) {
139 139
         if (nvme_dev->cq[index].vector == vector &&
140 140
             nvme_dev->cq[index].irq_enabled) {
141 141
             if (nvme_dev->cq[index].head != nvme_dev->cq[index].tail) {
@@ -160,7 +160,7 @@ static void sq_processing_timer_cb(void *param)
160 160
      * coz if one Q blocks for wahtever reason (CQ full)..remaining
161 161
      * Queues having valid data won't be processed
162 162
      */
163  
-    for (sq_id = 0; sq_id < NVME_MAX_QID; sq_id++) {
  163
+    for (sq_id = 0; sq_id < NVME_MAX_QS_ALLOCATED; sq_id++) {
164 164
         while (n->sq[sq_id].head != n->sq[sq_id].tail) {
165 165
             /* Handle one SQ entry */
166 166
             process_sq(n, sq_id);
@@ -671,7 +671,7 @@ static void clear_nvme_device(NVMEState *n)
671 671
     read_file(n, NVME_SPACE);
672 672
     n->intr_vect = 0;
673 673
 
674  
-    for (i = 0; i < NVME_MAX_QID; i++) {
  674
+    for (i = 0; i < NVME_MAX_QS_ALLOCATED; i++) {
675 675
         memset(&(n->sq[i]), 0, sizeof(NVMEIOSQueue));
676 676
         memset(&(n->cq[i]), 0, sizeof(NVMEIOCQueue));
677 677
     }
@@ -909,8 +909,8 @@ static int pci_nvme_init(PCIDevice *pci_dev)
909 909
     n->disk = (DiskInfo *)qemu_malloc(sizeof(DiskInfo)*n->num_namespaces);
910 910
 
911 911
     /* Zero out the Queue Datastructures */
912  
-    memset(n->cq, 0, sizeof(NVMEIOCQueue) * NVME_MAX_QID);
913  
-    memset(n->sq, 0, sizeof(NVMEIOSQueue) * NVME_MAX_QID);
  912
+    memset(n->cq, 0, sizeof(NVMEIOCQueue) * NVME_MAX_QS_ALLOCATED);
  913
+    memset(n->sq, 0, sizeof(NVMEIOSQueue) * NVME_MAX_QS_ALLOCATED);
914 914
 
915 915
     /* TODO: pci_conf = n->dev.config; */
916 916
     n->nvectors = NVME_MSIX_NVECTORS;
@@ -968,6 +968,7 @@ static int pci_nvme_init(PCIDevice *pci_dev)
968 968
     read_file(n, NVME_SPACE);
969 969
 
970 970
     /* Defaulting the number of Queues */
  971
+    /* Indicates the number of I/O Q's allocated. This is 0's based value. */
971 972
     n->feature.number_of_queues = ((NVME_MAX_QID - 1) << 16)
972 973
         | (NVME_MAX_QID - 1);
973 974
 
15  hw/nvme.h
@@ -64,7 +64,12 @@
64 64
 /* Size of NVME Controller Registers except the Doorbells */
65 65
 #define NVME_CNTRL_SIZE 0xfff
66 66
 
67  
-#define NVME_MAX_QID 64
  67
+/* Maximum Q's allocated for the controller including Admin Q */
  68
+#define NVME_MAX_QS_ALLOCATED 64
  69
+
  70
+/* The Q ID starts from 0 for Admin Q and ends at
  71
+ * NVME_MAX_QS_ALLOCATED minus 1 for IO Q's */
  72
+#define NVME_MAX_QID (NVME_MAX_QS_ALLOCATED - 1)
68 73
 
69 74
 /* Size of PRP entry in bytes */
70 75
 #define PRP_ENTRY_SIZE 8
@@ -110,8 +115,8 @@ enum {
110 115
     NVME_SQ1TDBL   = 0x1008, /* SQ 1 Tail Doorbell, 32bit */
111 116
     NVME_CQ1HDBL   = 0x100c, /* CQ 1 Head Doorbell, 32bit */
112 117
 
113  
-    NVME_SQMAXTDBL = (NVME_SQ0TDBL + 8*(NVME_MAX_QID - 1)),
114  
-    NVME_CQMAXHDBL = (NVME_CQ0HDBL + 8*(NVME_MAX_QID - 1))
  118
+    NVME_SQMAXTDBL = (NVME_SQ0TDBL + 8 * NVME_MAX_QID),
  119
+    NVME_CQMAXHDBL = (NVME_CQ0HDBL + 8 * NVME_MAX_QID)
115 120
 };
116 121
 
117 122
 /* address for SQ ID. */
@@ -419,8 +424,8 @@ typedef struct NVMEState {
419 424
     struct nvme_features feature;
420 425
     uint32_t abort;
421 426
 
422  
-    NVMEIOCQueue cq[NVME_MAX_QID];
423  
-    NVMEIOSQueue sq[NVME_MAX_QID];
  427
+    NVMEIOCQueue cq[NVME_MAX_QS_ALLOCATED];
  428
+    NVMEIOSQueue sq[NVME_MAX_QS_ALLOCATED];
424 429
 
425 430
     DiskInfo *disk;
426 431
     uint32_t ns_size;
36  hw/nvme_adm.c
@@ -72,7 +72,7 @@ static uint32_t adm_check_cqid(NVMEState *n, uint16_t cqid)
72 72
 {
73 73
     LOG_NORM("kw q: check if exists cqid %d", cqid);
74 74
     /* If queue is allocated dma_addr!=NULL and has the same ID */
75  
-    if (cqid >= NVME_MAX_QID) {
  75
+    if (cqid > NVME_MAX_QID) {
76 76
         return FAIL;
77 77
     } else if (n->cq[cqid].dma_addr && n->cq[cqid].id == cqid) {
78 78
         return 0;
@@ -84,7 +84,7 @@ static uint32_t adm_check_cqid(NVMEState *n, uint16_t cqid)
84 84
 static uint32_t adm_check_sqid(NVMEState *n, uint16_t sqid)
85 85
 {
86 86
     /* If queue is allocated dma_addr!=NULL and has the same ID */
87  
-    if (sqid >= NVME_MAX_QID) {
  87
+    if (sqid > NVME_MAX_QID) {
88 88
         return FAIL;
89 89
     } else if (n->sq[sqid].dma_addr && n->sq[sqid].id == sqid) {
90 90
         return 0;
@@ -95,23 +95,23 @@ static uint32_t adm_check_sqid(NVMEState *n, uint16_t sqid)
95 95
 
96 96
 static uint16_t adm_get_sq(NVMEState *n, uint16_t sqid)
97 97
 {
98  
-    if (sqid >= NVME_MAX_QID) {
99  
-        return NVME_MAX_QID;
  98
+    if (sqid > NVME_MAX_QID) {
  99
+        return USHRT_MAX;
100 100
     } else if (n->sq[sqid].dma_addr && n->sq[sqid].id == sqid) {
101 101
         return sqid;
102 102
     } else {
103  
-        return NVME_MAX_QID;
  103
+        return USHRT_MAX;
104 104
     }
105 105
 }
106 106
 
107 107
 static uint16_t adm_get_cq(NVMEState *n, uint16_t cqid)
108 108
 {
109  
-    if (cqid >= NVME_MAX_QID) {
110  
-        return NVME_MAX_QID;
  109
+    if (cqid > NVME_MAX_QID) {
  110
+        return USHRT_MAX;
111 111
     } else if (n->cq[cqid].dma_addr && n->cq[cqid].id == cqid) {
112 112
         return cqid;
113 113
     } else {
114  
-        return NVME_MAX_QID;
  114
+        return USHRT_MAX;
115 115
     }
116 116
 
117 117
 }
@@ -153,7 +153,7 @@ static uint32_t adm_cmd_del_sq(NVMEState *n, NVMECmd *cmd, NVMECQE *cqe)
153 153
     }
154 154
 
155 155
     i = adm_get_sq(n, c->qid);
156  
-    if (i == NVME_MAX_QID) {
  156
+    if (i == USHRT_MAX) {
157 157
         LOG_NORM("No such queue: SQ %d", c->qid);
158 158
         sf->sct = NVME_SCT_CMD_SPEC_ERR;
159 159
         sf->sc = NVME_INVALID_QUEUE_IDENTIFIER;
@@ -164,9 +164,9 @@ static uint32_t adm_cmd_del_sq(NVMEState *n, NVMECmd *cmd, NVMECQE *cqe)
164 164
         /* Queue not empty */
165 165
     }
166 166
 
167  
-    if (sq->cq_id != NVME_MAX_QID) {
  167
+    if (sq->cq_id <= NVME_MAX_QID) {
168 168
         cq = &n->cq[sq->cq_id];
169  
-        if (cq->id == NVME_MAX_QID) {
  169
+        if (cq->id > NVME_MAX_QID) {
170 170
             /* error */
171 171
             sf->sct = NVME_SCT_CMD_SPEC_ERR;
172 172
             sf->sc = NVME_INVALID_QUEUE_IDENTIFIER;
@@ -180,7 +180,7 @@ static uint32_t adm_cmd_del_sq(NVMEState *n, NVMECmd *cmd, NVMECQE *cqe)
180 180
         cq->usage_cnt--;
181 181
     }
182 182
 
183  
-    sq->id = sq->cq_id = NVME_MAX_QID;
  183
+    sq->id = sq->cq_id = USHRT_MAX;
184 184
     sq->head = sq->tail = 0;
185 185
     sq->size = 0;
186 186
     sq->prio = 0;
@@ -219,7 +219,7 @@ static uint32_t adm_cmd_alloc_sq(NVMEState *n, NVMECmd *cmd, NVMECQE *cqe)
219 219
     LOG_DBG("Create SQ command with PRP2: %lu", c->prp2);
220 220
     LOG_DBG("Create SQ command is assoc with CQID: %u", c->cqid);
221 221
 
222  
-    if (c->qid == 0 || c->qid >= NVME_MAX_QID) {
  222
+    if (c->qid == 0 || c->qid > NVME_MAX_QID) {
223 223
         sf->sct = NVME_SCT_CMD_SPEC_ERR;
224 224
         sf->sc = NVME_INVALID_QUEUE_IDENTIFIER;
225 225
         LOG_NORM("%s():NVME_INVALID_QUEUE_IDENTIFIER in Command", __func__);
@@ -327,7 +327,7 @@ static uint32_t adm_cmd_del_cq(NVMEState *n, NVMECmd *cmd, NVMECQE *cqe)
327 327
 
328 328
 
329 329
     i = adm_get_cq(n, c->qid);
330  
-    if (i == NVME_MAX_QID) {
  330
+    if (i == USHRT_MAX) {
331 331
         LOG_NORM("No such queue: CQ %d", c->qid);
332 332
         sf->sct = NVME_SCT_CMD_SPEC_ERR;
333 333
         sf->sc = NVME_INVALID_QUEUE_IDENTIFIER;
@@ -347,7 +347,7 @@ static uint32_t adm_cmd_del_cq(NVMEState *n, NVMECmd *cmd, NVMECQE *cqe)
347 347
         return NVME_SC_INVALID_FIELD;
348 348
     }
349 349
 
350  
-    cq->id = NVME_MAX_QID;
  350
+    cq->id = USHRT_MAX;
351 351
     cq->head = cq->tail = 0;
352 352
     cq->size = 0;
353 353
     cq->irq_enabled = 0;
@@ -385,7 +385,7 @@ static uint32_t adm_cmd_alloc_cq(NVMEState *n, NVMECmd *cmd, NVMECQE *cqe)
385 385
         return FAIL;
386 386
     }
387 387
 
388  
-    if (c->qid == 0 || c->qid >= NVME_MAX_QID) {
  388
+    if (c->qid == 0 || c->qid > NVME_MAX_QID) {
389 389
         sf->sct = NVME_SCT_CMD_SPEC_ERR;
390 390
         sf->sc = NVME_INVALID_QUEUE_IDENTIFIER;
391 391
         LOG_NORM("%s():NVME_INVALID_QUEUE_IDENTIFIER in Command", __func__);
@@ -692,7 +692,7 @@ static uint32_t adm_cmd_abort(NVMEState *n, NVMECmd *cmd, NVMECQE *cqe)
692 692
         return FAIL;
693 693
     }
694 694
 
695  
-    if (c->sqid >= NVME_MAX_QID) {
  695
+    if (c->sqid > NVME_MAX_QID) {
696 696
         sf->sc = NVME_SC_INVALID_FIELD;
697 697
         return FAIL;
698 698
     }
@@ -707,7 +707,7 @@ static uint32_t adm_cmd_abort(NVMEState *n, NVMECmd *cmd, NVMECQE *cqe)
707 707
     }
708 708
 
709 709
     i = adm_get_sq(n, c->sqid);
710  
-    if (i == NVME_MAX_QID) {
  710
+    if (i == USHRT_MAX) {
711 711
         /* Failed - no SQ found*/
712 712
         sf->sct = NVME_SCT_CMD_SPEC_ERR;
713 713
         sf->sc = NVME_REQ_CMD_TO_ABORT_NOT_FOUND;
2  hw/nvme_io.c
@@ -34,6 +34,8 @@ static uint8_t is_cq_full(NVMEState *n, uint16_t qid)
34 34
 static void incr_sq_head(NVMEIOSQueue *q)
35 35
 {
36 36
     q->head = (q->head + 1) % q->size;
  37
+    LOG_DBG("%s(): (SQID, HD, SZ) = (%d, %d, %d)", __func__,
  38
+        q->id, q->head, q->size);
37 39
 }
38 40
 
39 41
 static void incr_cq_tail(NVMEIOCQueue *q)

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