/
avr-tdep.c
1633 lines (1355 loc) · 50.2 KB
/
avr-tdep.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/* Target-dependent code for Atmel AVR, for GDB.
Copyright (C) 1996-2019 Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
/* Contributed by Theodore A. Roth, troth@openavr.org */
/* Portions of this file were taken from the original gdb-4.18 patch developed
by Denis Chertykov, denisc@overta.ru */
#include "defs.h"
#include "frame.h"
#include "frame-unwind.h"
#include "frame-base.h"
#include "trad-frame.h"
#include "gdbcmd.h"
#include "gdbcore.h"
#include "gdbtypes.h"
#include "inferior.h"
#include "symfile.h"
#include "arch-utils.h"
#include "regcache.h"
#include "dis-asm.h"
#include "objfiles.h"
#include <algorithm>
/* AVR Background:
(AVR micros are pure Harvard Architecture processors.)
The AVR family of microcontrollers have three distinctly different memory
spaces: flash, sram and eeprom. The flash is 16 bits wide and is used for
the most part to store program instructions. The sram is 8 bits wide and is
used for the stack and the heap. Some devices lack sram and some can have
an additional external sram added on as a peripheral.
The eeprom is 8 bits wide and is used to store data when the device is
powered down. Eeprom is not directly accessible, it can only be accessed
via io-registers using a special algorithm. Accessing eeprom via gdb's
remote serial protocol ('m' or 'M' packets) looks difficult to do and is
not included at this time.
[The eeprom could be read manually via ``x/b <eaddr + AVR_EMEM_START>'' or
written using ``set {unsigned char}<eaddr + AVR_EMEM_START>''. For this to
work, the remote target must be able to handle eeprom accesses and perform
the address translation.]
All three memory spaces have physical addresses beginning at 0x0. In
addition, the flash is addressed by gcc/binutils/gdb with respect to 8 bit
bytes instead of the 16 bit wide words used by the real device for the
Program Counter.
In order for remote targets to work correctly, extra bits must be added to
addresses before they are send to the target or received from the target
via the remote serial protocol. The extra bits are the MSBs and are used to
decode which memory space the address is referring to. */
/* Constants: prefixed with AVR_ to avoid name space clashes */
/* Address space flags */
/* We are assigning the TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1 to the flash address
space. */
#define AVR_TYPE_ADDRESS_CLASS_FLASH TYPE_ADDRESS_CLASS_1
#define AVR_TYPE_INSTANCE_FLAG_ADDRESS_CLASS_FLASH \
TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
enum
{
AVR_REG_W = 24,
AVR_REG_X = 26,
AVR_REG_Y = 28,
AVR_FP_REGNUM = 28,
AVR_REG_Z = 30,
AVR_SREG_REGNUM = 32,
AVR_SP_REGNUM = 33,
AVR_PC_REGNUM = 34,
AVR_NUM_REGS = 32 + 1 /*SREG*/ + 1 /*SP*/ + 1 /*PC*/,
AVR_NUM_REG_BYTES = 32 + 1 /*SREG*/ + 2 /*SP*/ + 4 /*PC*/,
/* Pseudo registers. */
AVR_PSEUDO_PC_REGNUM = 35,
AVR_NUM_PSEUDO_REGS = 1,
AVR_PC_REG_INDEX = 35, /* index into array of registers */
AVR_MAX_PROLOGUE_SIZE = 64, /* bytes */
/* Count of pushed registers. From r2 to r17 (inclusively), r28, r29 */
AVR_MAX_PUSHES = 18,
/* Number of the last pushed register. r17 for current avr-gcc */
AVR_LAST_PUSHED_REGNUM = 17,
AVR_ARG1_REGNUM = 24, /* Single byte argument */
AVR_ARGN_REGNUM = 25, /* Multi byte argments */
AVR_LAST_ARG_REGNUM = 8, /* Last argument register */
AVR_RET1_REGNUM = 24, /* Single byte return value */
AVR_RETN_REGNUM = 25, /* Multi byte return value */
/* FIXME: TRoth/2002-01-??: Can we shift all these memory masks left 8
bits? Do these have to match the bfd vma values? It sure would make
things easier in the future if they didn't need to match.
Note: I chose these values so as to be consistent with bfd vma
addresses.
TRoth/2002-04-08: There is already a conflict with very large programs
in the mega128. The mega128 has 128K instruction bytes (64K words),
thus the Most Significant Bit is 0x10000 which gets masked off my
AVR_MEM_MASK.
The problem manifests itself when trying to set a breakpoint in a
function which resides in the upper half of the instruction space and
thus requires a 17-bit address.
For now, I've just removed the EEPROM mask and changed AVR_MEM_MASK
from 0x00ff0000 to 0x00f00000. Eeprom is not accessible from gdb yet,
but could be for some remote targets by just adding the correct offset
to the address and letting the remote target handle the low-level
details of actually accessing the eeprom. */
AVR_IMEM_START = 0x00000000, /* INSN memory */
AVR_SMEM_START = 0x00800000, /* SRAM memory */
#if 1
/* No eeprom mask defined */
AVR_MEM_MASK = 0x00f00000, /* mask to determine memory space */
#else
AVR_EMEM_START = 0x00810000, /* EEPROM memory */
AVR_MEM_MASK = 0x00ff0000, /* mask to determine memory space */
#endif
};
/* Prologue types:
NORMAL and CALL are the typical types (the -mcall-prologues gcc option
causes the generation of the CALL type prologues). */
enum {
AVR_PROLOGUE_NONE, /* No prologue */
AVR_PROLOGUE_NORMAL,
AVR_PROLOGUE_CALL, /* -mcall-prologues */
AVR_PROLOGUE_MAIN,
AVR_PROLOGUE_INTR, /* interrupt handler */
AVR_PROLOGUE_SIG, /* signal handler */
};
/* Any function with a frame looks like this
....... <-SP POINTS HERE
LOCALS1 <-FP POINTS HERE
LOCALS0
SAVED FP
SAVED R3
SAVED R2
RET PC
FIRST ARG
SECOND ARG */
struct avr_unwind_cache
{
/* The previous frame's inner most stack address. Used as this
frame ID's stack_addr. */
CORE_ADDR prev_sp;
/* The frame's base, optionally used by the high-level debug info. */
CORE_ADDR base;
int size;
int prologue_type;
/* Table indicating the location of each and every register. */
struct trad_frame_saved_reg *saved_regs;
};
struct gdbarch_tdep
{
/* Number of bytes stored to the stack by call instructions.
2 bytes for avr1-5 and avrxmega1-5, 3 bytes for avr6 and avrxmega6-7. */
int call_length;
/* Type for void. */
struct type *void_type;
/* Type for a function returning void. */
struct type *func_void_type;
/* Type for a pointer to a function. Used for the type of PC. */
struct type *pc_type;
};
/* Lookup the name of a register given it's number. */
static const char *
avr_register_name (struct gdbarch *gdbarch, int regnum)
{
static const char * const register_names[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
"SREG", "SP", "PC2",
"pc"
};
if (regnum < 0)
return NULL;
if (regnum >= (sizeof (register_names) / sizeof (*register_names)))
return NULL;
return register_names[regnum];
}
/* Return the GDB type object for the "standard" data type
of data in register N. */
static struct type *
avr_register_type (struct gdbarch *gdbarch, int reg_nr)
{
if (reg_nr == AVR_PC_REGNUM)
return builtin_type (gdbarch)->builtin_uint32;
if (reg_nr == AVR_PSEUDO_PC_REGNUM)
return gdbarch_tdep (gdbarch)->pc_type;
if (reg_nr == AVR_SP_REGNUM)
return builtin_type (gdbarch)->builtin_data_ptr;
return builtin_type (gdbarch)->builtin_uint8;
}
/* Instruction address checks and convertions. */
static CORE_ADDR
avr_make_iaddr (CORE_ADDR x)
{
return ((x) | AVR_IMEM_START);
}
/* FIXME: TRoth: Really need to use a larger mask for instructions. Some
devices are already up to 128KBytes of flash space.
TRoth/2002-04-8: See comment above where AVR_IMEM_START is defined. */
static CORE_ADDR
avr_convert_iaddr_to_raw (CORE_ADDR x)
{
return ((x) & 0xffffffff);
}
/* SRAM address checks and convertions. */
static CORE_ADDR
avr_make_saddr (CORE_ADDR x)
{
/* Return 0 for NULL. */
if (x == 0)
return 0;
return ((x) | AVR_SMEM_START);
}
static CORE_ADDR
avr_convert_saddr_to_raw (CORE_ADDR x)
{
return ((x) & 0xffffffff);
}
/* EEPROM address checks and convertions. I don't know if these will ever
actually be used, but I've added them just the same. TRoth */
/* TRoth/2002-04-08: Commented out for now to allow fix for problem with large
programs in the mega128. */
/* static CORE_ADDR */
/* avr_make_eaddr (CORE_ADDR x) */
/* { */
/* return ((x) | AVR_EMEM_START); */
/* } */
/* static int */
/* avr_eaddr_p (CORE_ADDR x) */
/* { */
/* return (((x) & AVR_MEM_MASK) == AVR_EMEM_START); */
/* } */
/* static CORE_ADDR */
/* avr_convert_eaddr_to_raw (CORE_ADDR x) */
/* { */
/* return ((x) & 0xffffffff); */
/* } */
/* Convert from address to pointer and vice-versa. */
static void
avr_address_to_pointer (struct gdbarch *gdbarch,
struct type *type, gdb_byte *buf, CORE_ADDR addr)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
/* Is it a data address in flash? */
if (AVR_TYPE_ADDRESS_CLASS_FLASH (type))
{
/* A data pointer in flash is byte addressed. */
store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order,
avr_convert_iaddr_to_raw (addr));
}
/* Is it a code address? */
else if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
|| TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD)
{
/* A code pointer is word (16 bits) addressed. We shift the address down
by 1 bit to convert it to a pointer. */
store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order,
avr_convert_iaddr_to_raw (addr >> 1));
}
else
{
/* Strip off any upper segment bits. */
store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order,
avr_convert_saddr_to_raw (addr));
}
}
static CORE_ADDR
avr_pointer_to_address (struct gdbarch *gdbarch,
struct type *type, const gdb_byte *buf)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR addr
= extract_unsigned_integer (buf, TYPE_LENGTH (type), byte_order);
/* Is it a data address in flash? */
if (AVR_TYPE_ADDRESS_CLASS_FLASH (type))
{
/* A data pointer in flash is already byte addressed. */
return avr_make_iaddr (addr);
}
/* Is it a code address? */
else if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
|| TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD
|| TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type)))
{
/* A code pointer is word (16 bits) addressed so we shift it up
by 1 bit to convert it to an address. */
return avr_make_iaddr (addr << 1);
}
else
return avr_make_saddr (addr);
}
static CORE_ADDR
avr_integer_to_address (struct gdbarch *gdbarch,
struct type *type, const gdb_byte *buf)
{
ULONGEST addr = unpack_long (type, buf);
return avr_make_saddr (addr);
}
static CORE_ADDR
avr_read_pc (readable_regcache *regcache)
{
ULONGEST pc;
regcache->cooked_read (AVR_PC_REGNUM, &pc);
return avr_make_iaddr (pc);
}
static void
avr_write_pc (struct regcache *regcache, CORE_ADDR val)
{
regcache_cooked_write_unsigned (regcache, AVR_PC_REGNUM,
avr_convert_iaddr_to_raw (val));
}
static enum register_status
avr_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
int regnum, gdb_byte *buf)
{
ULONGEST val;
enum register_status status;
switch (regnum)
{
case AVR_PSEUDO_PC_REGNUM:
status = regcache->raw_read (AVR_PC_REGNUM, &val);
if (status != REG_VALID)
return status;
val >>= 1;
store_unsigned_integer (buf, 4, gdbarch_byte_order (gdbarch), val);
return status;
default:
internal_error (__FILE__, __LINE__, _("invalid regnum"));
}
}
static void
avr_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
int regnum, const gdb_byte *buf)
{
ULONGEST val;
switch (regnum)
{
case AVR_PSEUDO_PC_REGNUM:
val = extract_unsigned_integer (buf, 4, gdbarch_byte_order (gdbarch));
val <<= 1;
regcache_raw_write_unsigned (regcache, AVR_PC_REGNUM, val);
break;
default:
internal_error (__FILE__, __LINE__, _("invalid regnum"));
}
}
/* Function: avr_scan_prologue
This function decodes an AVR function prologue to determine:
1) the size of the stack frame
2) which registers are saved on it
3) the offsets of saved regs
This information is stored in the avr_unwind_cache structure.
Some devices lack the sbiw instruction, so on those replace this:
sbiw r28, XX
with this:
subi r28,lo8(XX)
sbci r29,hi8(XX)
A typical AVR function prologue with a frame pointer might look like this:
push rXX ; saved regs
...
push r28
push r29
in r28,__SP_L__
in r29,__SP_H__
sbiw r28,<LOCALS_SIZE>
in __tmp_reg__,__SREG__
cli
out __SP_H__,r29
out __SREG__,__tmp_reg__
out __SP_L__,r28
A typical AVR function prologue without a frame pointer might look like
this:
push rXX ; saved regs
...
A main function prologue looks like this:
ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>)
ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>)
out __SP_H__,r29
out __SP_L__,r28
A signal handler prologue looks like this:
push __zero_reg__
push __tmp_reg__
in __tmp_reg__, __SREG__
push __tmp_reg__
clr __zero_reg__
push rXX ; save registers r18:r27, r30:r31
...
push r28 ; save frame pointer
push r29
in r28, __SP_L__
in r29, __SP_H__
sbiw r28, <LOCALS_SIZE>
out __SP_H__, r29
out __SP_L__, r28
A interrupt handler prologue looks like this:
sei
push __zero_reg__
push __tmp_reg__
in __tmp_reg__, __SREG__
push __tmp_reg__
clr __zero_reg__
push rXX ; save registers r18:r27, r30:r31
...
push r28 ; save frame pointer
push r29
in r28, __SP_L__
in r29, __SP_H__
sbiw r28, <LOCALS_SIZE>
cli
out __SP_H__, r29
sei
out __SP_L__, r28
A `-mcall-prologues' prologue looks like this (Note that the megas use a
jmp instead of a rjmp, thus the prologue is one word larger since jmp is a
32 bit insn and rjmp is a 16 bit insn):
ldi r26,lo8(<LOCALS_SIZE>)
ldi r27,hi8(<LOCALS_SIZE>)
ldi r30,pm_lo8(.L_foo_body)
ldi r31,pm_hi8(.L_foo_body)
rjmp __prologue_saves__+RRR
.L_foo_body: */
/* Not really part of a prologue, but still need to scan for it, is when a
function prologue moves values passed via registers as arguments to new
registers. In this case, all local variables live in registers, so there
may be some register saves. This is what it looks like:
movw rMM, rNN
...
There could be multiple movw's. If the target doesn't have a movw insn, it
will use two mov insns. This could be done after any of the above prologue
types. */
static CORE_ADDR
avr_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR pc_beg, CORE_ADDR pc_end,
struct avr_unwind_cache *info)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int i;
unsigned short insn;
int scan_stage = 0;
struct bound_minimal_symbol msymbol;
unsigned char prologue[AVR_MAX_PROLOGUE_SIZE];
int vpc = 0;
int len;
len = pc_end - pc_beg;
if (len > AVR_MAX_PROLOGUE_SIZE)
len = AVR_MAX_PROLOGUE_SIZE;
/* FIXME: TRoth/2003-06-11: This could be made more efficient by only
reading in the bytes of the prologue. The problem is that the figuring
out where the end of the prologue is is a bit difficult. The old code
tried to do that, but failed quite often. */
read_memory (pc_beg, prologue, len);
/* Scanning main()'s prologue
ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>)
ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>)
out __SP_H__,r29
out __SP_L__,r28 */
if (len >= 4)
{
CORE_ADDR locals;
static const unsigned char img[] = {
0xde, 0xbf, /* out __SP_H__,r29 */
0xcd, 0xbf /* out __SP_L__,r28 */
};
insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
/* ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) */
if ((insn & 0xf0f0) == 0xe0c0)
{
locals = (insn & 0xf) | ((insn & 0x0f00) >> 4);
insn = extract_unsigned_integer (&prologue[vpc + 2], 2, byte_order);
/* ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) */
if ((insn & 0xf0f0) == 0xe0d0)
{
locals |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
if (vpc + 4 + sizeof (img) < len
&& memcmp (prologue + vpc + 4, img, sizeof (img)) == 0)
{
info->prologue_type = AVR_PROLOGUE_MAIN;
info->base = locals;
return pc_beg + 4;
}
}
}
}
/* Scanning `-mcall-prologues' prologue
Classic prologue is 10 bytes, mega prologue is a 12 bytes long */
while (1) /* Using a while to avoid many goto's */
{
int loc_size;
int body_addr;
unsigned num_pushes;
int pc_offset = 0;
/* At least the fifth instruction must have been executed to
modify frame shape. */
if (len < 10)
break;
insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
/* ldi r26,<LOCALS_SIZE> */
if ((insn & 0xf0f0) != 0xe0a0)
break;
loc_size = (insn & 0xf) | ((insn & 0x0f00) >> 4);
pc_offset += 2;
insn = extract_unsigned_integer (&prologue[vpc + 2], 2, byte_order);
/* ldi r27,<LOCALS_SIZE> / 256 */
if ((insn & 0xf0f0) != 0xe0b0)
break;
loc_size |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
pc_offset += 2;
insn = extract_unsigned_integer (&prologue[vpc + 4], 2, byte_order);
/* ldi r30,pm_lo8(.L_foo_body) */
if ((insn & 0xf0f0) != 0xe0e0)
break;
body_addr = (insn & 0xf) | ((insn & 0x0f00) >> 4);
pc_offset += 2;
insn = extract_unsigned_integer (&prologue[vpc + 6], 2, byte_order);
/* ldi r31,pm_hi8(.L_foo_body) */
if ((insn & 0xf0f0) != 0xe0f0)
break;
body_addr |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
pc_offset += 2;
msymbol = lookup_minimal_symbol ("__prologue_saves__", NULL, NULL);
if (!msymbol.minsym)
break;
insn = extract_unsigned_integer (&prologue[vpc + 8], 2, byte_order);
/* rjmp __prologue_saves__+RRR */
if ((insn & 0xf000) == 0xc000)
{
/* Extract PC relative offset from RJMP */
i = (insn & 0xfff) | (insn & 0x800 ? (-1 ^ 0xfff) : 0);
/* Convert offset to byte addressable mode */
i *= 2;
/* Destination address */
i += pc_beg + 10;
if (body_addr != (pc_beg + 10)/2)
break;
pc_offset += 2;
}
else if ((insn & 0xfe0e) == 0x940c)
{
/* Extract absolute PC address from JMP */
i = (((insn & 0x1) | ((insn & 0x1f0) >> 3) << 16)
| (extract_unsigned_integer (&prologue[vpc + 10], 2, byte_order)
& 0xffff));
/* Convert address to byte addressable mode */
i *= 2;
if (body_addr != (pc_beg + 12)/2)
break;
pc_offset += 4;
}
else
break;
/* Resolve offset (in words) from __prologue_saves__ symbol.
Which is a pushes count in `-mcall-prologues' mode */
num_pushes = AVR_MAX_PUSHES - (i - BMSYMBOL_VALUE_ADDRESS (msymbol)) / 2;
if (num_pushes > AVR_MAX_PUSHES)
{
fprintf_unfiltered (gdb_stderr, _("Num pushes too large: %d\n"),
num_pushes);
num_pushes = 0;
}
if (num_pushes)
{
int from;
info->saved_regs[AVR_FP_REGNUM + 1].addr = num_pushes;
if (num_pushes >= 2)
info->saved_regs[AVR_FP_REGNUM].addr = num_pushes - 1;
i = 0;
for (from = AVR_LAST_PUSHED_REGNUM + 1 - (num_pushes - 2);
from <= AVR_LAST_PUSHED_REGNUM; ++from)
info->saved_regs [from].addr = ++i;
}
info->size = loc_size + num_pushes;
info->prologue_type = AVR_PROLOGUE_CALL;
return pc_beg + pc_offset;
}
/* Scan for the beginning of the prologue for an interrupt or signal
function. Note that we have to set the prologue type here since the
third stage of the prologue may not be present (e.g. no saved registered
or changing of the SP register). */
if (1)
{
static const unsigned char img[] = {
0x78, 0x94, /* sei */
0x1f, 0x92, /* push r1 */
0x0f, 0x92, /* push r0 */
0x0f, 0xb6, /* in r0,0x3f SREG */
0x0f, 0x92, /* push r0 */
0x11, 0x24 /* clr r1 */
};
if (len >= sizeof (img)
&& memcmp (prologue, img, sizeof (img)) == 0)
{
info->prologue_type = AVR_PROLOGUE_INTR;
vpc += sizeof (img);
info->saved_regs[AVR_SREG_REGNUM].addr = 3;
info->saved_regs[0].addr = 2;
info->saved_regs[1].addr = 1;
info->size += 3;
}
else if (len >= sizeof (img) - 2
&& memcmp (img + 2, prologue, sizeof (img) - 2) == 0)
{
info->prologue_type = AVR_PROLOGUE_SIG;
vpc += sizeof (img) - 2;
info->saved_regs[AVR_SREG_REGNUM].addr = 3;
info->saved_regs[0].addr = 2;
info->saved_regs[1].addr = 1;
info->size += 2;
}
}
/* First stage of the prologue scanning.
Scan pushes (saved registers) */
for (; vpc < len; vpc += 2)
{
insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
if ((insn & 0xfe0f) == 0x920f) /* push rXX */
{
/* Bits 4-9 contain a mask for registers R0-R32. */
int regno = (insn & 0x1f0) >> 4;
info->size++;
info->saved_regs[regno].addr = info->size;
scan_stage = 1;
}
else
break;
}
gdb_assert (vpc < AVR_MAX_PROLOGUE_SIZE);
/* Handle static small stack allocation using rcall or push. */
while (scan_stage == 1 && vpc < len)
{
insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
if (insn == 0xd000) /* rcall .+0 */
{
info->size += gdbarch_tdep (gdbarch)->call_length;
vpc += 2;
}
else if (insn == 0x920f || insn == 0x921f) /* push r0 or push r1 */
{
info->size += 1;
vpc += 2;
}
else
break;
}
/* Second stage of the prologue scanning.
Scan:
in r28,__SP_L__
in r29,__SP_H__ */
if (scan_stage == 1 && vpc < len)
{
static const unsigned char img[] = {
0xcd, 0xb7, /* in r28,__SP_L__ */
0xde, 0xb7 /* in r29,__SP_H__ */
};
if (vpc + sizeof (img) < len
&& memcmp (prologue + vpc, img, sizeof (img)) == 0)
{
vpc += 4;
scan_stage = 2;
}
}
/* Third stage of the prologue scanning. (Really two stages).
Scan for:
sbiw r28,XX or subi r28,lo8(XX)
sbci r29,hi8(XX)
in __tmp_reg__,__SREG__
cli
out __SP_H__,r29
out __SREG__,__tmp_reg__
out __SP_L__,r28 */
if (scan_stage == 2 && vpc < len)
{
int locals_size = 0;
static const unsigned char img[] = {
0x0f, 0xb6, /* in r0,0x3f */
0xf8, 0x94, /* cli */
0xde, 0xbf, /* out 0x3e,r29 ; SPH */
0x0f, 0xbe, /* out 0x3f,r0 ; SREG */
0xcd, 0xbf /* out 0x3d,r28 ; SPL */
};
static const unsigned char img_sig[] = {
0xde, 0xbf, /* out 0x3e,r29 ; SPH */
0xcd, 0xbf /* out 0x3d,r28 ; SPL */
};
static const unsigned char img_int[] = {
0xf8, 0x94, /* cli */
0xde, 0xbf, /* out 0x3e,r29 ; SPH */
0x78, 0x94, /* sei */
0xcd, 0xbf /* out 0x3d,r28 ; SPL */
};
insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
if ((insn & 0xff30) == 0x9720) /* sbiw r28,XXX */
{
locals_size = (insn & 0xf) | ((insn & 0xc0) >> 2);
vpc += 2;
}
else if ((insn & 0xf0f0) == 0x50c0) /* subi r28,lo8(XX) */
{
locals_size = (insn & 0xf) | ((insn & 0xf00) >> 4);
vpc += 2;
insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
vpc += 2;
locals_size += ((insn & 0xf) | ((insn & 0xf00) >> 4)) << 8;
}
else
return pc_beg + vpc;
/* Scan the last part of the prologue. May not be present for interrupt
or signal handler functions, which is why we set the prologue type
when we saw the beginning of the prologue previously. */
if (vpc + sizeof (img_sig) < len
&& memcmp (prologue + vpc, img_sig, sizeof (img_sig)) == 0)
{
vpc += sizeof (img_sig);
}
else if (vpc + sizeof (img_int) < len
&& memcmp (prologue + vpc, img_int, sizeof (img_int)) == 0)
{
vpc += sizeof (img_int);
}
if (vpc + sizeof (img) < len
&& memcmp (prologue + vpc, img, sizeof (img)) == 0)
{
info->prologue_type = AVR_PROLOGUE_NORMAL;
vpc += sizeof (img);
}
info->size += locals_size;
/* Fall through. */
}
/* If we got this far, we could not scan the prologue, so just return the pc
of the frame plus an adjustment for argument move insns. */
for (; vpc < len; vpc += 2)
{
insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
if ((insn & 0xff00) == 0x0100) /* movw rXX, rYY */
continue;
else if ((insn & 0xfc00) == 0x2c00) /* mov rXX, rYY */
continue;
else
break;
}
return pc_beg + vpc;
}
static CORE_ADDR
avr_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
{
CORE_ADDR func_addr, func_end;
CORE_ADDR post_prologue_pc;
/* See what the symbol table says */
if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
return pc;
post_prologue_pc = skip_prologue_using_sal (gdbarch, func_addr);
if (post_prologue_pc != 0)
return std::max (pc, post_prologue_pc);
{
CORE_ADDR prologue_end = pc;
struct avr_unwind_cache info = {0};
struct trad_frame_saved_reg saved_regs[AVR_NUM_REGS];
info.saved_regs = saved_regs;
/* Need to run the prologue scanner to figure out if the function has a
prologue and possibly skip over moving arguments passed via registers
to other registers. */
prologue_end = avr_scan_prologue (gdbarch, func_addr, func_end, &info);
if (info.prologue_type != AVR_PROLOGUE_NONE)
return prologue_end;
}
/* Either we didn't find the start of this function (nothing we can do),
or there's no line info, or the line after the prologue is after
the end of the function (there probably isn't a prologue). */
return pc;
}
/* Not all avr devices support the BREAK insn. Those that don't should treat
it as a NOP. Thus, it should be ok. Since the avr is currently a remote
only target, this shouldn't be a problem (I hope). TRoth/2003-05-14 */
constexpr gdb_byte avr_break_insn [] = { 0x98, 0x95 };
typedef BP_MANIPULATION (avr_break_insn) avr_breakpoint;
/* Determine, for architecture GDBARCH, how a return value of TYPE
should be returned. If it is supposed to be returned in registers,
and READBUF is non-zero, read the appropriate value from REGCACHE,
and copy it into READBUF. If WRITEBUF is non-zero, write the value
from WRITEBUF into REGCACHE. */
static enum return_value_convention
avr_return_value (struct gdbarch *gdbarch, struct value *function,
struct type *valtype, struct regcache *regcache,
gdb_byte *readbuf, const gdb_byte *writebuf)
{
int i;
/* Single byte are returned in r24.
Otherwise, the MSB of the return value is always in r25, calculate which
register holds the LSB. */
int lsb_reg;
if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
|| TYPE_CODE (valtype) == TYPE_CODE_UNION
|| TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
&& TYPE_LENGTH (valtype) > 8)
return RETURN_VALUE_STRUCT_CONVENTION;
if (TYPE_LENGTH (valtype) <= 2)
lsb_reg = 24;
else if (TYPE_LENGTH (valtype) <= 4)
lsb_reg = 22;
else if (TYPE_LENGTH (valtype) <= 8)
lsb_reg = 18;
else
gdb_assert_not_reached ("unexpected type length");
if (writebuf != NULL)
{
for (i = 0; i < TYPE_LENGTH (valtype); i++)
regcache->cooked_write (lsb_reg + i, writebuf + i);
}
if (readbuf != NULL)
{
for (i = 0; i < TYPE_LENGTH (valtype); i++)
regcache->cooked_read (lsb_reg + i, readbuf + i);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
/* Put here the code to store, into fi->saved_regs, the addresses of
the saved registers of frame described by FRAME_INFO. This
includes special registers such as pc and fp saved in special ways
in the stack frame. sp is even more special: the address we return
for it IS the sp for the next frame. */
static struct avr_unwind_cache *
avr_frame_unwind_cache (struct frame_info *this_frame,
void **this_prologue_cache)
{
CORE_ADDR start_pc, current_pc;
ULONGEST prev_sp;
ULONGEST this_base;
struct avr_unwind_cache *info;
struct gdbarch *gdbarch;
struct gdbarch_tdep *tdep;
int i;
if (*this_prologue_cache)
return (struct avr_unwind_cache *) *this_prologue_cache;
info = FRAME_OBSTACK_ZALLOC (struct avr_unwind_cache);
*this_prologue_cache = info;
info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
info->size = 0;
info->prologue_type = AVR_PROLOGUE_NONE;
start_pc = get_frame_func (this_frame);
current_pc = get_frame_pc (this_frame);
if ((start_pc > 0) && (start_pc <= current_pc))
avr_scan_prologue (get_frame_arch (this_frame),