This repository hosts a series of patches implementing a RISC-V backend for LLVM. For more information, see:
- September RISC-V LLVM status update
- The most recent status update to the LLVM mailing list
- The lowRISC RISC-V LLVM status page
- The initial RFC for more about the implementation approach being taken with this port.
Our intent is that development and code review primarily occurs upstream on LLVM infrastructure. However, there is value is maintaining the RISC-V backend implementation as a set of clean patches. These will be continually rebased with the intention that they provide a useful reference for anybody starting a new LLVM backend or who wants to better understand backend implementation.
Patches are being submitted for review and eventual merging in to upstream LLVM. Our intent is to encourage potential contributors to engage directly with upstream LLVM development, rather than creating a new 'downstream'. Unfortunately, collaboration in this way remains somewhat difficult while a large portion of this patchset remains unreviewed and uncommitted upstream. Helping to review patches submitted upstream is a fantastic way to help out.
The current patchset allows the entirety of the GCC torture suite to compile and run for {RV32I, RV32IM, RV32IF} at all optimisation levels (1390/1390 compile and run without error). There are currently 3 compilation failures across O0, O1, O2, O3 and Os for RV32IFD. Additionally, all torture suite tests compile and run for RV64I at O1, O2, O3, and Os (there is one compilation failure at O0). MC-layer support is present for RV32IMAFD+RV64IMAFD, and codegen support for RV32IMFD and RV64I. See the lowRISC RISC-V LLVM status page for more details.
As well as the obvious implementation tasks, it is also our intent to augment this patchset with copious documentation. The initial draft of this documentation for the MC layer will be published by early September.
A number of TODO items are described in this repo's issues page. These issues should help to co-ordinate efforts between different interested parties.
Our aim is that RISC-V is the cleanest and most documented LLVM backend. As well as benefiting the wider LLVM community, this will make it substantially easier for research groups and hobbyists to explore hardware/software co-design with RISC-V.
Our lowRISC project is working to produce a completely open source System-on-Chip implementing the RISC-V instruction set architecture. One of the features we are pursuing is tagged memory. This repository will eventually host compiler support for that feature, although this may need time to mature before being ready to upstream and so may be developed in a separate branch.
This work has so far produced a number of request for comment (RFC) threads on the LLVM mailing list:
- [RFC] 'Review corner' section in LLVM Weekly
- RFC/bikeshedding: Separation of instruction and pattern definitions in LLVM backends
- [RFC] The future of the
va_arginstruction - RFC: Setting MachineInstr flags through storeRegToStackSlot
- RFC: Improving the experience of first-time contributors
- [RFC] RISC-V backend
All patches are under the LLVM license.
The docs/ directory is under the Creative Commons CC-BY-SA 4.0 license https://creativecommons.org/licenses/by-sa/4.0/.
There are two things to note:
- This repository currently serves a dual purpose - providing a clean and constantly rebased "perfect" history of the full RISC-V patchset, as well as being a way to grab all patches in one go, including those that haven't yet been committed upstream. As more and more patches are committed upstream, this repository will become mainly interesting as a reference on how to implement an LLVM backend, and aid in understanding the RISC-V backend. In the near future, the answer to "how can I test out the latest RISC-V LLVM support?" will be "check out the latest upstream LLVM repository and build it".
- This LLVM and Clang work is not quite at a stage where end-users are likely to find it useful. However, building and trying it out is a great first step towards contributing to the development effort.
You might build LLVM and Clang with these patches applied by doing something like the below. See the LLVM documentation for more general guidance. You will need ~7GiB space for a debug build of LLVM+Clang.
export REV=322498 # Check the most recent commit on this repo to ensure this is correct
svn co http://llvm.org/svn/llvm-project/llvm/trunk@$REV llvm
cd llvm/tools
svn co http://llvm.org/svn/llvm-project/cfe/trunk@$REV clang
cd ..
for P in /path/to/riscv-llvm/*.patch; do patch -p1 < $P; done
for P in /patch/to/riscv-llvm/clang/*.patch; do patch -d tools/clang -p1 < $P; done
mkdir build
cd build
cmake -G Ninja -DCMAKE_BUILD_TYPE="Debug" \
-DBUILD_SHARED_LIBS=True -DLLVM_USE_SPLIT_DWARF=True \
-DLLVM_OPTIMIZED_TABLEGEN=True \
-DLLVM_BUILD_TESTS=True \
-DDEFAULT_SYSROOT="/path/to/riscv-gcc-install-path/riscv32-unknown-elf" \
-DGCC_INSTALL_PREFIX="/path/to/riscv-gcc-install-path" \
-DLLVM_DEFAULT_TARGET_TRIPLE="riscv32-unknown-elf" \
-DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD="RISCV" ../
cmake --build .
You may then want to run tests:
./bin/llvm-lit -s -i -v test/MC/RISCV # RISC-V MC-layer tests
./bin/llvm-lit -s -i -v test/CodeGen/RISCV # RISC-V CodeGen tests
./bin/llvm-lit -s -i -v test # All tests
This work has been led by Alex Bradbury at lowRISC CIC, a not for profit company. If your employer would like to see my work on RISC-V LLVM to be sustained or to accelerate, contributing sponsorship and/or development time is the best way to do that. Please contact asb@lowrisc.org if you would like to discuss sponsorship, or have questions about code contributions that you can't discuss on the LLVM mailing list.
Thank you to everyone who has contributed review comments, suggestions, or code to this patchset and related support patches: Sameer Abu Asal, Chandler Carruth, Shiva Chen, Chih-Mao Chen, Kito Cheng, David Chisnall, Simon Cook, David Craven, Hal Finkel, Eli Friedman, Ondrej Glasnak, Mandeep Singh Grang, David Kipping, James Y Knight, David Majnemer, Ed Maste, John McCall, Dylan McKay, Azharuddin Mohammed, Tim Northover, Krzysztof Parzyszek, Ana Pazos, Jordy Portman, Philip Reames, John Russo, Colin Schmidt, Ed Schouten, Pavel Šnobl, Ulrich Weigand, Mario Werner, Eugene Zalenko, Florian Zeitz, Leslie Zhai.