From 20ea859f87119423731809942db7f2b78fd1dc05 Mon Sep 17 00:00:00 2001
From: Alex Crichton <alex@alexcrichton.com>
Date: Wed, 11 Jun 2025 16:46:25 -0700
Subject: [PATCH] x64: Remove `MovImmM` and `MovRM`

This commit removes these two instruction variants although nothing new
was added to the new assembler as all the necessary instructions were
already supported.
---
 cranelift/codegen/src/isa/x64/abi.rs          |  17 +-
 cranelift/codegen/src/isa/x64/inst.isle       |  24 +-
 cranelift/codegen/src/isa/x64/inst/emit.rs    |  94 +---
 .../codegen/src/isa/x64/inst/emit_tests.rs    | 448 ------------------
 cranelift/codegen/src/isa/x64/inst/mod.rs     |  61 +--
 cranelift/codegen/src/isa/x64/pcc.rs          |   6 -
 cranelift/codegen/src/isle_prelude.rs         |   4 +
 cranelift/codegen/src/prelude.isle            |   5 +-
 .../filetests/isa/x64/atomic-128.clif         |  28 +-
 .../filetests/isa/x64/call-conv.clif          |  30 +-
 .../isa/x64/call-with-retval-insts.clif       |  10 +-
 .../filetests/isa/x64/exceptions.clif         |  30 +-
 .../filetests/filetests/isa/x64/fastcall.clif |   4 +-
 .../filetests/isa/x64/fuzzbug-60035.clif      |   2 +-
 .../filetests/filetests/isa/x64/i128.clif     |  42 +-
 .../filetests/isa/x64/immediates.clif         |   8 +-
 .../isa/x64/inline-probestack-large.clif      |   6 +-
 .../filetests/isa/x64/inline-probestack.clif  |   6 +-
 .../filetests/filetests/isa/x64/load-op.clif  |   2 +-
 .../filetests/isa/x64/pinned-reg.clif         |   2 +-
 .../isa/x64/return-call-indirect.clif         |  82 ++--
 .../filetests/isa/x64/return-call.clif        |  92 ++--
 .../filetests/isa/x64/stack_switch.clif       |  70 +--
 .../filetests/isa/x64/stackslot.clif          |   4 +-
 .../filetests/isa/x64/store-f16-f128.clif     |   2 +-
 .../filetests/isa/x64/store-imm.clif          |  14 +-
 .../filetests/isa/x64/store-small-vector.clif |   2 +-
 .../filetests/isa/x64/struct-arg.clif         |   6 +-
 .../filetests/isa/x64/struct-ret.clif         |   6 +-
 .../filetests/isa/x64/tail-call-conv.clif     | 266 +++++------
 .../filetests/isa/x64/user_stack_maps.clif    |  40 +-
 .../filetests/filetests/isa/x64/winch.clif    |  60 +--
 ...no_spectre_i8_access_0xffff0000_offset.wat |  17 +-
 tests/disas/winch/x64/store/oob.wat           |  12 +-
 winch/codegen/src/isa/x64/asm.rs              |  33 +-
 35 files changed, 502 insertions(+), 1033 deletions(-)

diff --git a/cranelift/codegen/src/isa/x64/abi.rs b/cranelift/codegen/src/isa/x64/abi.rs
index 41c24eb49d25..cc7306912af6 100644
--- a/cranelift/codegen/src/isa/x64/abi.rs
+++ b/cranelift/codegen/src/isa/x64/abi.rs
@@ -662,25 +662,18 @@ impl ABIMachineSpec for X64ABIMachineSpec {
 
             // Move the saved frame pointer down by `incoming_args_diff`.
             let addr = Amode::imm_reg(incoming_args_diff, regs::rsp());
-            let r11 = Writable::from_reg(regs::r11());
+            let r11 = Writable::from_reg(Gpr::unwrap_new(regs::r11()));
             let inst = asm::inst::movq_rm::new(r11, addr).into();
             insts.push(Inst::External { inst });
-            insts.push(Inst::mov_r_m(
-                OperandSize::Size64,
-                regs::r11(),
-                Amode::imm_reg(0, regs::rsp()),
-            ));
+            let inst = asm::inst::movq_mr::new(Amode::imm_reg(0, regs::rsp()), r11.to_reg()).into();
+            insts.push(Inst::External { inst });
 
             // Move the saved return address down by `incoming_args_diff`.
             let addr = Amode::imm_reg(incoming_args_diff + 8, regs::rsp());
-            let r11 = Writable::from_reg(regs::r11());
             let inst = asm::inst::movq_rm::new(r11, addr).into();
             insts.push(Inst::External { inst });
-            insts.push(Inst::mov_r_m(
-                OperandSize::Size64,
-                regs::r11(),
-                Amode::imm_reg(8, regs::rsp()),
-            ));
+            let inst = asm::inst::movq_mr::new(Amode::imm_reg(8, regs::rsp()), r11.to_reg()).into();
+            insts.push(Inst::External { inst });
         }
 
         // We need to factor `incoming_args_diff` into the offset upward here, as we have grown
diff --git a/cranelift/codegen/src/isa/x64/inst.isle b/cranelift/codegen/src/isa/x64/inst.isle
index 950180d24d62..457d7c109366 100644
--- a/cranelift/codegen/src/isa/x64/inst.isle
+++ b/cranelift/codegen/src/isa/x64/inst.isle
@@ -59,16 +59,6 @@
                              (dst WritableGpr)
                              (size OperandSize))
 
-       ;; Immediate store.
-       (MovImmM (size OperandSize)
-		(simm32 i32)
-		(dst SyntheticAmode))
-
-       ;; Integer stores: mov (b w l q) reg addr.
-       (MovRM (size OperandSize) ;; 1, 2, 4, or 8
-              (src Gpr)
-              (dst SyntheticAmode))
-
        ;; Integer comparisons/tests: cmp or test (b w l q) (reg addr imm) reg.
        (CmpRmiR (size OperandSize) ;; 1, 2, 4, or 8
                 (opcode CmpOpcode)
@@ -2083,14 +2073,16 @@
 (decl x64_movrm (Type SyntheticAmode Gpr) SideEffectNoResult)
 (spec (x64_movrm ty addr data)
        (provide (= result (store_effect (extract 79 64 addr) ty (conv_to ty data) (extract 63 0 addr)))))
-(rule (x64_movrm ty addr data)
-      (let ((size OperandSize (raw_operand_size_of_type ty)))
-        (SideEffectNoResult.Inst (MInst.MovRM size data addr))))
+(rule (x64_movrm $I8 addr data) (x64_movb_mr_mem addr data))
+(rule (x64_movrm $I16 addr data) (x64_movw_mr_mem addr data))
+(rule (x64_movrm $I32 addr data) (x64_movl_mr_mem addr data))
+(rule (x64_movrm $I64 addr data) (x64_movq_mr_mem addr data))
 
 (decl x64_movimm_m (Type SyntheticAmode i32) SideEffectNoResult)
-(rule (x64_movimm_m ty addr imm)
-      (let ((size OperandSize (raw_operand_size_of_type ty)))
-        (SideEffectNoResult.Inst (MInst.MovImmM size imm addr))))
+(rule (x64_movimm_m $I8 addr (i8_try_from_i32 imm)) (x64_movb_mi_mem addr (i8_as_u8 imm)))
+(rule (x64_movimm_m $I16 addr (i16_try_from_i32 imm)) (x64_movw_mi_mem addr (i16_as_u16 imm)))
+(rule (x64_movimm_m $I32 addr imm) (x64_movl_mi_mem addr (i32_as_u32 imm)))
+(rule (x64_movimm_m $I64 addr imm) (x64_movq_mi_sxl_mem addr imm))
 
 (decl xmm_movrm_vex (AvxOpcode SyntheticAmode Xmm) SideEffectNoResult)
 (rule (xmm_movrm_vex op addr data)
diff --git a/cranelift/codegen/src/isa/x64/inst/emit.rs b/cranelift/codegen/src/isa/x64/inst/emit.rs
index d4b36eeb21f7..1f325ac81856 100644
--- a/cranelift/codegen/src/isa/x64/inst/emit.rs
+++ b/cranelift/codegen/src/isa/x64/inst/emit.rs
@@ -288,32 +288,6 @@ pub(crate) fn emit(
             }
         }
 
-        Inst::MovImmM { size, simm32, dst } => {
-            let dst = &dst.finalize(state.frame_layout(), sink).clone();
-            let default_rex = RexFlags::clear_w();
-            let default_opcode = 0xC7;
-            let bytes = size.to_bytes();
-            let prefix = LegacyPrefixes::None;
-
-            let (opcode, rex, size, prefix) = match *size {
-                // In the 8-bit case, we don't need to enforce REX flags via
-                // `always_emit_if_8bit_needed()` since the destination
-                // operand is a memory operand, not a possibly 8-bit register.
-                OperandSize::Size8 => (0xC6, default_rex, bytes, prefix),
-                OperandSize::Size16 => (0xC7, default_rex, bytes, LegacyPrefixes::_66),
-                OperandSize::Size64 => (default_opcode, RexFlags::from(*size), bytes, prefix),
-
-                _ => (default_opcode, default_rex, bytes, prefix),
-            };
-
-            // 8-bit C6 /0 ib
-            // 16-bit 0x66 C7 /0 iw
-            // 32-bit C7 /0 id
-            // 64-bit REX.W C7 /0 id
-            emit_std_enc_mem(sink, prefix, opcode, 1, /*subopcode*/ 0, dst, rex, 0);
-            emit_simm(sink, size, *simm32 as u32);
-        }
-
         Inst::MovRR { size, src, dst } => {
             let src = src.to_reg();
             let dst = dst.to_reg().to_reg();
@@ -429,32 +403,6 @@ pub(crate) fn emit(
             };
         }
 
-        Inst::MovRM { size, src, dst } => {
-            let src = src.to_reg();
-            let dst = &dst.finalize(state.frame_layout(), sink).clone();
-
-            let prefix = match size {
-                OperandSize::Size16 => LegacyPrefixes::_66,
-                _ => LegacyPrefixes::None,
-            };
-
-            let opcode = match size {
-                OperandSize::Size8 => 0x88,
-                _ => 0x89,
-            };
-
-            // This is one of the few places where the presence of a
-            // redundant REX prefix changes the meaning of the
-            // instruction.
-            let rex = RexFlags::from((*size, src));
-
-            //  8-bit: MOV r8, r/m8 is (REX.W==0) 88 /r
-            // 16-bit: MOV r16, r/m16 is 66 (REX.W==0) 89 /r
-            // 32-bit: MOV r32, r/m32 is (REX.W==0) 89 /r
-            // 64-bit: MOV r64, r/m64 is (REX.W==1) 89 /r
-            emit_std_reg_mem(sink, prefix, opcode, 1, src, dst, rex, 0);
-        }
-
         Inst::CmpRmiR {
             size,
             src1: reg_g,
@@ -664,12 +612,12 @@ pub(crate) fn emit(
             // Probe the stack! We don't use Inst::gen_store_stack here because we need a predictable
             // instruction size.
             // mov  [rsp], rsp
-            let inst = Inst::mov_r_m(
-                OperandSize::Size32, // Use Size32 since it saves us one byte
-                regs::rsp(),
-                SyntheticAmode::Real(Amode::imm_reg(0, regs::rsp())),
-            );
-            inst.emit(sink, info, state);
+            let inst = asm::inst::movl_mr::new(
+                Amode::imm_reg(0, regs::rsp()),
+                Gpr::unwrap_new(regs::rsp()),
+            )
+            .into();
+            Inst::External { inst }.emit(sink, info, state);
 
             // Compare and jump if we are not done yet
             // cmp  rsp, tmp_reg
@@ -916,11 +864,12 @@ pub(crate) fn emit(
                 let inst = asm::inst::movq_rm::new(tmp1, addr).into();
                 Inst::External { inst }.emit(sink, info, state);
 
-                let inst = Inst::MovRM {
-                    size: OperandSize::Size64,
-                    src: Gpr::new(reg).unwrap(),
-                    dst: Amode::imm_reg(offset, **store_context_ptr).into(),
-                };
+                let inst = asm::inst::movq_mr::new(
+                    Amode::imm_reg(offset, **store_context_ptr),
+                    Gpr::new(reg).unwrap(),
+                )
+                .into();
+                let inst = Inst::External { inst };
                 emit(&inst, sink, info, state);
 
                 let dst = Writable::from_reg(reg);
@@ -947,11 +896,12 @@ pub(crate) fn emit(
             let inst = Inst::lea(amode, tmp2.map(Reg::from));
             inst.emit(sink, info, state);
 
-            let inst = Inst::MovRM {
-                size: OperandSize::Size64,
-                src: tmp2.to_reg(),
-                dst: Amode::imm_reg(pc_offset, **store_context_ptr).into(),
-            };
+            let inst = asm::inst::movq_mr::new(
+                Amode::imm_reg(pc_offset, **store_context_ptr),
+                tmp2.to_reg(),
+            )
+            .into();
+            let inst = Inst::External { inst };
             emit(&inst, sink, info, state);
 
             let inst = Inst::JmpUnknown {
@@ -3298,12 +3248,12 @@ fn emit_return_call_common_sequence<T>(
         let addr = Amode::imm_reg(0, regs::rsp());
         let inst = asm::inst::movq_rm::new(tmp, addr).into();
         Inst::External { inst }.emit(sink, info, state);
-        Inst::mov_r_m(
-            OperandSize::Size64,
-            tmp.to_reg(),
+        let inst = asm::inst::movq_mr::new(
             Amode::imm_reg(i32::try_from(incoming_args_diff).unwrap(), regs::rsp()),
+            Gpr::unwrap_new(tmp.to_reg()),
         )
-        .emit(sink, info, state);
+        .into();
+        Inst::External { inst }.emit(sink, info, state);
 
         // Increment the stack pointer to shrink the argument area for the new
         // call.
diff --git a/cranelift/codegen/src/isa/x64/inst/emit_tests.rs b/cranelift/codegen/src/isa/x64/inst/emit_tests.rs
index 757b7977b3d1..184a0aa34852 100644
--- a/cranelift/codegen/src/isa/x64/inst/emit_tests.rs
+++ b/cranelift/codegen/src/isa/x64/inst/emit_tests.rs
@@ -282,454 +282,6 @@ fn test_x64_emit() {
         "lea     label0(%rip), %rdi",
     ));
 
-    // Mov_Imm_M.
-
-    insns.push((
-        Inst::MovImmM {
-            size: OperandSize::Size8,
-            simm32: i8::MIN as i32,
-            dst: Amode::imm_reg(99, rax).into(),
-        },
-        "C6406380",
-        "movb    $-128, 99(%rax)",
-    ));
-
-    insns.push((
-        Inst::MovImmM {
-            size: OperandSize::Size8,
-            simm32: i8::MAX as i32,
-            dst: Amode::imm_reg(99, r8).into(),
-        },
-        "41C640637F",
-        "movb    $127, 99(%r8)",
-    ));
-
-    insns.push((
-        Inst::MovImmM {
-            size: OperandSize::Size16,
-            simm32: i16::MIN as i32,
-            dst: Amode::imm_reg(99, rcx).into(),
-        },
-        "66C741630080",
-        "movw    $-32768, 99(%rcx)",
-    ));
-
-    insns.push((
-        Inst::MovImmM {
-            size: OperandSize::Size16,
-            simm32: i16::MAX as i32,
-            dst: Amode::imm_reg(99, r9).into(),
-        },
-        "6641C74163FF7F",
-        "movw    $32767, 99(%r9)",
-    ));
-
-    insns.push((
-        Inst::MovImmM {
-            size: OperandSize::Size32,
-            simm32: i32::MIN,
-            dst: Amode::imm_reg(99, rdx).into(),
-        },
-        "C7426300000080",
-        "movl    $-2147483648, 99(%rdx)",
-    ));
-
-    insns.push((
-        Inst::MovImmM {
-            size: OperandSize::Size32,
-            simm32: i32::MAX,
-            dst: Amode::imm_reg(99, r10).into(),
-        },
-        "41C74263FFFFFF7F",
-        "movl    $2147483647, 99(%r10)",
-    ));
-
-    insns.push((
-        Inst::MovImmM {
-            size: OperandSize::Size64,
-            simm32: i32::MIN,
-            dst: Amode::imm_reg(99, rbx).into(),
-        },
-        "48C7436300000080",
-        "movq    $-2147483648, 99(%rbx)",
-    ));
-
-    insns.push((
-        Inst::MovImmM {
-            size: OperandSize::Size64,
-            simm32: i32::MAX,
-            dst: Amode::imm_reg(99, r11).into(),
-        },
-        "49C74363FFFFFF7F",
-        "movq    $2147483647, 99(%r11)",
-    ));
-
-    insns.push((
-        Inst::MovImmM {
-            size: OperandSize::Size8,
-            simm32: 0i32,
-            dst: Amode::imm_reg(99, rsp).into(),
-        },
-        "C644246300",
-        "movb    $0, 99(%rsp)",
-    ));
-
-    insns.push((
-        Inst::MovImmM {
-            size: OperandSize::Size16,
-            simm32: 0i32,
-            dst: Amode::imm_reg(99, r12).into(),
-        },
-        "6641C74424630000",
-        "movw    $0, 99(%r12)",
-    ));
-
-    insns.push((
-        Inst::MovImmM {
-            size: OperandSize::Size32,
-            simm32: 0i32,
-            dst: Amode::imm_reg(99, rbp).into(),
-        },
-        "C7456300000000",
-        "movl    $0, 99(%rbp)",
-    ));
-
-    insns.push((
-        Inst::MovImmM {
-            size: OperandSize::Size64,
-            simm32: 0i32,
-            dst: Amode::imm_reg(99, r13).into(),
-        },
-        "49C7456300000000",
-        "movq    $0, 99(%r13)",
-    ));
-
-    // ========================================================
-    // Mov_R_M.  Byte stores are tricky.  Check everything carefully.
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size64, rax, Amode::imm_reg(99, rdi)),
-        "48894763",
-        "movq    %rax, 99(%rdi)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size64, rbx, Amode::imm_reg(99, r8)),
-        "49895863",
-        "movq    %rbx, 99(%r8)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size64, rcx, Amode::imm_reg(99, rsi)),
-        "48894E63",
-        "movq    %rcx, 99(%rsi)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size64, rdx, Amode::imm_reg(99, r9)),
-        "49895163",
-        "movq    %rdx, 99(%r9)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size64, rsi, Amode::imm_reg(99, rax)),
-        "48897063",
-        "movq    %rsi, 99(%rax)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size64, rdi, Amode::imm_reg(99, r15)),
-        "49897F63",
-        "movq    %rdi, 99(%r15)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size64, rsp, Amode::imm_reg(99, rcx)),
-        "48896163",
-        "movq    %rsp, 99(%rcx)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size64, rbp, Amode::imm_reg(99, r14)),
-        "49896E63",
-        "movq    %rbp, 99(%r14)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size64, r8, Amode::imm_reg(99, rdi)),
-        "4C894763",
-        "movq    %r8, 99(%rdi)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size64, r9, Amode::imm_reg(99, r8)),
-        "4D894863",
-        "movq    %r9, 99(%r8)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size64, r10, Amode::imm_reg(99, rsi)),
-        "4C895663",
-        "movq    %r10, 99(%rsi)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size64, r11, Amode::imm_reg(99, r9)),
-        "4D895963",
-        "movq    %r11, 99(%r9)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size64, r12, Amode::imm_reg(99, rax)),
-        "4C896063",
-        "movq    %r12, 99(%rax)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size64, r13, Amode::imm_reg(99, r15)),
-        "4D896F63",
-        "movq    %r13, 99(%r15)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size64, r14, Amode::imm_reg(99, rcx)),
-        "4C897163",
-        "movq    %r14, 99(%rcx)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size64, r15, Amode::imm_reg(99, r14)),
-        "4D897E63",
-        "movq    %r15, 99(%r14)",
-    ));
-    //
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size32, rax, Amode::imm_reg(99, rdi)),
-        "894763",
-        "movl    %eax, 99(%rdi)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size32, rbx, Amode::imm_reg(99, r8)),
-        "41895863",
-        "movl    %ebx, 99(%r8)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size32, rcx, Amode::imm_reg(99, rsi)),
-        "894E63",
-        "movl    %ecx, 99(%rsi)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size32, rdx, Amode::imm_reg(99, r9)),
-        "41895163",
-        "movl    %edx, 99(%r9)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size32, rsi, Amode::imm_reg(99, rax)),
-        "897063",
-        "movl    %esi, 99(%rax)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size32, rdi, Amode::imm_reg(99, r15)),
-        "41897F63",
-        "movl    %edi, 99(%r15)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size32, rsp, Amode::imm_reg(99, rcx)),
-        "896163",
-        "movl    %esp, 99(%rcx)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size32, rbp, Amode::imm_reg(99, r14)),
-        "41896E63",
-        "movl    %ebp, 99(%r14)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size32, r8, Amode::imm_reg(99, rdi)),
-        "44894763",
-        "movl    %r8d, 99(%rdi)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size32, r9, Amode::imm_reg(99, r8)),
-        "45894863",
-        "movl    %r9d, 99(%r8)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size32, r10, Amode::imm_reg(99, rsi)),
-        "44895663",
-        "movl    %r10d, 99(%rsi)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size32, r11, Amode::imm_reg(99, r9)),
-        "45895963",
-        "movl    %r11d, 99(%r9)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size32, r12, Amode::imm_reg(99, rax)),
-        "44896063",
-        "movl    %r12d, 99(%rax)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size32, r13, Amode::imm_reg(99, r15)),
-        "45896F63",
-        "movl    %r13d, 99(%r15)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size32, r14, Amode::imm_reg(99, rcx)),
-        "44897163",
-        "movl    %r14d, 99(%rcx)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size32, r15, Amode::imm_reg(99, r14)),
-        "45897E63",
-        "movl    %r15d, 99(%r14)",
-    ));
-    //
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size16, rax, Amode::imm_reg(99, rdi)),
-        "66894763",
-        "movw    %ax, 99(%rdi)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size16, rbx, Amode::imm_reg(99, r8)),
-        "6641895863",
-        "movw    %bx, 99(%r8)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size16, rcx, Amode::imm_reg(99, rsi)),
-        "66894E63",
-        "movw    %cx, 99(%rsi)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size16, rdx, Amode::imm_reg(99, r9)),
-        "6641895163",
-        "movw    %dx, 99(%r9)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size16, rsi, Amode::imm_reg(99, rax)),
-        "66897063",
-        "movw    %si, 99(%rax)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size16, rdi, Amode::imm_reg(99, r15)),
-        "6641897F63",
-        "movw    %di, 99(%r15)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size16, rsp, Amode::imm_reg(99, rcx)),
-        "66896163",
-        "movw    %sp, 99(%rcx)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size16, rbp, Amode::imm_reg(99, r14)),
-        "6641896E63",
-        "movw    %bp, 99(%r14)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size16, r8, Amode::imm_reg(99, rdi)),
-        "6644894763",
-        "movw    %r8w, 99(%rdi)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size16, r9, Amode::imm_reg(99, r8)),
-        "6645894863",
-        "movw    %r9w, 99(%r8)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size16, r10, Amode::imm_reg(99, rsi)),
-        "6644895663",
-        "movw    %r10w, 99(%rsi)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size16, r11, Amode::imm_reg(99, r9)),
-        "6645895963",
-        "movw    %r11w, 99(%r9)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size16, r12, Amode::imm_reg(99, rax)),
-        "6644896063",
-        "movw    %r12w, 99(%rax)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size16, r13, Amode::imm_reg(99, r15)),
-        "6645896F63",
-        "movw    %r13w, 99(%r15)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size16, r14, Amode::imm_reg(99, rcx)),
-        "6644897163",
-        "movw    %r14w, 99(%rcx)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size16, r15, Amode::imm_reg(99, r14)),
-        "6645897E63",
-        "movw    %r15w, 99(%r14)",
-    ));
-    //
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size8, rax, Amode::imm_reg(99, rdi)),
-        "884763",
-        "movb    %al, 99(%rdi)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size8, rbx, Amode::imm_reg(99, r8)),
-        "41885863",
-        "movb    %bl, 99(%r8)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size8, rcx, Amode::imm_reg(99, rsi)),
-        "884E63",
-        "movb    %cl, 99(%rsi)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size8, rdx, Amode::imm_reg(99, r9)),
-        "41885163",
-        "movb    %dl, 99(%r9)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size8, rsi, Amode::imm_reg(99, rax)),
-        "40887063",
-        "movb    %sil, 99(%rax)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size8, rdi, Amode::imm_reg(99, r15)),
-        "41887F63",
-        "movb    %dil, 99(%r15)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size8, rsp, Amode::imm_reg(99, rcx)),
-        "40886163",
-        "movb    %spl, 99(%rcx)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size8, rbp, Amode::imm_reg(99, r14)),
-        "41886E63",
-        "movb    %bpl, 99(%r14)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size8, r8, Amode::imm_reg(99, rdi)),
-        "44884763",
-        "movb    %r8b, 99(%rdi)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size8, r9, Amode::imm_reg(99, r8)),
-        "45884863",
-        "movb    %r9b, 99(%r8)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size8, r10, Amode::imm_reg(99, rsi)),
-        "44885663",
-        "movb    %r10b, 99(%rsi)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size8, r11, Amode::imm_reg(99, r9)),
-        "45885963",
-        "movb    %r11b, 99(%r9)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size8, r12, Amode::imm_reg(99, rax)),
-        "44886063",
-        "movb    %r12b, 99(%rax)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size8, r13, Amode::imm_reg(99, r15)),
-        "45886F63",
-        "movb    %r13b, 99(%r15)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size8, r14, Amode::imm_reg(99, rcx)),
-        "44887163",
-        "movb    %r14b, 99(%rcx)",
-    ));
-    insns.push((
-        Inst::mov_r_m(OperandSize::Size8, r15, Amode::imm_reg(99, r14)),
-        "45887E63",
-        "movb    %r15b, 99(%r14)",
-    ));
-
     // ========================================================
     // CmpRMIR
     insns.push((
diff --git a/cranelift/codegen/src/isa/x64/inst/mod.rs b/cranelift/codegen/src/isa/x64/inst/mod.rs
index f32cd4a75505..9d596123a19e 100644
--- a/cranelift/codegen/src/isa/x64/inst/mod.rs
+++ b/cranelift/codegen/src/isa/x64/inst/mod.rs
@@ -102,8 +102,6 @@ impl Inst {
             | Inst::LockCmpxchg { .. }
             | Inst::LockXadd { .. }
             | Inst::Xchg { .. }
-            | Inst::MovImmM { .. }
-            | Inst::MovRM { .. }
             | Inst::MovRR { .. }
             | Inst::MovFromPReg { .. }
             | Inst::MovToPReg { .. }
@@ -338,15 +336,6 @@ impl Inst {
         Inst::External { inst }
     }
 
-    pub(crate) fn mov_r_m(size: OperandSize, src: Reg, dst: impl Into<SyntheticAmode>) -> Inst {
-        debug_assert!(src.class() == RegClass::Int);
-        Inst::MovRM {
-            size,
-            src: Gpr::unwrap_new(src),
-            dst: dst.into(),
-        }
-    }
-
     pub(crate) fn lea(addr: impl Into<SyntheticAmode>, dst: Writable<Reg>) -> Inst {
         debug_assert!(dst.to_reg().class() == RegClass::Int);
         Inst::LoadEffectiveAddress {
@@ -484,12 +473,21 @@ impl Inst {
     /// Choose which instruction to use for storing a register value to memory.
     pub(crate) fn store(ty: Type, from_reg: Reg, to_addr: impl Into<SyntheticAmode>) -> Inst {
         let rc = from_reg.class();
-        match rc {
-            RegClass::Int => Inst::mov_r_m(OperandSize::from_ty(ty), from_reg, to_addr),
+        let to_addr = to_addr.into();
+        let inst = match rc {
+            RegClass::Int => {
+                let from_reg = Gpr::unwrap_new(from_reg);
+                match ty {
+                    types::I8 => asm::inst::movb_mr::new(to_addr, from_reg).into(),
+                    types::I16 => asm::inst::movw_mr::new(to_addr, from_reg).into(),
+                    types::I32 => asm::inst::movl_mr::new(to_addr, from_reg).into(),
+                    types::I64 => asm::inst::movq_mr::new(to_addr, from_reg).into(),
+                    _ => unreachable!(),
+                }
+            }
             RegClass::Float => {
-                let to_addr = to_addr.into();
                 let from_reg = Xmm::new(from_reg).unwrap();
-                let inst = match ty {
+                match ty {
                     types::F16 | types::I8X2 => {
                         panic!("storing a f16 or i8x2 requires multiple instructions")
                     }
@@ -505,11 +503,11 @@ impl Inst {
                         asm::inst::movdqu_b::new(to_addr, from_reg).into()
                     }
                     _ => unimplemented!("unable to store type: {}", ty),
-                };
-                Inst::External { inst }
+                }
             }
             RegClass::Vector => unreachable!(),
-        }
+        };
+        Inst::External { inst }
     }
 }
 
@@ -907,19 +905,6 @@ impl PrettyPrint for Inst {
                 }
             }
 
-            Inst::MovImmM { size, simm32, dst } => {
-                let dst = dst.pretty_print(size.to_bytes());
-                let suffix = suffix_bwlq(*size);
-                let imm = match *size {
-                    OperandSize::Size8 => ((*simm32 as u8) as i8).to_string(),
-                    OperandSize::Size16 => ((*simm32 as u16) as i16).to_string(),
-                    OperandSize::Size32 => simm32.to_string(),
-                    OperandSize::Size64 => (*simm32 as i64).to_string(),
-                };
-                let op = ljustify2("mov".to_string(), suffix);
-                format!("{op} ${imm}, {dst}")
-            }
-
             Inst::MovRR { size, src, dst } => {
                 let src = pretty_print_reg(src.to_reg(), size.to_bytes());
                 let dst = pretty_print_reg(dst.to_reg().to_reg(), size.to_bytes());
@@ -950,13 +935,6 @@ impl PrettyPrint for Inst {
                 format!("{op} {addr}, {dst}")
             }
 
-            Inst::MovRM { size, src, dst, .. } => {
-                let src = pretty_print_reg(src.to_reg(), size.to_bytes());
-                let dst = dst.pretty_print(size.to_bytes());
-                let op = ljustify2("mov".to_string(), suffix_bwlq(*size));
-                format!("{op} {src}, {dst}")
-            }
-
             Inst::CmpRmiR {
                 size,
                 src1,
@@ -1590,17 +1568,10 @@ fn x64_get_operands(inst: &mut Inst, collector: &mut impl OperandVisitor) {
             collector.reg_early_def(tmp_xmm2);
         }
 
-        Inst::MovImmM { dst, .. } => {
-            dst.get_operands(collector);
-        }
         Inst::LoadEffectiveAddress { addr: src, dst, .. } => {
             collector.reg_def(dst);
             src.get_operands(collector);
         }
-        Inst::MovRM { src, dst, .. } => {
-            collector.reg_use(src);
-            dst.get_operands(collector);
-        }
         Inst::CmpRmiR { src1, src2, .. } => {
             collector.reg_use(src1);
             src2.get_operands(collector);
diff --git a/cranelift/codegen/src/isa/x64/pcc.rs b/cranelift/codegen/src/isa/x64/pcc.rs
index 4e289d9541be..51ab2bcfd1d9 100644
--- a/cranelift/codegen/src/isa/x64/pcc.rs
+++ b/cranelift/codegen/src/isa/x64/pcc.rs
@@ -104,12 +104,6 @@ pub(crate) fn check(
             })
         }
 
-        Inst::MovImmM { size, ref dst, .. } => check_store(ctx, None, dst, vcode, size.to_type()),
-
-        Inst::MovRM { size, src, ref dst } => {
-            check_store(ctx, Some(src.to_reg()), dst, vcode, size.to_type())
-        }
-
         Inst::CmpRmiR {
             size,
             src1,
diff --git a/cranelift/codegen/src/isle_prelude.rs b/cranelift/codegen/src/isle_prelude.rs
index ed75206c58bc..6b8c2d6762ae 100644
--- a/cranelift/codegen/src/isle_prelude.rs
+++ b/cranelift/codegen/src/isle_prelude.rs
@@ -971,6 +971,10 @@ macro_rules! isle_common_prelude_methods {
             i8::try_from(val).ok()
         }
 
+        fn i8_as_u8(&mut self, val: i8) -> u8 {
+            val as u8
+        }
+
         fn i16_as_u16(&mut self, val: i16) -> u16 {
             val as u16
         }
diff --git a/cranelift/codegen/src/prelude.isle b/cranelift/codegen/src/prelude.isle
index 1fd262308a2c..1049a999f332 100644
--- a/cranelift/codegen/src/prelude.isle
+++ b/cranelift/codegen/src/prelude.isle
@@ -158,7 +158,10 @@
 (extern constructor u32_as_u64 u32_as_u64)
 (convert u32 u64 u32_as_u64)
 
-(decl i32_as_u32 (i32) u32)
+(decl pure i8_as_u8 (i8) u8)
+(extern constructor i8_as_u8 i8_as_u8)
+
+(decl pure i32_as_u32 (i32) u32)
 (extern constructor i32_as_u32 i32_as_u32)
 
 (decl pure i32_as_i64 (i32) i64)
diff --git a/cranelift/filetests/filetests/isa/x64/atomic-128.clif b/cranelift/filetests/filetests/isa/x64/atomic-128.clif
index cea4a16cf69f..0d9b89d8101c 100644
--- a/cranelift/filetests/filetests/isa/x64/atomic-128.clif
+++ b/cranelift/filetests/filetests/isa/x64/atomic-128.clif
@@ -12,7 +12,7 @@ block0(v0: i64):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x10, %rsp
-;   movq    %rbx, 0(%rsp)
+;   movq %rbx, (%rsp)
 ; block0:
 ;   uninit  %rax
 ;   xorq %rax, %rax
@@ -57,7 +57,7 @@ block0(v0: i128, v1: i64):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x10, %rsp
-;   movq    %rbx, 0(%rsp)
+;   movq %rbx, (%rsp)
 ; block0:
 ;   movq    %rsi, %rcx
 ;   movq    %rdi, %rbx
@@ -99,7 +99,7 @@ block0(v0: i64, v1: i128, v2: i128):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x10, %rsp
-;   movq    %rbx, 0(%rsp)
+;   movq %rbx, (%rsp)
 ; block0:
 ;   movq    %rcx, %rbx
 ;   movq    %r8, %rcx
@@ -138,7 +138,7 @@ block0(v0: i64, v1: i128):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x10, %rsp
-;   movq    %rbx, 0(%rsp)
+;   movq %rbx, (%rsp)
 ; block0:
 ;   movq    %rdx, %r11
 ;   atomically { %rdx:%rax = 0(%rdi); %rcx:%rbx = %rdx:%rax Add %r11:%rsi; 0(%rdi) = %rcx:%rbx }
@@ -180,7 +180,7 @@ block0(v0: i64, v1: i128):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x10, %rsp
-;   movq    %rbx, 0(%rsp)
+;   movq %rbx, (%rsp)
 ; block0:
 ;   movq    %rdx, %r11
 ;   atomically { %rdx:%rax = 0(%rdi); %rcx:%rbx = %rdx:%rax Sub %r11:%rsi; 0(%rdi) = %rcx:%rbx }
@@ -222,7 +222,7 @@ block0(v0: i64, v1: i128):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x10, %rsp
-;   movq    %rbx, 0(%rsp)
+;   movq %rbx, (%rsp)
 ; block0:
 ;   movq    %rdx, %r11
 ;   atomically { %rdx:%rax = 0(%rdi); %rcx:%rbx = %rdx:%rax And %r11:%rsi; 0(%rdi) = %rcx:%rbx }
@@ -264,7 +264,7 @@ block0(v0: i64, v1: i128):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x10, %rsp
-;   movq    %rbx, 0(%rsp)
+;   movq %rbx, (%rsp)
 ; block0:
 ;   movq    %rdx, %r11
 ;   atomically { %rdx:%rax = 0(%rdi); %rcx:%rbx = %rdx:%rax Nand %r11:%rsi; 0(%rdi) = %rcx:%rbx }
@@ -308,7 +308,7 @@ block0(v0: i64, v1: i128):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x10, %rsp
-;   movq    %rbx, 0(%rsp)
+;   movq %rbx, (%rsp)
 ; block0:
 ;   movq    %rdx, %r11
 ;   atomically { %rdx:%rax = 0(%rdi); %rcx:%rbx = %rdx:%rax Or %r11:%rsi; 0(%rdi) = %rcx:%rbx }
@@ -350,7 +350,7 @@ block0(v0: i64, v1: i128):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x10, %rsp
-;   movq    %rbx, 0(%rsp)
+;   movq %rbx, (%rsp)
 ; block0:
 ;   movq    %rdx, %r11
 ;   atomically { %rdx:%rax = 0(%rdi); %rcx:%rbx = %rdx:%rax Xor %r11:%rsi; 0(%rdi) = %rcx:%rbx }
@@ -392,7 +392,7 @@ block0(v0: i64, v1: i128):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x10, %rsp
-;   movq    %rbx, 0(%rsp)
+;   movq %rbx, (%rsp)
 ; block0:
 ;   movq    %rdx, %rcx
 ;   movq    %rsi, %rbx
@@ -432,7 +432,7 @@ block0(v0: i64, v1: i128):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x10, %rsp
-;   movq    %rbx, 0(%rsp)
+;   movq %rbx, (%rsp)
 ; block0:
 ;   movq    %rdx, %r11
 ;   atomically { %rdx:%rax = 0(%rdi); %rcx:%rbx = %rdx:%rax Umin %r11:%rsi; 0(%rdi) = %rcx:%rbx }
@@ -477,7 +477,7 @@ block0(v0: i64, v1: i128):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x10, %rsp
-;   movq    %rbx, 0(%rsp)
+;   movq %rbx, (%rsp)
 ; block0:
 ;   movq    %rdx, %r11
 ;   atomically { %rdx:%rax = 0(%rdi); %rcx:%rbx = %rdx:%rax Umax %r11:%rsi; 0(%rdi) = %rcx:%rbx }
@@ -522,7 +522,7 @@ block0(v0: i64, v1: i128):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x10, %rsp
-;   movq    %rbx, 0(%rsp)
+;   movq %rbx, (%rsp)
 ; block0:
 ;   movq    %rdx, %r11
 ;   atomically { %rdx:%rax = 0(%rdi); %rcx:%rbx = %rdx:%rax Smin %r11:%rsi; 0(%rdi) = %rcx:%rbx }
@@ -567,7 +567,7 @@ block0(v0: i64, v1: i128):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x10, %rsp
-;   movq    %rbx, 0(%rsp)
+;   movq %rbx, (%rsp)
 ; block0:
 ;   movq    %rdx, %r11
 ;   atomically { %rdx:%rax = 0(%rdi); %rcx:%rbx = %rdx:%rax Smax %r11:%rsi; 0(%rdi) = %rcx:%rbx }
diff --git a/cranelift/filetests/filetests/isa/x64/call-conv.clif b/cranelift/filetests/filetests/isa/x64/call-conv.clif
index 874ae7463c1f..0e4f7aa72937 100644
--- a/cranelift/filetests/filetests/isa/x64/call-conv.clif
+++ b/cranelift/filetests/filetests/isa/x64/call-conv.clif
@@ -91,8 +91,8 @@ block0(v0: i32):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0xb0, %rsp
-;   movq    %rsi, 0(%rsp)
-;   movq    %rdi, 8(%rsp)
+;   movq %rsi, (%rsp)
+;   movq %rdi, 8(%rsp)
 ;   movdqu %xmm6, 0x10(%rsp)
 ;   movdqu %xmm7, 0x20(%rsp)
 ;   movdqu %xmm8, 0x30(%rsp)
@@ -197,8 +197,8 @@ block0(
 ;   movq <offset:0>+-0x18(%rbp), %r11
 ;   movss <offset:0>+-0x10(%rbp), %xmm11
 ;   movsd <offset:0>+-8(%rbp), %xmm13
-;   movq    %r8, 32(%rsp)
-;   movq    %r9, 40(%rsp)
+;   movq %r8, 0x20(%rsp)
+;   movq %r9, 0x28(%rsp)
 ;   movsd %xmm0, 0x30(%rsp)
 ;   movsd %xmm1, 0x38(%rsp)
 ;   movsd %xmm2, 0x40(%rsp)
@@ -207,8 +207,8 @@ block0(
 ;   movsd %xmm5, 0x58(%rsp)
 ;   movsd %xmm6, 0x60(%rsp)
 ;   movsd %xmm7, 0x68(%rsp)
-;   movq    %r10, 112(%rsp)
-;   movl    %r11d, 120(%rsp)
+;   movq %r10, 0x70(%rsp)
+;   movl %r11d, 0x78(%rsp)
 ;   movss %xmm11, 0x80(%rsp)
 ;   movsd %xmm13, 0x88(%rsp)
 ;   movq    %rcx, %r9
@@ -272,7 +272,7 @@ block0(v0: i64, v1:i64, v2:i64, v3:i64, v4:i64):
 ;   movq    %rsp, %rbp
 ;   subq $0x30, %rsp
 ; block0:
-;   movq    %r8, 32(%rsp)
+;   movq %r8, 0x20(%rsp)
 ;   movq    %rcx, %r9
 ;   movq    %rdx, %r8
 ;   movq    %rsi, %rdx
@@ -312,9 +312,9 @@ block0(v0: i32, v1: f32, v2: i64, v3: f64, v4: i32, v5: i32, v6: i32, v7: f32, v
 ;   movq    %rsp, %rbp
 ;   subq $0x60, %rsp
 ; block0:
-;   movl    %edx, 32(%rsp)
-;   movl    %ecx, 40(%rsp)
-;   movl    %r8d, 48(%rsp)
+;   movl %edx, 0x20(%rsp)
+;   movl %ecx, 0x28(%rsp)
+;   movl %r8d, 0x30(%rsp)
 ;   movss %xmm2, 0x38(%rsp)
 ;   movsd %xmm3, 0x40(%rsp)
 ;   movss %xmm4, 0x48(%rsp)
@@ -445,7 +445,7 @@ block0(v0: i32, v1: i8x16):
 ; block0:
 ;   lea     48(%rsp), %rcx
 ;   movdqu %xmm0, (%rcx)
-;   movq    %rcx, 32(%rsp)
+;   movq %rcx, 0x20(%rsp)
 ;   movq    %rdi, %r9
 ;   movq    %r9, %rcx
 ;   movq    %r9, %rdx
@@ -489,10 +489,10 @@ block0(v0: i32, v1: i8x16):
 ; block0:
 ;   lea     48(%rsp), %rcx
 ;   movdqu %xmm0, (%rcx)
-;   movq    %rcx, 32(%rsp)
+;   movq %rcx, 0x20(%rsp)
 ;   lea     64(%rsp), %r10
 ;   movdqu %xmm0, (%r10)
-;   movq    %r10, 40(%rsp)
+;   movq %r10, 0x28(%rsp)
 ;   movq    %rdi, %r9
 ;   movq    %r9, %rcx
 ;   movq    %r9, %rdx
@@ -541,10 +541,10 @@ block0(v0: i32, v1: i8x16):
 ;   movdqu %xmm0, (%rdx)
 ;   lea     64(%rsp), %r9
 ;   movdqu %xmm0, (%r9)
-;   movq    %r9, 32(%rsp)
+;   movq %r9, 0x20(%rsp)
 ;   lea     80(%rsp), %rax
 ;   movdqu %xmm0, (%rax)
-;   movq    %rax, 40(%rsp)
+;   movq %rax, 0x28(%rsp)
 ;   movq    %rdi, %r9
 ;   movq    %r9, %rcx
 ;   movq    %r9, %r8
diff --git a/cranelift/filetests/filetests/isa/x64/call-with-retval-insts.clif b/cranelift/filetests/filetests/isa/x64/call-with-retval-insts.clif
index 8d0a5e02e02a..e95dad8a83c0 100644
--- a/cranelift/filetests/filetests/isa/x64/call-with-retval-insts.clif
+++ b/cranelift/filetests/filetests/isa/x64/call-with-retval-insts.clif
@@ -37,11 +37,11 @@ block0(v0: i32):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x130, %rsp
-;   movq    %rbx, 256(%rsp)
-;   movq    %r12, 264(%rsp)
-;   movq    %r13, 272(%rsp)
-;   movq    %r14, 280(%rsp)
-;   movq    %r15, 288(%rsp)
+;   movq %rbx, 0x100(%rsp)
+;   movq %r12, 0x108(%rsp)
+;   movq %r13, 0x110(%rsp)
+;   movq %r14, 0x118(%rsp)
+;   movq %r15, 0x120(%rsp)
 ; block0:
 ;   movq    %rdi, %rsi
 ;   lea     0(%rsp), %rdi
diff --git a/cranelift/filetests/filetests/isa/x64/exceptions.clif b/cranelift/filetests/filetests/isa/x64/exceptions.clif
index e2f57eaf1754..096741cf2fd3 100644
--- a/cranelift/filetests/filetests/isa/x64/exceptions.clif
+++ b/cranelift/filetests/filetests/isa/x64/exceptions.clif
@@ -24,11 +24,11 @@ function %f0(i32) -> i32, f32, f64 {
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x40, %rsp
-;   movq    %rbx, 16(%rsp)
-;   movq    %r12, 24(%rsp)
-;   movq    %r13, 32(%rsp)
-;   movq    %r14, 40(%rsp)
-;   movq    %r15, 48(%rsp)
+;   movq %rbx, 0x10(%rsp)
+;   movq %r12, 0x18(%rsp)
+;   movq %r13, 0x20(%rsp)
+;   movq %r14, 0x28(%rsp)
+;   movq %r15, 0x30(%rsp)
 ; block0:
 ;   movabsq $4607182418800017408, %rcx
 ;   movq %rcx, %xmm1
@@ -137,11 +137,11 @@ function %f1(i32) -> i32, f32, f64 {
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x40, %rsp
-;   movq    %rbx, 16(%rsp)
-;   movq    %r12, 24(%rsp)
-;   movq    %r13, 32(%rsp)
-;   movq    %r14, 40(%rsp)
-;   movq    %r15, 48(%rsp)
+;   movq %rbx, 0x10(%rsp)
+;   movq %r12, 0x18(%rsp)
+;   movq %r13, 0x20(%rsp)
+;   movq %r14, 0x28(%rsp)
+;   movq %r15, 0x30(%rsp)
 ; block0:
 ;   testl   %edi, %edi
 ;   jnz     label4; j label1
@@ -288,11 +288,11 @@ function %f2(i32) -> i32, f32, f64 {
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x40, %rsp
-;   movq    %rbx, 16(%rsp)
-;   movq    %r12, 24(%rsp)
-;   movq    %r13, 32(%rsp)
-;   movq    %r14, 40(%rsp)
-;   movq    %r15, 48(%rsp)
+;   movq %rbx, 0x10(%rsp)
+;   movq %r12, 0x18(%rsp)
+;   movq %r13, 0x20(%rsp)
+;   movq %r14, 0x28(%rsp)
+;   movq %r15, 0x30(%rsp)
 ; block0:
 ;   movabsq $4607182418800017408, %rcx
 ;   movq %rcx, %xmm1
diff --git a/cranelift/filetests/filetests/isa/x64/fastcall.clif b/cranelift/filetests/filetests/isa/x64/fastcall.clif
index fc6a6f6ad252..1b9ba77c4a56 100644
--- a/cranelift/filetests/filetests/isa/x64/fastcall.clif
+++ b/cranelift/filetests/filetests/isa/x64/fastcall.clif
@@ -243,8 +243,8 @@ block0(v0: i64):
 ;   uninit  %xmm3
 ;   xorpd %xmm3, %xmm3
 ;   cvtsi2sdq %rcx, %xmm3
-;   movq    %rcx, 32(%rsp)
-;   movq    %rcx, 40(%rsp)
+;   movq %rcx, 0x20(%rsp)
+;   movq %rcx, 0x28(%rsp)
 ;   load_ext_name %g+0, %r11
 ;   movq    %rcx, %rdx
 ;   movdqa %xmm3, %xmm2
diff --git a/cranelift/filetests/filetests/isa/x64/fuzzbug-60035.clif b/cranelift/filetests/filetests/isa/x64/fuzzbug-60035.clif
index c9652dff66bf..c362b89d4b35 100644
--- a/cranelift/filetests/filetests/isa/x64/fuzzbug-60035.clif
+++ b/cranelift/filetests/filetests/isa/x64/fuzzbug-60035.clif
@@ -16,7 +16,7 @@ block0:
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x10, %rsp
-;   movq    %rbx, 0(%rsp)
+;   movq %rbx, (%rsp)
 ; block0:
 ;   load_ext_name userextname0+0, %rbx
 ;   call    *%rbx
diff --git a/cranelift/filetests/filetests/isa/x64/i128.clif b/cranelift/filetests/filetests/isa/x64/i128.clif
index e38595cf5383..88bc5a12c0f7 100644
--- a/cranelift/filetests/filetests/isa/x64/i128.clif
+++ b/cranelift/filetests/filetests/isa/x64/i128.clif
@@ -318,11 +318,11 @@ block0(v0: i128, v1: i128):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x30, %rsp
-;   movq    %rbx, 0(%rsp)
-;   movq    %r12, 8(%rsp)
-;   movq    %r13, 16(%rsp)
-;   movq    %r14, 24(%rsp)
-;   movq    %r15, 32(%rsp)
+;   movq %rbx, (%rsp)
+;   movq %r12, 8(%rsp)
+;   movq %r13, 0x10(%rsp)
+;   movq %r14, 0x18(%rsp)
+;   movq %r15, 0x20(%rsp)
 ; block0:
 ;   movq    %rdi, %rax
 ;   xorq %rdx, %rax
@@ -1048,8 +1048,8 @@ block0(v0: i128, v1: i64):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movq    %rdi, 0(%rdx)
-;   movq    %rsi, 8(%rdx)
+;   movq %rdi, (%rdx)
+;   movq %rsi, 8(%rdx)
 ;   movq    %rbp, %rsp
 ;   popq %rbp
 ;   ret
@@ -1173,9 +1173,9 @@ block0(v0: i128, v1: i128, v2: i64, v3: i128, v4: i128, v5: i128):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x20, %rsp
-;   movq    %r13, 0(%rsp)
-;   movq    %r14, 8(%rsp)
-;   movq    %r15, 16(%rsp)
+;   movq %r13, (%rsp)
+;   movq %r14, 8(%rsp)
+;   movq %r15, 0x10(%rsp)
 ; block0:
 ;   movq    %rcx, %r13
 ;   movq    %rdx, %r15
@@ -1248,14 +1248,14 @@ block0(v0: i128):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movq    %rdx, 0(%rdi)
-;   movq    %rsi, 8(%rdi)
-;   movq    %rdx, 16(%rdi)
-;   movq    %rsi, 24(%rdi)
-;   movq    %rsi, 32(%rdi)
-;   movq    %rdx, 40(%rdi)
-;   movq    %rsi, 48(%rdi)
-;   movq    %rdx, 56(%rdi)
+;   movq %rdx, (%rdi)
+;   movq %rsi, 8(%rdi)
+;   movq %rdx, 0x10(%rdi)
+;   movq %rsi, 0x18(%rdi)
+;   movq %rsi, 0x20(%rdi)
+;   movq %rdx, 0x28(%rdi)
+;   movq %rsi, 0x30(%rdi)
+;   movq %rdx, 0x38(%rdi)
 ;   movq    %rsi, %rcx
 ;   movq    %rcx, %rax
 ;   movq    %rbp, %rsp
@@ -1292,15 +1292,15 @@ block0(v0: i128, v1: i128):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x20, %rsp
-;   movq    %r12, 16(%rsp)
-;   movq    %r13, 24(%rsp)
+;   movq %r12, 0x10(%rsp)
+;   movq %r13, 0x18(%rsp)
 ; block0:
 ;   movq    %rdi, %r13
 ;   lea     0(%rsp), %rdi
 ;   load_ext_name %g+0, %r9
 ;   call    *%r9
 ;   movq    %r13, %rdi
-;   movq    %r12, 0(%rdi)
+;   movq %r12, (%rdi)
 ;   movq 0x10(%rsp), %r12
 ;   movq 0x18(%rsp), %r13
 ;   addq $0x20, %rsp
diff --git a/cranelift/filetests/filetests/isa/x64/immediates.clif b/cranelift/filetests/filetests/isa/x64/immediates.clif
index 13d149ce133c..dfdfe96bce25 100644
--- a/cranelift/filetests/filetests/isa/x64/immediates.clif
+++ b/cranelift/filetests/filetests/isa/x64/immediates.clif
@@ -21,15 +21,15 @@ block0(v0: i64, v1: i64):
 ; block0:
 ;   movabsq $-18765284782900, %r10
 ;   lea     0(%rdi,%r10,1), %r10
-;   movq    %r10, 0(%rsi)
+;   movq %r10, (%rsi)
 ;   movq    %rdi, %r11
 ;   subq (%rip), %r11
-;   movq    %r11, 0(%rsi)
+;   movq %r11, (%rsi)
 ;   movq    %rdi, %rax
 ;   andq (%rip), %rax
-;   movq    %rax, 0(%rsi)
+;   movq %rax, (%rsi)
 ;   orq (%rip), %rdi
-;   movq    %rdi, 0(%rsi)
+;   movq %rdi, (%rsi)
 ;   movq    %rbp, %rsp
 ;   popq %rbp
 ;   ret
diff --git a/cranelift/filetests/filetests/isa/x64/inline-probestack-large.clif b/cranelift/filetests/filetests/isa/x64/inline-probestack-large.clif
index 22fe619bf9bd..b6ec57235cbf 100644
--- a/cranelift/filetests/filetests/isa/x64/inline-probestack-large.clif
+++ b/cranelift/filetests/filetests/isa/x64/inline-probestack-large.clif
@@ -51,11 +51,11 @@ block0:
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x10000, %rsp
-;   movl    %esp, 0(%rsp)
+;   movl %esp, (%rsp)
 ;   subq $0x10000, %rsp
-;   movl    %esp, 0(%rsp)
+;   movl %esp, (%rsp)
 ;   subq $0x10000, %rsp
-;   movl    %esp, 0(%rsp)
+;   movl %esp, (%rsp)
 ;   addq $0x30000, %rsp
 ;   subq $0x30000, %rsp
 ; block0:
diff --git a/cranelift/filetests/filetests/isa/x64/inline-probestack.clif b/cranelift/filetests/filetests/isa/x64/inline-probestack.clif
index 990ce8c7081d..a8185d1577b1 100644
--- a/cranelift/filetests/filetests/isa/x64/inline-probestack.clif
+++ b/cranelift/filetests/filetests/isa/x64/inline-probestack.clif
@@ -50,11 +50,11 @@ block0:
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x1000, %rsp
-;   movl    %esp, 0(%rsp)
+;   movl %esp, (%rsp)
 ;   subq $0x1000, %rsp
-;   movl    %esp, 0(%rsp)
+;   movl %esp, (%rsp)
 ;   subq $0x1000, %rsp
-;   movl    %esp, 0(%rsp)
+;   movl %esp, (%rsp)
 ;   addq $0x3000, %rsp
 ;   subq $0x3000, %rsp
 ; block0:
diff --git a/cranelift/filetests/filetests/isa/x64/load-op.clif b/cranelift/filetests/filetests/isa/x64/load-op.clif
index 2697aa11ef4c..91ee4c32db87 100644
--- a/cranelift/filetests/filetests/isa/x64/load-op.clif
+++ b/cranelift/filetests/filetests/isa/x64/load-op.clif
@@ -156,7 +156,7 @@ block0(v0: i64, v1: i64):
 ; block0:
 ;   movq (%rdi), %r8
 ;   lea     0(%r8,%rdi,1), %r9
-;   movq    %r9, 0(%rsi)
+;   movq %r9, (%rsi)
 ;   movq (%r8, %rdi), %rax
 ;   movq    %rbp, %rsp
 ;   popq %rbp
diff --git a/cranelift/filetests/filetests/isa/x64/pinned-reg.clif b/cranelift/filetests/filetests/isa/x64/pinned-reg.clif
index 07859a00a743..a4a1129aaf0b 100644
--- a/cranelift/filetests/filetests/isa/x64/pinned-reg.clif
+++ b/cranelift/filetests/filetests/isa/x64/pinned-reg.clif
@@ -45,7 +45,7 @@ block0:
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x10, %rsp
-;   movq    %rdi, 0(%rsp)
+;   movq %rdi, (%rsp)
 ; block0:
 ;   movq    %r15, %rdi
 ;   lea     1(%rdi), %rdi
diff --git a/cranelift/filetests/filetests/isa/x64/return-call-indirect.clif b/cranelift/filetests/filetests/isa/x64/return-call-indirect.clif
index 41f0117d1475..ac7c66283c6f 100644
--- a/cranelift/filetests/filetests/isa/x64/return-call-indirect.clif
+++ b/cranelift/filetests/filetests/isa/x64/return-call-indirect.clif
@@ -250,28 +250,28 @@ block0:
 ;   subq $0xa0, %rsp
 ;   movq    %rsp, %rbp
 ;   movq 0xa0(%rsp), %r11
-;   movq    %r11, 0(%rsp)
+;   movq %r11, (%rsp)
 ;   movq 0xa8(%rsp), %r11
-;   movq    %r11, 8(%rsp)
+;   movq %r11, 8(%rsp)
 ;   subq $0xa0, %rsp
-;   movq    %rbx, 112(%rsp)
-;   movq    %r12, 120(%rsp)
-;   movq    %r13, 128(%rsp)
-;   movq    %r14, 136(%rsp)
-;   movq    %r15, 144(%rsp)
+;   movq %rbx, 0x70(%rsp)
+;   movq %r12, 0x78(%rsp)
+;   movq %r13, 0x80(%rsp)
+;   movq %r14, 0x88(%rsp)
+;   movq %r15, 0x90(%rsp)
 ; block0:
 ;   movl    $10, %esi
-;   movq    %rsi, rsp(104 + virtual offset)
+;   movq %rsi, <offset:1>+0x68(%rsp)
 ;   movl    $15, %edx
-;   movq    %rdx, rsp(96 + virtual offset)
+;   movq %rdx, <offset:1>+0x60(%rsp)
 ;   movl    $20, %ecx
-;   movq    %rcx, rsp(88 + virtual offset)
+;   movq %rcx, <offset:1>+0x58(%rsp)
 ;   movl    $25, %r8d
-;   movq    %r8, rsp(80 + virtual offset)
+;   movq %r8, <offset:1>+0x50(%rsp)
 ;   movl    $30, %r9d
-;   movq    %r9, rsp(72 + virtual offset)
+;   movq %r9, <offset:1>+0x48(%rsp)
 ;   movl    $35, %r9d
-;   movq    %r9, rsp(64 + virtual offset)
+;   movq %r9, <offset:1>+0x40(%rsp)
 ;   movl    $40, %eax
 ;   movl    $45, %r10d
 ;   movl    $50, %r11d
@@ -282,52 +282,52 @@ block0:
 ;   movl    $75, %r12d
 ;   movl    $80, %edi
 ;   movl    $85, %esi
-;   movq    %rsi, rsp(56 + virtual offset)
+;   movq %rsi, <offset:1>+0x38(%rsp)
 ;   movl    $90, %edx
 ;   movl    $95, %ecx
 ;   movl    $100, %r8d
 ;   movl    $105, %r9d
 ;   movl    $110, %esi
-;   movq    %rsi, rsp(48 + virtual offset)
+;   movq %rsi, <offset:1>+0x30(%rsp)
 ;   movl    $115, %esi
-;   movq    %rsi, rsp(40 + virtual offset)
+;   movq %rsi, <offset:1>+0x28(%rsp)
 ;   movl    $120, %esi
-;   movq    %rsi, rsp(32 + virtual offset)
+;   movq %rsi, <offset:1>+0x20(%rsp)
 ;   movl    $125, %esi
-;   movq    %rsi, rsp(24 + virtual offset)
+;   movq %rsi, <offset:1>+0x18(%rsp)
 ;   movl    $130, %esi
-;   movq    %rsi, rsp(16 + virtual offset)
+;   movq %rsi, <offset:1>+0x10(%rsp)
 ;   movl    $135, %esi
-;   movq    %rsi, rsp(8 + virtual offset)
+;   movq %rsi, <offset:1>+8(%rsp)
 ;   load_ext_name %tail_callee_stack_args+0, %rsi
-;   movq    %rsi, rsp(0 + virtual offset)
-;   movq    %rax, rbp(stack args max - 160)
-;   movq    %r10, rbp(stack args max - 152)
-;   movq    %r11, rbp(stack args max - 144)
-;   movq    %r13, rbp(stack args max - 136)
-;   movq    %r14, rbp(stack args max - 128)
-;   movq    %r15, rbp(stack args max - 120)
-;   movq    %rbx, rbp(stack args max - 112)
-;   movq    %r12, rbp(stack args max - 104)
-;   movq    %rdi, rbp(stack args max - 96)
+;   movq %rsi, <offset:1>+(%rsp)
+;   movq %rax, <offset:0>+-0xa0(%rbp)
+;   movq %r10, <offset:0>+-0x98(%rbp)
+;   movq %r11, <offset:0>+-0x90(%rbp)
+;   movq %r13, <offset:0>+-0x88(%rbp)
+;   movq %r14, <offset:0>+-0x80(%rbp)
+;   movq %r15, <offset:0>+-0x78(%rbp)
+;   movq %rbx, <offset:0>+-0x70(%rbp)
+;   movq %r12, <offset:0>+-0x68(%rbp)
+;   movq %rdi, <offset:0>+-0x60(%rbp)
 ;   movq <offset:1>+0x38(%rsp), %rdi
-;   movq    %rdi, rbp(stack args max - 88)
-;   movq    %rdx, rbp(stack args max - 80)
-;   movq    %rcx, rbp(stack args max - 72)
-;   movq    %r8, rbp(stack args max - 64)
-;   movq    %r9, rbp(stack args max - 56)
+;   movq %rdi, <offset:0>+-0x58(%rbp)
+;   movq %rdx, <offset:0>+-0x50(%rbp)
+;   movq %rcx, <offset:0>+-0x48(%rbp)
+;   movq %r8, <offset:0>+-0x40(%rbp)
+;   movq %r9, <offset:0>+-0x38(%rbp)
 ;   movq <offset:1>+0x30(%rsp), %rsi
-;   movq    %rsi, rbp(stack args max - 48)
+;   movq %rsi, <offset:0>+-0x30(%rbp)
 ;   movq <offset:1>+0x28(%rsp), %rsi
-;   movq    %rsi, rbp(stack args max - 40)
+;   movq %rsi, <offset:0>+-0x28(%rbp)
 ;   movq <offset:1>+0x20(%rsp), %rsi
-;   movq    %rsi, rbp(stack args max - 32)
+;   movq %rsi, <offset:0>+-0x20(%rbp)
 ;   movq <offset:1>+0x18(%rsp), %rsi
-;   movq    %rsi, rbp(stack args max - 24)
+;   movq %rsi, <offset:0>+-0x18(%rbp)
 ;   movq <offset:1>+0x10(%rsp), %rsi
-;   movq    %rsi, rbp(stack args max - 16)
+;   movq %rsi, <offset:0>+-0x10(%rbp)
 ;   movq <offset:1>+8(%rsp), %rsi
-;   movq    %rsi, rbp(stack args max - 8)
+;   movq %rsi, <offset:0>+-8(%rbp)
 ;   movq <offset:1>+0x50(%rsp), %rcx
 ;   movq <offset:1>+0x58(%rsp), %rdx
 ;   movq <offset:1>+0x60(%rsp), %rsi
diff --git a/cranelift/filetests/filetests/isa/x64/return-call.clif b/cranelift/filetests/filetests/isa/x64/return-call.clif
index b386a4aa0ae7..3047cd5ed52d 100644
--- a/cranelift/filetests/filetests/isa/x64/return-call.clif
+++ b/cranelift/filetests/filetests/isa/x64/return-call.clif
@@ -238,7 +238,7 @@ block0(v0: i32, v1: i32, v2: i32, v3: i32, v4: i32, v5: i32, v6: i32, v7: i32, v
 ;   movq <offset:0>+-0x20(%rbp), %r8
 ;   movq <offset:0>+-0x18(%rbp), %r9
 ;   movq <offset:0>+-0x10(%rbp), %rsi
-;   movl    %esi, rbp(stack args max - 16)
+;   movl %esi, <offset:0>+-0x10(%rbp)
 ;   movq    %rdx, %rdi
 ;   movq    %rcx, %rsi
 ;   movq    %r10, %rdx
@@ -309,15 +309,15 @@ block0(v0: i32, v1: i32, v2: i32, v3: i32, v4: i32, v5: i32, v6: i32):
 ;   subq $0x10, %rsp
 ;   movq    %rsp, %rbp
 ;   movq 0x10(%rsp), %r11
-;   movq    %r11, 0(%rsp)
+;   movq %r11, (%rsp)
 ;   movq 0x18(%rsp), %r11
-;   movq    %r11, 8(%rsp)
+;   movq %r11, 8(%rsp)
 ; block0:
 ;   movq    %r9, %r10
 ;   movq <offset:0>+-0x10(%rbp), %r9
-;   movl    %edi, rbp(stack args max - 32)
-;   movl    %edi, rbp(stack args max - 24)
-;   movl    %esi, rbp(stack args max - 16)
+;   movl %edi, <offset:0>+-0x20(%rbp)
+;   movl %edi, <offset:0>+-0x18(%rbp)
+;   movl %esi, <offset:0>+-0x10(%rbp)
 ;   movq    %rsi, %rdi
 ;   movq    %rdx, %rsi
 ;   movq    %rcx, %rdx
@@ -415,28 +415,28 @@ block0:
 ;   subq $0xa0, %rsp
 ;   movq    %rsp, %rbp
 ;   movq 0xa0(%rsp), %r11
-;   movq    %r11, 0(%rsp)
+;   movq %r11, (%rsp)
 ;   movq 0xa8(%rsp), %r11
-;   movq    %r11, 8(%rsp)
+;   movq %r11, 8(%rsp)
 ;   subq $0xa0, %rsp
-;   movq    %rbx, 112(%rsp)
-;   movq    %r12, 120(%rsp)
-;   movq    %r13, 128(%rsp)
-;   movq    %r14, 136(%rsp)
-;   movq    %r15, 144(%rsp)
+;   movq %rbx, 0x70(%rsp)
+;   movq %r12, 0x78(%rsp)
+;   movq %r13, 0x80(%rsp)
+;   movq %r14, 0x88(%rsp)
+;   movq %r15, 0x90(%rsp)
 ; block0:
 ;   movl    $10, %esi
-;   movq    %rsi, rsp(96 + virtual offset)
+;   movq %rsi, <offset:1>+0x60(%rsp)
 ;   movl    $15, %edx
-;   movq    %rdx, rsp(88 + virtual offset)
+;   movq %rdx, <offset:1>+0x58(%rsp)
 ;   movl    $20, %ecx
-;   movq    %rcx, rsp(80 + virtual offset)
+;   movq %rcx, <offset:1>+0x50(%rsp)
 ;   movl    $25, %r8d
-;   movq    %r8, rsp(72 + virtual offset)
+;   movq %r8, <offset:1>+0x48(%rsp)
 ;   movl    $30, %r9d
-;   movq    %r9, rsp(64 + virtual offset)
+;   movq %r9, <offset:1>+0x40(%rsp)
 ;   movl    $35, %r9d
-;   movq    %r9, rsp(56 + virtual offset)
+;   movq %r9, <offset:1>+0x38(%rsp)
 ;   movl    $40, %eax
 ;   movl    $45, %r10d
 ;   movl    $50, %r11d
@@ -447,50 +447,50 @@ block0:
 ;   movl    $75, %r12d
 ;   movl    $80, %edi
 ;   movl    $85, %esi
-;   movq    %rsi, rsp(48 + virtual offset)
+;   movq %rsi, <offset:1>+0x30(%rsp)
 ;   movl    $90, %edx
 ;   movl    $95, %ecx
 ;   movl    $100, %r8d
 ;   movl    $105, %r9d
 ;   movl    $110, %esi
-;   movq    %rsi, rsp(40 + virtual offset)
+;   movq %rsi, <offset:1>+0x28(%rsp)
 ;   movl    $115, %esi
-;   movq    %rsi, rsp(32 + virtual offset)
+;   movq %rsi, <offset:1>+0x20(%rsp)
 ;   movl    $120, %esi
-;   movq    %rsi, rsp(24 + virtual offset)
+;   movq %rsi, <offset:1>+0x18(%rsp)
 ;   movl    $125, %esi
-;   movq    %rsi, rsp(16 + virtual offset)
+;   movq %rsi, <offset:1>+0x10(%rsp)
 ;   movl    $130, %esi
-;   movq    %rsi, rsp(8 + virtual offset)
+;   movq %rsi, <offset:1>+8(%rsp)
 ;   movl    $135, %esi
-;   movq    %rsi, rsp(0 + virtual offset)
-;   movq    %rax, rbp(stack args max - 160)
-;   movq    %r10, rbp(stack args max - 152)
-;   movq    %r11, rbp(stack args max - 144)
-;   movq    %r13, rbp(stack args max - 136)
-;   movq    %r14, rbp(stack args max - 128)
-;   movq    %r15, rbp(stack args max - 120)
-;   movq    %rbx, rbp(stack args max - 112)
-;   movq    %r12, rbp(stack args max - 104)
-;   movq    %rdi, rbp(stack args max - 96)
+;   movq %rsi, <offset:1>+(%rsp)
+;   movq %rax, <offset:0>+-0xa0(%rbp)
+;   movq %r10, <offset:0>+-0x98(%rbp)
+;   movq %r11, <offset:0>+-0x90(%rbp)
+;   movq %r13, <offset:0>+-0x88(%rbp)
+;   movq %r14, <offset:0>+-0x80(%rbp)
+;   movq %r15, <offset:0>+-0x78(%rbp)
+;   movq %rbx, <offset:0>+-0x70(%rbp)
+;   movq %r12, <offset:0>+-0x68(%rbp)
+;   movq %rdi, <offset:0>+-0x60(%rbp)
 ;   movq <offset:1>+0x30(%rsp), %rdi
-;   movq    %rdi, rbp(stack args max - 88)
-;   movq    %rdx, rbp(stack args max - 80)
-;   movq    %rcx, rbp(stack args max - 72)
-;   movq    %r8, rbp(stack args max - 64)
-;   movq    %r9, rbp(stack args max - 56)
+;   movq %rdi, <offset:0>+-0x58(%rbp)
+;   movq %rdx, <offset:0>+-0x50(%rbp)
+;   movq %rcx, <offset:0>+-0x48(%rbp)
+;   movq %r8, <offset:0>+-0x40(%rbp)
+;   movq %r9, <offset:0>+-0x38(%rbp)
 ;   movq <offset:1>+0x28(%rsp), %rsi
-;   movq    %rsi, rbp(stack args max - 48)
+;   movq %rsi, <offset:0>+-0x30(%rbp)
 ;   movq <offset:1>+0x20(%rsp), %rsi
-;   movq    %rsi, rbp(stack args max - 40)
+;   movq %rsi, <offset:0>+-0x28(%rbp)
 ;   movq <offset:1>+0x18(%rsp), %rsi
-;   movq    %rsi, rbp(stack args max - 32)
+;   movq %rsi, <offset:0>+-0x20(%rbp)
 ;   movq <offset:1>+0x10(%rsp), %rsi
-;   movq    %rsi, rbp(stack args max - 24)
+;   movq %rsi, <offset:0>+-0x18(%rbp)
 ;   movq <offset:1>+8(%rsp), %rsi
-;   movq    %rsi, rbp(stack args max - 16)
+;   movq %rsi, <offset:0>+-0x10(%rbp)
 ;   movq <offset:1>+(%rsp), %rsi
-;   movq    %rsi, rbp(stack args max - 8)
+;   movq %rsi, <offset:0>+-8(%rbp)
 ;   load_ext_name %tail_callee_stack_args+0, %r10
 ;   movq <offset:1>+0x48(%rsp), %rcx
 ;   movq <offset:1>+0x50(%rsp), %rdx
diff --git a/cranelift/filetests/filetests/isa/x64/stack_switch.clif b/cranelift/filetests/filetests/isa/x64/stack_switch.clif
index b16bbfb3c83c..e78afa997d80 100644
--- a/cranelift/filetests/filetests/isa/x64/stack_switch.clif
+++ b/cranelift/filetests/filetests/isa/x64/stack_switch.clif
@@ -14,11 +14,11 @@ block0(v0: i64, v1: i64, v2: i64):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x30, %rsp
-;   movq    %rbx, 0(%rsp)
-;   movq    %r12, 8(%rsp)
-;   movq    %r13, 16(%rsp)
-;   movq    %r14, 24(%rsp)
-;   movq    %r15, 32(%rsp)
+;   movq %rbx, (%rsp)
+;   movq %r12, 8(%rsp)
+;   movq %r13, 0x10(%rsp)
+;   movq %r14, 0x18(%rsp)
+;   movq %r15, 0x20(%rsp)
 ; block0:
 ;   movq    %rdi, %r10
 ;   movq    %rdx, %rdi
@@ -144,54 +144,54 @@ block0(v0: i64, v1: i64):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0xc0, %rsp
-;   movq    %rbx, 144(%rsp)
-;   movq    %r12, 152(%rsp)
-;   movq    %r13, 160(%rsp)
-;   movq    %r14, 168(%rsp)
-;   movq    %r15, 176(%rsp)
+;   movq %rbx, 0x90(%rsp)
+;   movq %r12, 0x98(%rsp)
+;   movq %r13, 0xa0(%rsp)
+;   movq %r14, 0xa8(%rsp)
+;   movq %r15, 0xb0(%rsp)
 ; block0:
 ;   movq (%rdi), %r8
-;   movq    %r8, rsp(136 + virtual offset)
+;   movq %r8, <offset:1>+0x88(%rsp)
 ;   movq 8(%rdi), %r8
-;   movq    %r8, rsp(16 + virtual offset)
+;   movq %r8, <offset:1>+0x10(%rsp)
 ;   movq 0x10(%rdi), %r8
-;   movq    %r8, rsp(128 + virtual offset)
+;   movq %r8, <offset:1>+0x80(%rsp)
 ;   movq 0x18(%rdi), %r8
-;   movq    %r8, rsp(120 + virtual offset)
+;   movq %r8, <offset:1>+0x78(%rsp)
 ;   movq 0x20(%rdi), %r8
-;   movq    %r8, rsp(112 + virtual offset)
+;   movq %r8, <offset:1>+0x70(%rsp)
 ;   movq 0x28(%rdi), %r8
-;   movq    %r8, rsp(104 + virtual offset)
+;   movq %r8, <offset:1>+0x68(%rsp)
 ;   movq 0x30(%rdi), %r8
-;   movq    %r8, rsp(96 + virtual offset)
+;   movq %r8, <offset:1>+0x60(%rsp)
 ;   movq 0x38(%rdi), %r8
-;   movq    %r8, rsp(88 + virtual offset)
+;   movq %r8, <offset:1>+0x58(%rsp)
 ;   movq 0x40(%rdi), %r8
-;   movq    %r8, rsp(80 + virtual offset)
+;   movq %r8, <offset:1>+0x50(%rsp)
 ;   movq 0x48(%rdi), %r8
-;   movq    %r8, rsp(72 + virtual offset)
+;   movq %r8, <offset:1>+0x48(%rsp)
 ;   movq 0x50(%rdi), %r8
-;   movq    %r8, rsp(64 + virtual offset)
+;   movq %r8, <offset:1>+0x40(%rsp)
 ;   movq 0x58(%rdi), %r8
-;   movq    %r8, rsp(56 + virtual offset)
+;   movq %r8, <offset:1>+0x38(%rsp)
 ;   movq 0x60(%rdi), %r8
-;   movq    %r8, rsp(48 + virtual offset)
+;   movq %r8, <offset:1>+0x30(%rsp)
 ;   movq 0x68(%rdi), %r8
-;   movq    %r8, rsp(40 + virtual offset)
+;   movq %r8, <offset:1>+0x28(%rsp)
 ;   movq 0x70(%rdi), %r8
-;   movq    %rdi, rsp(0 + virtual offset)
-;   movq    %r8, rsp(32 + virtual offset)
+;   movq %rdi, <offset:1>+(%rsp)
+;   movq %r8, <offset:1>+0x20(%rsp)
 ;   uninit  %rdi
 ;   xorq %rdi, %rdi
 ;   %rdi = stack_switch_basic %rsi, %rsi, %rdi
 ;   movq <offset:1>+0x88(%rsp), %r8
-;   movq    %rdi, rsp(24 + virtual offset)
+;   movq %rdi, <offset:1>+0x18(%rsp)
 ;   movq (%r8), %r9
 ;   movq <offset:1>+0x10(%rsp), %r8
-;   movq    %r9, rsp(8 + virtual offset)
+;   movq %r9, <offset:1>+8(%rsp)
 ;   movq (%r8), %r10
 ;   movq <offset:1>+0x80(%rsp), %r8
-;   movq    %r10, rsp(16 + virtual offset)
+;   movq %r10, <offset:1>+0x10(%rsp)
 ;   movq (%r8), %r10
 ;   movq <offset:1>+0x78(%rsp), %r8
 ;   movq (%r8), %r11
@@ -219,7 +219,7 @@ block0(v0: i64, v1: i64):
 ;   movq <offset:1>+0x18(%rsp), %r9
 ;   lea     0(%r9,%rdi,1), %rdi
 ;   movq <offset:1>+0x10(%rsp), %r9
-;   movq    %rdi, rsp(8 + virtual offset)
+;   movq %rdi, <offset:1>+8(%rsp)
 ;   lea     0(%r9,%r10,1), %r9
 ;   lea     0(%r11,%rsi,1), %r10
 ;   lea     0(%rax,%rbx,1), %r11
@@ -422,11 +422,11 @@ block0(v0: i64, v1: i64):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x130, %rsp
-;   movq    %rbx, 256(%rsp)
-;   movq    %r12, 264(%rsp)
-;   movq    %r13, 272(%rsp)
-;   movq    %r14, 280(%rsp)
-;   movq    %r15, 288(%rsp)
+;   movq %rbx, 0x100(%rsp)
+;   movq %r12, 0x108(%rsp)
+;   movq %r13, 0x110(%rsp)
+;   movq %r14, 0x118(%rsp)
+;   movq %r15, 0x120(%rsp)
 ; block0:
 ;   movsd (%rdi), %xmm0
 ;   movdqu %xmm0, <offset:1>+0xf0(%rsp)
diff --git a/cranelift/filetests/filetests/isa/x64/stackslot.clif b/cranelift/filetests/filetests/isa/x64/stackslot.clif
index f7fddbc0a883..b4660e2cb64b 100644
--- a/cranelift/filetests/filetests/isa/x64/stackslot.clif
+++ b/cranelift/filetests/filetests/isa/x64/stackslot.clif
@@ -31,8 +31,8 @@ block0(v0: i64):
 ;   lea     rsp(16 + virtual offset), %rdx
 ;   lea     rsp(24 + virtual offset), %r8
 ;   lea     rsp(32 + virtual offset), %r9
-;   movq    %r8, 0(%rdi)
-;   movq    %r9, 8(%rdi)
+;   movq %r8, (%rdi)
+;   movq %r9, 8(%rdi)
 ;   addq $0x30, %rsp
 ;   movq    %rbp, %rsp
 ;   popq %rbp
diff --git a/cranelift/filetests/filetests/isa/x64/store-f16-f128.clif b/cranelift/filetests/filetests/isa/x64/store-f16-f128.clif
index 4fa8ff7bc360..2b19ee6339cf 100644
--- a/cranelift/filetests/filetests/isa/x64/store-f16-f128.clif
+++ b/cranelift/filetests/filetests/isa/x64/store-f16-f128.clif
@@ -12,7 +12,7 @@ block0(v0: f16, v1: i64):
 ;   movq    %rsp, %rbp
 ; block0:
 ;   pextrw $0x0, %xmm0, %ecx
-;   movw    %cx, 0(%rdi)
+;   movw %cx, (%rdi)
 ;   movq    %rbp, %rsp
 ;   popq %rbp
 ;   ret
diff --git a/cranelift/filetests/filetests/isa/x64/store-imm.clif b/cranelift/filetests/filetests/isa/x64/store-imm.clif
index 9599f3e07026..014aebd6415f 100644
--- a/cranelift/filetests/filetests/isa/x64/store-imm.clif
+++ b/cranelift/filetests/filetests/isa/x64/store-imm.clif
@@ -12,7 +12,7 @@ block0(v0: i64):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movb    $18, 0(%rdi)
+;   movb $0x12, (%rdi)
 ;   movq    %rdi, %rax
 ;   movq    %rbp, %rsp
 ;   popq %rbp
@@ -40,7 +40,7 @@ block0(v0: i64):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movw    $4660, 0(%rdi)
+;   movw $0x1234, (%rdi)
 ;   movq    %rdi, %rax
 ;   movq    %rbp, %rsp
 ;   popq %rbp
@@ -68,7 +68,7 @@ block0(v0: i64):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movl    $305419896, 0(%rdi)
+;   movl $0x12345678, (%rdi)
 ;   movq    %rdi, %rax
 ;   movq    %rbp, %rsp
 ;   popq %rbp
@@ -96,7 +96,7 @@ block0(v0: i64):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movq    $305419896, 0(%rdi)
+;   movq $0x12345678, (%rdi)
 ;   movq    %rdi, %rax
 ;   movq    %rbp, %rsp
 ;   popq %rbp
@@ -124,7 +124,7 @@ block0(v0: i64):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movq    $2147483647, 0(%rdi)
+;   movq $0x7fffffff, (%rdi)
 ;   movq    %rdi, %rax
 ;   movq    %rbp, %rsp
 ;   popq %rbp
@@ -152,7 +152,7 @@ block0(v0: i64):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movq    $-2147483648, 0(%rdi)
+;   movq $0xffffffff80000000, (%rdi)
 ;   movq    %rdi, %rax
 ;   movq    %rbp, %rsp
 ;   popq %rbp
@@ -181,7 +181,7 @@ block0(v0: i64):
 ;   movq    %rsp, %rbp
 ; block0:
 ;   movabsq $9223372036854775807, %rax
-;   movq    %rax, 0(%rdi)
+;   movq %rax, (%rdi)
 ;   movq    %rdi, %rax
 ;   movq    %rbp, %rsp
 ;   popq %rbp
diff --git a/cranelift/filetests/filetests/isa/x64/store-small-vector.clif b/cranelift/filetests/filetests/isa/x64/store-small-vector.clif
index 35470b1a6ea0..335853fef262 100644
--- a/cranelift/filetests/filetests/isa/x64/store-small-vector.clif
+++ b/cranelift/filetests/filetests/isa/x64/store-small-vector.clif
@@ -12,7 +12,7 @@ block0(v0: i8x2, v1: i64):
 ;   movq    %rsp, %rbp
 ; block0:
 ;   pextrw $0x0, %xmm0, %ecx
-;   movw    %cx, 0(%rdi)
+;   movw %cx, (%rdi)
 ;   movq    %rbp, %rsp
 ;   popq %rbp
 ;   ret
diff --git a/cranelift/filetests/filetests/isa/x64/struct-arg.clif b/cranelift/filetests/filetests/isa/x64/struct-arg.clif
index 01f56350d7f8..49faeda09634 100644
--- a/cranelift/filetests/filetests/isa/x64/struct-arg.clif
+++ b/cranelift/filetests/filetests/isa/x64/struct-arg.clif
@@ -114,7 +114,7 @@ block0(v0: i64, v1: i64):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x50, %rsp
-;   movq    %r14, 64(%rsp)
+;   movq %r14, 0x40(%rsp)
 ; block0:
 ;   movq    %rdi, %r14
 ;   lea     0(%rsp), %rdi
@@ -196,8 +196,8 @@ block0(v0: i64, v1: i64, v2: i64):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0xd0, %rsp
-;   movq    %rbx, 192(%rsp)
-;   movq    %r13, 200(%rsp)
+;   movq %rbx, 0xc0(%rsp)
+;   movq %r13, 0xc8(%rsp)
 ; block0:
 ;   movq    %rdx, %rbx
 ;   movq    %rdi, %r13
diff --git a/cranelift/filetests/filetests/isa/x64/struct-ret.clif b/cranelift/filetests/filetests/isa/x64/struct-ret.clif
index 900f08f8a0ff..1b1929d364d2 100644
--- a/cranelift/filetests/filetests/isa/x64/struct-ret.clif
+++ b/cranelift/filetests/filetests/isa/x64/struct-ret.clif
@@ -12,7 +12,7 @@ block0(v0: i64):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movq    $42, 0(%rdi)
+;   movq $0x2a, (%rdi)
 ;   movq    %rdi, %rax
 ;   movq    %rbp, %rsp
 ;   popq %rbp
@@ -41,7 +41,7 @@ block0(v0: i64, v1: i64):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x10, %rsp
-;   movq    %r15, 0(%rsp)
+;   movq %r15, (%rsp)
 ; block0:
 ;   movq    %rsi, %r15
 ;   load_ext_name %f2+0, %rax
@@ -84,7 +84,7 @@ block0(v0: i64):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x10, %rsp
-;   movq    %r15, 0(%rsp)
+;   movq %r15, (%rsp)
 ; block0:
 ;   movq    %rdi, %r15
 ;   load_ext_name %f4+0, %rax
diff --git a/cranelift/filetests/filetests/isa/x64/tail-call-conv.clif b/cranelift/filetests/filetests/isa/x64/tail-call-conv.clif
index 610af0493476..ea32159875b9 100644
--- a/cranelift/filetests/filetests/isa/x64/tail-call-conv.clif
+++ b/cranelift/filetests/filetests/isa/x64/tail-call-conv.clif
@@ -57,14 +57,14 @@ block0:
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x90, %rsp
-;   movq    %rbx, 96(%rsp)
-;   movq    %r12, 104(%rsp)
-;   movq    %r13, 112(%rsp)
-;   movq    %r14, 120(%rsp)
-;   movq    %r15, 128(%rsp)
+;   movq %rbx, 0x60(%rsp)
+;   movq %r12, 0x68(%rsp)
+;   movq %r13, 0x70(%rsp)
+;   movq %r14, 0x78(%rsp)
+;   movq %r15, 0x80(%rsp)
 ; block0:
 ;   movl    $10, %esi
-;   movq    %rsi, rsp(0 + virtual offset)
+;   movq %rsi, <offset:1>+(%rsp)
 ;   movl    $15, %esi
 ;   movl    $20, %edx
 ;   movl    $25, %ecx
@@ -79,15 +79,15 @@ block0:
 ;   movl    $70, %r15d
 ;   movl    $75, %ebx
 ;   movl    $80, %edi
-;   movq    %r10, 0(%rsp)
-;   movq    %r11, 8(%rsp)
-;   movq    %rax, 16(%rsp)
-;   movq    %r12, 24(%rsp)
-;   movq    %r13, 32(%rsp)
-;   movq    %r14, 40(%rsp)
-;   movq    %r15, 48(%rsp)
-;   movq    %rbx, 56(%rsp)
-;   movq    %rdi, 64(%rsp)
+;   movq %r10, (%rsp)
+;   movq %r11, 8(%rsp)
+;   movq %rax, 0x10(%rsp)
+;   movq %r12, 0x18(%rsp)
+;   movq %r13, 0x20(%rsp)
+;   movq %r14, 0x28(%rsp)
+;   movq %r15, 0x30(%rsp)
+;   movq %rbx, 0x38(%rsp)
+;   movq %rdi, 0x40(%rsp)
 ;   load_ext_name %tail_callee_stack_args+0, %r10
 ;   movq <offset:1>+(%rsp), %rdi
 ;   call    *%r10
@@ -188,28 +188,28 @@ block0:
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0xa0, %rsp
-;   movq    %rbx, 112(%rsp)
-;   movq    %r12, 120(%rsp)
-;   movq    %r13, 128(%rsp)
-;   movq    %r14, 136(%rsp)
-;   movq    %r15, 144(%rsp)
+;   movq %rbx, 0x70(%rsp)
+;   movq %r12, 0x78(%rsp)
+;   movq %r13, 0x80(%rsp)
+;   movq %r14, 0x88(%rsp)
+;   movq %r15, 0x90(%rsp)
 ; block0:
 ;   movl    $10, %ecx
-;   movq    %rcx, rsp(104 + virtual offset)
+;   movq %rcx, <offset:1>+0x68(%rsp)
 ;   movl    $15, %edx
-;   movq    %rdx, rsp(96 + virtual offset)
+;   movq %rdx, <offset:1>+0x60(%rsp)
 ;   movl    $20, %esi
-;   movq    %rsi, rsp(88 + virtual offset)
+;   movq %rsi, <offset:1>+0x58(%rsp)
 ;   movl    $25, %r8d
-;   movq    %r8, rsp(80 + virtual offset)
+;   movq %r8, <offset:1>+0x50(%rsp)
 ;   movl    $30, %eax
-;   movq    %rax, rsp(72 + virtual offset)
+;   movq %rax, <offset:1>+0x48(%rsp)
 ;   movl    $35, %r9d
-;   movq    %r9, rsp(64 + virtual offset)
+;   movq %r9, <offset:1>+0x40(%rsp)
 ;   movl    $40, %r10d
-;   movq    %r10, rsp(56 + virtual offset)
+;   movq %r10, <offset:1>+0x38(%rsp)
 ;   movl    $45, %r10d
-;   movq    %r10, rsp(48 + virtual offset)
+;   movq %r10, <offset:1>+0x30(%rsp)
 ;   movl    $50, %r13d
 ;   movl    $55, %r14d
 ;   movl    $60, %r15d
@@ -220,44 +220,44 @@ block0:
 ;   movl    $85, %ecx
 ;   movl    $90, %edx
 ;   movl    $95, %esi
-;   movq    %rsi, rsp(40 + virtual offset)
+;   movq %rsi, <offset:1>+0x28(%rsp)
 ;   movl    $100, %r8d
 ;   movl    $105, %r9d
 ;   movl    $110, %r10d
 ;   movl    $115, %esi
-;   movq    %rsi, rsp(32 + virtual offset)
+;   movq %rsi, <offset:1>+0x20(%rsp)
 ;   movl    $120, %esi
-;   movq    %rsi, rsp(24 + virtual offset)
+;   movq %rsi, <offset:1>+0x18(%rsp)
 ;   movl    $125, %esi
-;   movq    %rsi, rsp(16 + virtual offset)
+;   movq %rsi, <offset:1>+0x10(%rsp)
 ;   movl    $130, %esi
-;   movq    %rsi, rsp(8 + virtual offset)
+;   movq %rsi, <offset:1>+8(%rsp)
 ;   movl    $135, %esi
-;   movq    %rsi, rsp(0 + virtual offset)
-;   movq    %r13, 0(%rdi)
-;   movq    %r14, 8(%rdi)
-;   movq    %r15, 16(%rdi)
-;   movq    %rbx, 24(%rdi)
-;   movq    %r12, 32(%rdi)
-;   movq    %r11, 40(%rdi)
-;   movq    %rax, 48(%rdi)
-;   movq    %rcx, 56(%rdi)
-;   movq    %rdx, 64(%rdi)
+;   movq %rsi, <offset:1>+(%rsp)
+;   movq %r13, (%rdi)
+;   movq %r14, 8(%rdi)
+;   movq %r15, 0x10(%rdi)
+;   movq %rbx, 0x18(%rdi)
+;   movq %r12, 0x20(%rdi)
+;   movq %r11, 0x28(%rdi)
+;   movq %rax, 0x30(%rdi)
+;   movq %rcx, 0x38(%rdi)
+;   movq %rdx, 0x40(%rdi)
 ;   movq <offset:1>+0x28(%rsp), %rax
-;   movq    %rax, 72(%rdi)
-;   movq    %r8, 80(%rdi)
-;   movq    %r9, 88(%rdi)
-;   movq    %r10, 96(%rdi)
+;   movq %rax, 0x48(%rdi)
+;   movq %r8, 0x50(%rdi)
+;   movq %r9, 0x58(%rdi)
+;   movq %r10, 0x60(%rdi)
 ;   movq <offset:1>+0x20(%rsp), %rsi
-;   movq    %rsi, 104(%rdi)
+;   movq %rsi, 0x68(%rdi)
 ;   movq <offset:1>+0x18(%rsp), %rsi
-;   movq    %rsi, 112(%rdi)
+;   movq %rsi, 0x70(%rdi)
 ;   movq <offset:1>+0x10(%rsp), %rsi
-;   movq    %rsi, 120(%rdi)
+;   movq %rsi, 0x78(%rdi)
 ;   movq <offset:1>+8(%rsp), %rsi
-;   movq    %rsi, 128(%rdi)
+;   movq %rsi, 0x80(%rdi)
 ;   movq <offset:1>+(%rsp), %rsi
-;   movq    %rsi, 136(%rdi)
+;   movq %rsi, 0x88(%rdi)
 ;   movq <offset:1>+0x68(%rsp), %rax
 ;   movq <offset:1>+0x60(%rsp), %rcx
 ;   movq <offset:1>+0x58(%rsp), %rdx
@@ -381,11 +381,11 @@ block0:
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x130, %rsp
-;   movq    %rbx, 256(%rsp)
-;   movq    %r12, 264(%rsp)
-;   movq    %r13, 272(%rsp)
-;   movq    %r14, 280(%rsp)
-;   movq    %r15, 288(%rsp)
+;   movq %rbx, 0x100(%rsp)
+;   movq %r12, 0x108(%rsp)
+;   movq %r13, 0x110(%rsp)
+;   movq %r14, 0x118(%rsp)
+;   movq %r15, 0x120(%rsp)
 ; block0:
 ;   lea     0(%rsp), %rdi
 ;   call    TestCase(%tail_callee_stack_rets)
@@ -467,39 +467,39 @@ block0(v0: i64, v1: i64, v2: i64, v3: i64, v4: i64, v5: i64, v6: i64, v7: i64, v
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0xa0, %rsp
-;   movq    %rbx, 112(%rsp)
-;   movq    %r12, 120(%rsp)
-;   movq    %r13, 128(%rsp)
-;   movq    %r14, 136(%rsp)
-;   movq    %r15, 144(%rsp)
+;   movq %rbx, 0x70(%rsp)
+;   movq %r12, 0x78(%rsp)
+;   movq %r13, 0x80(%rsp)
+;   movq %r14, 0x88(%rsp)
+;   movq %r15, 0x90(%rsp)
 ; block0:
-;   movq    %rsi, rsp(0 + virtual offset)
-;   movq    %rdx, rsp(8 + virtual offset)
-;   movq    %rcx, rsp(16 + virtual offset)
-;   movq    %r8, rsp(24 + virtual offset)
-;   movq    %r9, rsp(32 + virtual offset)
+;   movq %rsi, <offset:1>+(%rsp)
+;   movq %rdx, <offset:1>+8(%rsp)
+;   movq %rcx, <offset:1>+0x10(%rsp)
+;   movq %r8, <offset:1>+0x18(%rsp)
+;   movq %r9, <offset:1>+0x20(%rsp)
 ;   movq <offset:0>+-0xb0(%rbp), %r9
-;   movq    %r9, rsp(40 + virtual offset)
+;   movq %r9, <offset:1>+0x28(%rsp)
 ;   movq <offset:0>+-0xa8(%rbp), %r10
-;   movq    %r10, rsp(48 + virtual offset)
+;   movq %r10, <offset:1>+0x30(%rsp)
 ;   movq <offset:0>+-0xa0(%rbp), %r10
-;   movq    %r10, rsp(56 + virtual offset)
+;   movq %r10, <offset:1>+0x38(%rsp)
 ;   movq <offset:0>+-0x98(%rbp), %rcx
-;   movq    %rcx, rsp(64 + virtual offset)
+;   movq %rcx, <offset:1>+0x40(%rsp)
 ;   movq <offset:0>+-0x90(%rbp), %r8
-;   movq    %r8, rsp(72 + virtual offset)
+;   movq %r8, <offset:1>+0x48(%rsp)
 ;   movq <offset:0>+-0x88(%rbp), %r10
-;   movq    %r10, rsp(80 + virtual offset)
+;   movq %r10, <offset:1>+0x50(%rsp)
 ;   movq <offset:0>+-0x80(%rbp), %rsi
-;   movq    %rsi, rsp(88 + virtual offset)
+;   movq %rsi, <offset:1>+0x58(%rsp)
 ;   movq <offset:0>+-0x78(%rbp), %rax
-;   movq    %rax, rsp(96 + virtual offset)
+;   movq %rax, <offset:1>+0x60(%rsp)
 ;   movq <offset:0>+-0x70(%rbp), %r10
 ;   movq <offset:0>+-0x68(%rbp), %r9
 ;   movq <offset:0>+-0x60(%rbp), %r8
 ;   movq <offset:0>+-0x58(%rbp), %rdx
 ;   movq <offset:0>+-0x50(%rbp), %rcx
-;   movq    %rcx, rsp(104 + virtual offset)
+;   movq %rcx, <offset:1>+0x68(%rsp)
 ;   movq <offset:0>+-0x48(%rbp), %rsi
 ;   movq <offset:0>+-0x40(%rbp), %r15
 ;   movq <offset:0>+-0x38(%rbp), %r12
@@ -509,29 +509,29 @@ block0(v0: i64, v1: i64, v2: i64, v3: i64, v4: i64, v5: i64, v6: i64, v7: i64, v
 ;   movq <offset:0>+-0x18(%rbp), %r11
 ;   movq <offset:0>+-0x10(%rbp), %rax
 ;   movq <offset:1>+0x40(%rsp), %rcx
-;   movq    %rcx, 0(%rdi)
+;   movq %rcx, (%rdi)
 ;   movq <offset:1>+0x48(%rsp), %rcx
-;   movq    %rcx, 8(%rdi)
+;   movq %rcx, 8(%rdi)
 ;   movq <offset:1>+0x50(%rsp), %rcx
-;   movq    %rcx, 16(%rdi)
+;   movq %rcx, 0x10(%rdi)
 ;   movq <offset:1>+0x58(%rsp), %rcx
-;   movq    %rcx, 24(%rdi)
+;   movq %rcx, 0x18(%rdi)
 ;   movq <offset:1>+0x60(%rsp), %rcx
-;   movq    %rcx, 32(%rdi)
-;   movq    %r10, 40(%rdi)
-;   movq    %r9, 48(%rdi)
-;   movq    %r8, 56(%rdi)
-;   movq    %rdx, 64(%rdi)
+;   movq %rcx, 0x20(%rdi)
+;   movq %r10, 0x28(%rdi)
+;   movq %r9, 0x30(%rdi)
+;   movq %r8, 0x38(%rdi)
+;   movq %rdx, 0x40(%rdi)
 ;   movq <offset:1>+0x68(%rsp), %rdx
-;   movq    %rdx, 72(%rdi)
-;   movq    %rsi, 80(%rdi)
-;   movq    %r15, 88(%rdi)
-;   movq    %r12, 96(%rdi)
-;   movq    %r14, 104(%rdi)
-;   movq    %rbx, 112(%rdi)
-;   movq    %r13, 120(%rdi)
-;   movq    %r11, 128(%rdi)
-;   movq    %rax, 136(%rdi)
+;   movq %rdx, 0x48(%rdi)
+;   movq %rsi, 0x50(%rdi)
+;   movq %r15, 0x58(%rdi)
+;   movq %r12, 0x60(%rdi)
+;   movq %r14, 0x68(%rdi)
+;   movq %rbx, 0x70(%rdi)
+;   movq %r13, 0x78(%rdi)
+;   movq %r11, 0x80(%rdi)
+;   movq %rax, 0x88(%rdi)
 ;   movq <offset:1>+(%rsp), %rax
 ;   movq <offset:1>+8(%rsp), %rcx
 ;   movq <offset:1>+0x10(%rsp), %rdx
@@ -676,24 +676,24 @@ block0:
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x1e0, %rsp
-;   movq    %rbx, 432(%rsp)
-;   movq    %r12, 440(%rsp)
-;   movq    %r13, 448(%rsp)
-;   movq    %r14, 456(%rsp)
-;   movq    %r15, 464(%rsp)
+;   movq %rbx, 0x1b0(%rsp)
+;   movq %r12, 0x1b8(%rsp)
+;   movq %r13, 0x1c0(%rsp)
+;   movq %r14, 0x1c8(%rsp)
+;   movq %r15, 0x1d0(%rsp)
 ; block0:
 ;   movl    $10, %edx
-;   movq    %rdx, rsp(88 + virtual offset)
+;   movq %rdx, <offset:1>+0x58(%rsp)
 ;   movl    $15, %ecx
-;   movq    %rcx, rsp(80 + virtual offset)
+;   movq %rcx, <offset:1>+0x50(%rsp)
 ;   movl    $20, %r8d
-;   movq    %r8, rsp(72 + virtual offset)
+;   movq %r8, <offset:1>+0x48(%rsp)
 ;   movl    $25, %r9d
-;   movq    %r9, rsp(64 + virtual offset)
+;   movq %r9, <offset:1>+0x40(%rsp)
 ;   movl    $30, %r9d
-;   movq    %r9, rsp(56 + virtual offset)
+;   movq %r9, <offset:1>+0x38(%rsp)
 ;   movl    $35, %esi
-;   movq    %rsi, rsp(48 + virtual offset)
+;   movq %rsi, <offset:1>+0x30(%rsp)
 ;   movl    $40, %edi
 ;   movl    $45, %eax
 ;   movl    $50, %r10d
@@ -708,48 +708,48 @@ block0:
 ;   movl    $95, %r8d
 ;   movl    $100, %r9d
 ;   movl    $105, %r11d
-;   movq    %r11, rsp(40 + virtual offset)
+;   movq %r11, <offset:1>+0x28(%rsp)
 ;   movl    $110, %r11d
-;   movq    %r11, rsp(32 + virtual offset)
+;   movq %r11, <offset:1>+0x20(%rsp)
 ;   movl    $115, %r11d
-;   movq    %r11, rsp(24 + virtual offset)
+;   movq %r11, <offset:1>+0x18(%rsp)
 ;   movl    $120, %r11d
-;   movq    %r11, rsp(16 + virtual offset)
+;   movq %r11, <offset:1>+0x10(%rsp)
 ;   movl    $125, %r11d
-;   movq    %r11, rsp(8 + virtual offset)
+;   movq %r11, <offset:1>+8(%rsp)
 ;   movl    $130, %r11d
-;   movq    %r11, rsp(0 + virtual offset)
+;   movq %r11, <offset:1>+(%rsp)
 ;   movl    $135, %r11d
-;   movq    %r11, rsp(96 + virtual offset)
+;   movq %r11, <offset:1>+0x60(%rsp)
 ;   movq <offset:1>+0x30(%rsp), %r11
-;   movq    %r11, 0(%rsp)
-;   movq    %rdi, 8(%rsp)
-;   movq    %rax, 16(%rsp)
-;   movq    %r10, 24(%rsp)
-;   movq    %r14, 32(%rsp)
-;   movq    %r15, 40(%rsp)
-;   movq    %rbx, 48(%rsp)
-;   movq    %r12, 56(%rsp)
-;   movq    %r13, 64(%rsp)
-;   movq    %rsi, 72(%rsp)
-;   movq    %rdx, 80(%rsp)
-;   movq    %rcx, 88(%rsp)
-;   movq    %r8, 96(%rsp)
-;   movq    %r9, 104(%rsp)
+;   movq %r11, (%rsp)
+;   movq %rdi, 8(%rsp)
+;   movq %rax, 0x10(%rsp)
+;   movq %r10, 0x18(%rsp)
+;   movq %r14, 0x20(%rsp)
+;   movq %r15, 0x28(%rsp)
+;   movq %rbx, 0x30(%rsp)
+;   movq %r12, 0x38(%rsp)
+;   movq %r13, 0x40(%rsp)
+;   movq %rsi, 0x48(%rsp)
+;   movq %rdx, 0x50(%rsp)
+;   movq %rcx, 0x58(%rsp)
+;   movq %r8, 0x60(%rsp)
+;   movq %r9, 0x68(%rsp)
 ;   movq <offset:1>+0x28(%rsp), %r11
-;   movq    %r11, 112(%rsp)
+;   movq %r11, 0x70(%rsp)
 ;   movq <offset:1>+0x20(%rsp), %r11
-;   movq    %r11, 120(%rsp)
+;   movq %r11, 0x78(%rsp)
 ;   movq <offset:1>+0x18(%rsp), %r11
-;   movq    %r11, 128(%rsp)
+;   movq %r11, 0x80(%rsp)
 ;   movq <offset:1>+0x10(%rsp), %r11
-;   movq    %r11, 136(%rsp)
+;   movq %r11, 0x88(%rsp)
 ;   movq <offset:1>+8(%rsp), %r11
-;   movq    %r11, 144(%rsp)
+;   movq %r11, 0x90(%rsp)
 ;   movq <offset:1>+(%rsp), %r11
-;   movq    %r11, 152(%rsp)
+;   movq %r11, 0x98(%rsp)
 ;   movq <offset:1>+0x60(%rsp), %r11
-;   movq    %r11, 160(%rsp)
+;   movq %r11, 0xa0(%rsp)
 ;   lea     176(%rsp), %rdi
 ;   load_ext_name %tail_callee_stack_args_and_rets+0, %r10
 ;   movq <offset:1>+0x48(%rsp), %rcx
diff --git a/cranelift/filetests/filetests/isa/x64/user_stack_maps.clif b/cranelift/filetests/filetests/isa/x64/user_stack_maps.clif
index febf49e78b52..d143c21396a7 100644
--- a/cranelift/filetests/filetests/isa/x64/user_stack_maps.clif
+++ b/cranelift/filetests/filetests/isa/x64/user_stack_maps.clif
@@ -36,9 +36,9 @@ block0:
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x30, %rsp
-;   movq    %rbx, 16(%rsp)
-;   movq    %r14, 24(%rsp)
-;   movq    %r15, 32(%rsp)
+;   movq %rbx, 0x10(%rsp)
+;   movq %r14, 0x18(%rsp)
+;   movq %r15, 0x20(%rsp)
 ; block0:
 ;   uninit  %rdi
 ;   xorl %edi, %edi
@@ -46,23 +46,23 @@ block0:
 ;   movl    $1, %r15d
 ;   movl    $2, %ebx
 ;   lea     rsp(0 + virtual offset), %rsi
-;   movl    $0, 0(%rsi)
+;   movl $0x0, (%rsi)
 ;   lea     rsp(4 + virtual offset), %rdi
-;   movl    $1, 0(%rdi)
+;   movl $0x1, (%rdi)
 ;   lea     rsp(8 + virtual offset), %rax
-;   movl    $2, 0(%rax)
+;   movl $0x2, (%rax)
 ;   movq    %r14, %rdi
 ;   call    User(userextname0)
 ;   ; UserStackMap { by_type: [(types::I32, CompoundBitSet {0, 4, 8})], sp_to_sized_stack_slots: None }
 ;   lea     rsp(0 + virtual offset), %rdx
-;   movl    $1, 0(%rdx)
+;   movl $0x1, (%rdx)
 ;   lea     rsp(4 + virtual offset), %r8
-;   movl    $2, 0(%r8)
+;   movl $0x2, (%r8)
 ;   movq    %r14, %rdi
 ;   call    User(userextname0)
 ;   ; UserStackMap { by_type: [(types::I32, CompoundBitSet {0, 4})], sp_to_sized_stack_slots: None }
 ;   lea     rsp(0 + virtual offset), %r10
-;   movl    $2, 0(%r10)
+;   movl $0x2, (%r10)
 ;   movq    %r15, %rdi
 ;   call    User(userextname0)
 ;   ; UserStackMap { by_type: [(types::I32, CompoundBitSet {0})], sp_to_sized_stack_slots: None }
@@ -141,27 +141,27 @@ block0(v0: i8, v1: i16, v2: i32, v3: i64, v4: f32, v5: f64):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0xb0, %rsp
-;   movq    %rbx, 128(%rsp)
-;   movq    %r12, 136(%rsp)
-;   movq    %r13, 144(%rsp)
-;   movq    %r14, 152(%rsp)
-;   movq    %r15, 160(%rsp)
+;   movq %rbx, 0x80(%rsp)
+;   movq %r12, 0x88(%rsp)
+;   movq %r13, 0x90(%rsp)
+;   movq %r14, 0x98(%rsp)
+;   movq %r15, 0xa0(%rsp)
 ; block0:
 ;   movq    %rdi, %r13
 ;   lea     rsp(0 + virtual offset), %r9
-;   movb    %sil, 0(%r9)
+;   movb %sil, (%r9)
 ;   movq    %rsi, %r15
 ;   lea     rsp(8 + virtual offset), %r9
-;   movw    %dx, 0(%r9)
+;   movw %dx, (%r9)
 ;   movq    %rdx, %r12
 ;   lea     rsp(16 + virtual offset), %r9
-;   movl    %ecx, 0(%r9)
+;   movl %ecx, (%r9)
 ;   movq    %rcx, %rbx
 ;   lea     rsp(20 + virtual offset), %r10
 ;   movss %xmm0, (%r10)
 ;   movdqu %xmm0, <offset:1>+0x60(%rsp)
 ;   lea     rsp(24 + virtual offset), %r11
-;   movq    %r8, 0(%r11)
+;   movq %r8, (%r11)
 ;   movq    %r8, %r14
 ;   lea     rsp(32 + virtual offset), %rsi
 ;   movsd %xmm1, (%rsi)
@@ -170,9 +170,9 @@ block0(v0: i8, v1: i16, v2: i32, v3: i64, v4: f32, v5: f64):
 ;   ; UserStackMap { by_type: [(types::I8, CompoundBitSet {0}), (types::I16, CompoundBitSet {8}), (types::I32, CompoundBitSet {16}), (types::F32, CompoundBitSet {20}), (types::I64, CompoundBitSet {24}), (types::F64, CompoundBitSet {32})], sp_to_sized_stack_slots: None }
 ;   movq    %rbx, %rcx
 ;   movq    %r13, %rdi
-;   movl    %ecx, 0(%rdi)
+;   movl %ecx, (%rdi)
 ;   movq    %r14, %r8
-;   movq    %r8, 8(%rdi)
+;   movq %r8, 8(%rdi)
 ;   movq    %r15, %rax
 ;   movq    %r12, %rdx
 ;   movdqu <offset:1>+0x60(%rsp), %xmm0
diff --git a/cranelift/filetests/filetests/isa/x64/winch.clif b/cranelift/filetests/filetests/isa/x64/winch.clif
index a1920f64aba6..348bc69e0490 100644
--- a/cranelift/filetests/filetests/isa/x64/winch.clif
+++ b/cranelift/filetests/filetests/isa/x64/winch.clif
@@ -38,7 +38,7 @@ block0(v0:i64, v1:i64, v2:i64, v3:i64, v4:i64, v5:i64):
 ;   movq    %rsp, %rbp
 ;   subq $0x10, %rsp
 ; block0:
-;   movq    %rdi, rsp(0 + virtual offset)
+;   movq %rdi, <offset:1>+(%rsp)
 ;   load_ext_name %g+0, %r10
 ;   call    *%r10
 ;   movq <offset:1>+(%rsp), %rax
@@ -75,13 +75,13 @@ block0(v0:i64, v1:i64, v2:i64, v3:i64, v4:i64, v5:i64):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x40, %rsp
-;   movq    %rbx, 16(%rsp)
-;   movq    %r12, 24(%rsp)
-;   movq    %r13, 32(%rsp)
-;   movq    %r14, 40(%rsp)
-;   movq    %r15, 48(%rsp)
+;   movq %rbx, 0x10(%rsp)
+;   movq %r12, 0x18(%rsp)
+;   movq %r13, 0x20(%rsp)
+;   movq %r14, 0x28(%rsp)
+;   movq %r15, 0x30(%rsp)
 ; block0:
-;   movq    %rdi, rsp(0 + virtual offset)
+;   movq %rdi, <offset:1>+(%rsp)
 ;   load_ext_name %g+0, %r10
 ;   call    *%r10
 ;   movq <offset:1>+(%rsp), %rax
@@ -169,11 +169,11 @@ block0(v0:i64, v1:i64, v2:i64, v3:i64, v4:i64, v5:i64):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x30, %rsp
-;   movq    %rbx, 0(%rsp)
-;   movq    %r12, 8(%rsp)
-;   movq    %r13, 16(%rsp)
-;   movq    %r14, 24(%rsp)
-;   movq    %r15, 32(%rsp)
+;   movq %rbx, (%rsp)
+;   movq %r12, 8(%rsp)
+;   movq %r13, 0x10(%rsp)
+;   movq %r14, 0x18(%rsp)
+;   movq %r15, 0x20(%rsp)
 ; block0:
 ;   load_ext_name %g+0, %r10
 ;   movq    %rdi, %rax
@@ -231,14 +231,14 @@ block0:
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x40, %rsp
-;   movq    %rbx, 16(%rsp)
-;   movq    %r12, 24(%rsp)
-;   movq    %r13, 32(%rsp)
-;   movq    %r14, 40(%rsp)
-;   movq    %r15, 48(%rsp)
+;   movq %rbx, 0x10(%rsp)
+;   movq %r12, 0x18(%rsp)
+;   movq %r13, 0x20(%rsp)
+;   movq %r14, 0x28(%rsp)
+;   movq %r15, 0x30(%rsp)
 ; block0:
 ;   load_ext_name userextname0+0, %r10
-;   movq    %r10, rsp(0 + virtual offset)
+;   movq %r10, <offset:1>+(%rsp)
 ;   call    *%r10
 ;   movq <offset:1>+(%rsp), %r10
 ;   call    *%r10
@@ -292,11 +292,11 @@ block0(v0:i64):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ;   subq $0x50, %rsp
-;   movq    %rbx, 32(%rsp)
-;   movq    %r12, 40(%rsp)
-;   movq    %r13, 48(%rsp)
-;   movq    %r14, 56(%rsp)
-;   movq    %r15, 64(%rsp)
+;   movq %rbx, 0x20(%rsp)
+;   movq %r12, 0x28(%rsp)
+;   movq %r13, 0x30(%rsp)
+;   movq %r14, 0x38(%rsp)
+;   movq %r15, 0x40(%rsp)
 ; block0:
 ;   lea     0(%rsp), %rdi
 ;   load_ext_name %g+0, %r10
@@ -354,9 +354,9 @@ block0(v0: i32, v1: i64, v2: i32, v3: i64):
 ;   pushq %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movq    %r8, 12(%rdi)
-;   movl    %ecx, 8(%rdi)
-;   movq    %rdx, 0(%rdi)
+;   movq %r8, 0xc(%rdi)
+;   movl %ecx, 8(%rdi)
+;   movq %rdx, (%rdi)
 ;   movq    %rsi, %rax
 ;   movq    %rbp, %rsp
 ;   popq %rbp
@@ -390,9 +390,9 @@ block0:
 ;   movl    $-56798, %r11d
 ;   movl    $85, %r9d
 ;   movl    $11, %r10d
-;   movq    %r11, 8(%rdi)
+;   movq %r11, 8(%rdi)
 ;   movzbq %r9b, %r11
-;   movq    %r9, 0(%rdi)
+;   movq %r9, (%rdi)
 ;   movzbq %r10b, %rax
 ;   movq    %rbp, %rsp
 ;   popq %rbp
@@ -429,8 +429,8 @@ block0:
 ;   movl    $-56798, %edx
 ;   movl    $85, %r8d
 ;   movl    $11, %eax
-;   movq    %rdx, 1(%rdi)
-;   movb    %r8b, 0(%rdi)
+;   movq %rdx, 1(%rdi)
+;   movb %r8b, (%rdi)
 ;   movq    %rbp, %rsp
 ;   popq %rbp
 ;   ret
diff --git a/tests/disas/load-store/x64/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/x64/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat
index f197c06be19f..e541ee9b8da4 100644
--- a/tests/disas/load-store/x64/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat
+++ b/tests/disas/load-store/x64/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat
@@ -23,23 +23,20 @@
 ;;       movq    %rsp, %rbp
 ;;       movq    %rdx, %r9
 ;;       addq    0x2a(%rip), %r9
-;;       jb      0x2f
+;;       jb      0x30
 ;;   14: cmpq    0x40(%rdi), %r9
-;;       ja      0x31
+;;       ja      0x32
 ;;   1e: addq    0x38(%rdi), %rdx
 ;;       movl    $0xffff0000, %esi
 ;;       movb    %cl, (%rdx, %rsi)
 ;;       movq    %rbp, %rsp
 ;;       popq    %rbp
 ;;       retq
-;;   2f: ud2
-;;   31: ud2
-;;   33: addb    %al, (%rax)
-;;   35: addb    %al, (%rax)
-;;   37: addb    %al, (%rcx)
-;;   39: addb    %bh, %bh
-;;   3b: incl    (%rax)
-;;   3d: addb    %al, (%rax)
+;;   30: ud2
+;;   32: ud2
+;;   34: addb    %al, (%rax)
+;;   36: addb    %al, (%rax)
+;;   38: addl    %eax, (%rax)
 ;;
 ;; wasm[0]::function[1]:
 ;;       pushq   %rbp
diff --git a/tests/disas/winch/x64/store/oob.wat b/tests/disas/winch/x64/store/oob.wat
index 9f1cbeb0ddbc..bf875c66d986 100644
--- a/tests/disas/winch/x64/store/oob.wat
+++ b/tests/disas/winch/x64/store/oob.wat
@@ -17,7 +17,7 @@
 ;;       movq    0x10(%r11), %r11
 ;;       addq    $0x20, %r11
 ;;       cmpq    %rsp, %r11
-;;       ja      0x8c
+;;       ja      0x8d
 ;;   1c: movq    %rdi, %r14
 ;;       subq    $0x20, %rsp
 ;;       movq    %rdi, 0x18(%rsp)
@@ -29,9 +29,9 @@
 ;;       movl    %ecx, %ebx
 ;;       movabsq $0x100000000, %r11
 ;;       addq    %r11, %rbx
-;;       jb      0x8e
+;;       jb      0x8f
 ;;   56: cmpq    %rdx, %rbx
-;;       ja      0x90
+;;       ja      0x91
 ;;   5f: movq    0x38(%r14), %rsi
 ;;       addq    %rcx, %rsi
 ;;       movabsq $0xffffffff, %r11
@@ -43,6 +43,6 @@
 ;;       addq    $0x20, %rsp
 ;;       popq    %rbp
 ;;       retq
-;;   8c: ud2
-;;   8e: ud2
-;;   90: ud2
+;;   8d: ud2
+;;   8f: ud2
+;;   91: ud2
diff --git a/winch/codegen/src/isa/x64/asm.rs b/winch/codegen/src/isa/x64/asm.rs
index 5bc9aa09384d..b895c6456234 100644
--- a/winch/codegen/src/isa/x64/asm.rs
+++ b/winch/codegen/src/isa/x64/asm.rs
@@ -32,6 +32,7 @@ use cranelift_codegen::{
 
 use crate::reg::WritableReg;
 use cranelift_assembler_x64 as asm;
+use wasmtime_environ::Unsigned;
 
 use super::address::Address;
 use smallvec::SmallVec;
@@ -413,22 +414,34 @@ impl Assembler {
     pub fn mov_rm(&mut self, src: Reg, addr: &Address, size: OperandSize, flags: MemFlags) {
         assert!(addr.is_offset());
         let dst = Self::to_synthetic_amode(addr, flags);
-        self.emit(Inst::MovRM {
-            size: size.into(),
-            src: src.into(),
-            dst,
-        });
+        let inst = match size {
+            OperandSize::S8 => asm::inst::movb_mr::new(dst, src).into(),
+            OperandSize::S16 => asm::inst::movw_mr::new(dst, src).into(),
+            OperandSize::S32 => asm::inst::movl_mr::new(dst, src).into(),
+            OperandSize::S64 => asm::inst::movq_mr::new(dst, src).into(),
+            _ => unreachable!(),
+        };
+        self.emit(Inst::External { inst });
     }
 
     /// Immediate-to-memory move.
     pub fn mov_im(&mut self, src: i32, addr: &Address, size: OperandSize, flags: MemFlags) {
         assert!(addr.is_offset());
         let dst = Self::to_synthetic_amode(addr, flags);
-        self.emit(Inst::MovImmM {
-            size: size.into(),
-            simm32: src,
-            dst,
-        });
+        let inst = match size {
+            OperandSize::S8 => {
+                let src = i8::try_from(src).unwrap();
+                asm::inst::movb_mi::new(dst, src.unsigned()).into()
+            }
+            OperandSize::S16 => {
+                let src = i16::try_from(src).unwrap();
+                asm::inst::movw_mi::new(dst, src.unsigned()).into()
+            }
+            OperandSize::S32 => asm::inst::movl_mi::new(dst, src.unsigned()).into(),
+            OperandSize::S64 => asm::inst::movq_mi_sxl::new(dst, src).into(),
+            _ => unreachable!(),
+        };
+        self.emit(Inst::External { inst });
     }
 
     /// Immediate-to-register move.