From 5f7f7bda3c55e7b1388134a96dece4d87fca88b6 Mon Sep 17 00:00:00 2001
From: Raffaele Intorcia <raffaele.intorcia@gmail.com>
Date: Tue, 31 Jan 2023 22:18:51 +0100
Subject: [PATCH 1/3] Added bubble sort (need testing)

---
 build.gradle    |  2 ++
 sort-global.asm |  5 +++++
 sort.asm        | 59 +++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 66 insertions(+)
 create mode 100644 sort-global.asm
 create mode 100644 sort.asm

diff --git a/build.gradle b/build.gradle
index 0e07ec3..86c74d2 100644
--- a/build.gradle
+++ b/build.gradle
@@ -10,4 +10,6 @@ retroProject {
     dialect = "KickAssembler"
     dialectVersion = "5.25"
     libDirs = ["..", ".ra/deps/c128lib"]
+
+    libFromGitHub "c128lib/chipset", "0.6.1"
 }
diff --git a/sort-global.asm b/sort-global.asm
new file mode 100644
index 0000000..11d1e10
--- /dev/null
+++ b/sort-global.asm
@@ -0,0 +1,5 @@
+#import "sort.asm"
+#importonce
+.filenamespace c128lib
+
+.macro @c128lib_BubbleSort(indirizzoArray, dimensioneArray, switchToFastModeWhileRunning) { BubbleSort(indirizzoArray, dimensioneArray, switchToFastModeWhileRunning) }
diff --git a/sort.asm b/sort.asm
new file mode 100644
index 0000000..5781b76
--- /dev/null
+++ b/sort.asm
@@ -0,0 +1,59 @@
+/*
+ * c128lib (c) 2023
+ * https://github.com/c128lib/framework
+ */
+
+#import "chipset/lib/vic2.asm"
+
+#importonce
+.filenamespace c128lib
+
+.namespace Sort {
+}
+
+/*
+  Sort an array with bubble sort algorithm.
+  Fast mode can be switched on/off while algorithm
+  is running. Fast mode can also be enabled before
+  macro is called.
+
+  Params:
+  arrayAddress - memory address of array
+  arraySize - array size
+  switchToFastModeWhileRunning - if true, fast mode
+    will be enabled at start and disabled at end.
+*/
+.macro BubbleSort(arrayAddress, arraySize, switchToFastModeWhileRunning) {
+  .if (switchToFastModeWhileRunning == true) {
+    lda #1
+    sta c128lib.Vic2.CLKRATE
+  }
+
+start:
+    ldx #0
+
+sort_loop:
+    ldy #$00
+
+inner_loop:
+    lda arrayAddress, y
+    cmp arrayAddress + 1, y
+    bcc swap
+    iny
+    cpy #arraySize
+    bne inner_loop
+    dex
+    bne sort_loop
+
+swap:
+    pha
+    lda arrayAddress + 1, y
+    sta arrayAddress, y
+    pla
+    sta arrayAddress + 1, y
+    bne inner_loop
+
+  .if (switchToFastModeWhileRunning == true) {
+    dec c128lib.Vic2.CLKRATE
+  }
+}

From 1f823bfad9d8b201e626a9c140c2c55ed89a5542 Mon Sep 17 00:00:00 2001
From: Raffaele Intorcia <raffaele.intorcia@gmail.com>
Date: Thu, 2 Feb 2023 22:08:33 +0100
Subject: [PATCH 2/3] Fix bubble sort

---
 sort.asm | 19 +++++++++----------
 1 file changed, 9 insertions(+), 10 deletions(-)

diff --git a/sort.asm b/sort.asm
index 5781b76..3e03436 100644
--- a/sort.asm
+++ b/sort.asm
@@ -30,28 +30,27 @@
   }
 
 start:
-    ldx #0
+    ldx #arraySize
 
 sort_loop:
-    ldy #$00
+    ldy #0
 
 inner_loop:
     lda arrayAddress, y
     cmp arrayAddress + 1, y
-    bcc swap
-    iny
-    cpy #arraySize
-    bne inner_loop
-    dex
-    bne sort_loop
-
-swap:
+    bcc NoSwap
     pha
     lda arrayAddress + 1, y
     sta arrayAddress, y
     pla
     sta arrayAddress + 1, y
+ 
+  NoSwap:
+    iny
+    cpy #arraySize - 1
     bne inner_loop
+    dex
+    bne sort_loop
 
   .if (switchToFastModeWhileRunning == true) {
     dec c128lib.Vic2.CLKRATE

From 7e890cf0ede376166a826724a421c2d29377d22d Mon Sep 17 00:00:00 2001
From: Raffaele Intorcia <raffaele.intorcia@gmail.com>
Date: Thu, 2 Feb 2023 22:19:40 +0100
Subject: [PATCH 3/3] Added bubblesort test

---
 sort.asm | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/sort.asm b/sort.asm
index 3e03436..7383e0f 100644
--- a/sort.asm
+++ b/sort.asm
@@ -56,3 +56,17 @@ inner_loop:
     dec c128lib.Vic2.CLKRATE
   }
 }
+.assert "BubbleSort($beef, 3, false)", { BubbleSort($beef, 3, false) },
+{
+  ldx #3; ldy #0; lda $beef,y; cmp $bef0, y; bcc *+13; pha;
+  lda $bef0, y; sta $beef, y; pla; sta $bef0, y; iny
+  cpy #2; bne *-22; dex; bne *-27
+}
+.assert "BubbleSort($beef, 3, true)", { BubbleSort($beef, 3, true) },
+{
+  lda #1; sta $d030
+  ldx #3; ldy #0; lda $beef,y; cmp $bef0, y; bcc *+13; pha;
+  lda $bef0, y; sta $beef, y; pla; sta $bef0, y; iny
+  cpy #2; bne *-22; dex; bne *-27;
+  dec $d030
+}