Fix: screen and DST enable
Mod: Trying to fix display.
Mod: values for UTC to MTC simulation
Fix: Loading correct day for YMD
Formula for UTC to MTC conversion should work
I didn't test it but it compiles and I'm pretty confident about the code
(Noah helped me a bit)
Add: resource utilisation screenshot.
Mod: real screenshots of pinout diagrams
Add: pinout diagram.
Add: sooooo much bullshit. lab4 DONE biatch.
Add: Trying simulation with waveform.
Add: Lab4 started. Haven't compiled in a while, nor tried the circuit...
Add: pdf file for lab4.
Add: screenshots for report.
Add: screenshots folder lab1
Add: LAB 3 DONEEEEEEEEEE
Add: 7 done, getting on 8.
Add: Lots of love. 6 validated. 24/43.
Page 8 - VHDL description done
Graham added stuff for mars timer that might have broken the VHDL
Trying to delete non optimized earth timer
Add: page 8/43
Add: Lab3 started, PDF added.
Finished Lab (except for binary_to_BCD on hardware)
Fix: Changed device to Cyclone II.
Add: 7_segment_decoder passed simulation.
Add: Screenshots for part 1 and 2
Fix: VHDL now really passing Analysis.
Fix: Renamed all files to match entity.
Mod: Renamed to VHDL file to match the entity.
Add: VHDL file was missing.
Add: VHDL file passing Analysis.
Add: Memory Initialization File (MIF).
Add: ULTRA long simulation done.
Fix: Lab2 is compiling.