Pinned repositories

  1. connectal

    Connectal is a framework for software-driven hardware development.

    Bluespec 75 27

  2. zynq-boot

    Scripts to create a boot.bin file for linux on Xilinx Zync

    C 18 9

  • Connectal is a framework for software-driven hardware development.

    Bluespec 75 27 MIT Updated Sep 20, 2018
  • Generate Verilog from Atomicc IR files (which are generated from llvm-translate)

    Shell GPL-2.0 Updated Sep 18, 2018
  • C++ 2 MIT Updated Sep 18, 2018
  • llvm

    Forked from llvm-mirror/llvm

    Branch of llvm repository. Use branch release_34atomicc1

    LLVM 1 1,578 Updated Sep 18, 2018
  • Mirror of official clang git repository located at http://llvm.org/git/clang. Updated every five minutes.

    C++ 1 1,210 Updated Sep 17, 2018
  • Memoizes execution of build commands

    Python 1 3 MIT Updated Aug 28, 2018
  • A simple jtag programming tool that has been verified on a variety of Xilinx Series7 platforms.

    LLVM 12 6 Updated Aug 28, 2018
  • Generates Makefiles to synthesize, place, and route verilog using Vivado

    Tcl 43 15 Updated Aug 28, 2018
  • Translates Bluespec SystemVerilog to Kami for use with the coq proof assistant.

    Python MIT Updated Aug 24, 2018
  • C++ standards drafts

    TeX 468 Updated Aug 13, 2018
  • Mirror of tachyon-da cvc Verilog simulator

    C 3 4 Updated Jul 25, 2018
  • A fork of the main Verilator project for development work.

    C++ 5 LGPL-3.0 Updated Jul 1, 2018
  • Makefile MIT Updated May 29, 2018
  • C MIT Updated May 17, 2018
  • llvm runtime interpreter/translator

    Python 1 2 Updated May 2, 2018
  • connectal (formerly called xbsv) contains a utility to generate bit files for Xilinx Zynq devices from BSV programs.

    7 13 Updated Jul 26, 2017
  • packaging branch of openocd

    1 GPL-2.0 Updated Feb 10, 2017
  • Repository for publishing non-jekyll documentation

    MIT Updated Nov 2, 2016
  • PYNQ

    Forked from Xilinx/PYNQ

    Python Productivity for ZYNQ with Python board level designs

    Jupyter Notebook 1 266 Updated Oct 7, 2016
  • Bluespec-derived HDL based on Dart

    Dart Updated Sep 19, 2016
  • The official Linux kernel from Xilinx

    C 1 689 Updated Sep 1, 2016
  • RISC-V Linux Port

    C 142 Updated Jul 25, 2016
  • RISC-V Proxy Kernel

    C 93 Updated Jul 1, 2016
  • CambridgeHackers Pages

    HTML Updated Jul 1, 2016
  • QEMU with RISC-V Emulation Support

    C 110 Updated Jun 30, 2016
  • Scripts to create a boot.bin file for linux on Xilinx Zync

    C 18 9 Updated Jun 3, 2016
  • klee

    Forked from rtrembecky/klee

    KLEE Symbolic Virtual Machine

    C++ 314 Updated May 29, 2016
  • Python Updated May 11, 2016
  • Scripts for common operations, dependent on local device configuration

    Shell 1 1 Updated May 11, 2016
  • A minimalistic and high-performance SAT solver

    C++ 170 Updated May 9, 2016