• Connectal is a framework for software-driven hardware development.

    Bluespec 42 18 Updated Jan 6, 2017
  • Repository for publishing non-jekyll documentation

    Updated Nov 2, 2016
  • Mirror of tachyon-da cvc Verilog simulator

    C Updated Oct 26, 2016
  • A simple jtag programming tool that has been verified on a variety of Xilinx Series7 platforms.

    LLVM 8 3 Updated Oct 24, 2016
  • Generates Makefiles to synthesize, place, and route verilog using Vivado

    Tcl 25 10 Updated Oct 21, 2016
  • PYNQ

    Forked from Xilinx/PYNQ

    Python Productivity for ZYNQ with Python board level designs

    Jupyter Notebook 43 Updated Oct 7, 2016
  • Bluespec-derived HDL based on Dart

    Dart Updated Sep 19, 2016
  • The official Linux kernel from Xilinx

    C 419 Updated Sep 1, 2016
  • C++ Updated Aug 20, 2016
  • Mirror of official clang git repository located at http://llvm.org/git/clang. Updated every five minutes.

    C++ 728 Updated Aug 19, 2016
  • llvm

    Forked from llvm-mirror/llvm

    Branch of llvm repository. Use branch release_34atomicc1

    C++ 946 Updated Aug 19, 2016
  • A fork of the main Verilator project for development work.

    C++ 4 Updated Aug 9, 2016
  • RISC-V Linux Port

    C 38 Updated Jul 25, 2016
  • RISC-V Proxy Kernel

    C 31 Updated Jul 1, 2016
  • CambridgeHackers Pages

    HTML Updated Jul 1, 2016
  • QEMU with RISC-V Emulation Support

    C 29 Updated Jun 30, 2016
  • llvm runtime interpreter/translator

    C++ 1 2 Updated Jun 6, 2016
  • Scripts to create a boot.bin file for linux on Xilinx Zync

    C 15 4 Updated Jun 3, 2016
  • klee

    Forked from rtrembecky/klee

    KLEE Symbolic Virtual Machine

    C++ 206 Updated May 29, 2016
  • Python Updated May 11, 2016
  • Scripts for common operations, dependent on local device configuration

    Shell 1 1 Updated May 11, 2016
  • Memoizes execution of build commands

    Python 1 2 Updated May 9, 2016
  • Makefile Updated May 10, 2016
  • A minimalistic and high-performance SAT solver

    C++ 121 Updated May 9, 2016
  • Bluespec 1 Updated Apr 21, 2016
  • flexlm proxy

    C Updated Apr 14, 2016
  • staging repo for various binutils-gdb enhancements

    C 53 Updated Apr 11, 2016
  • C Updated Feb 16, 2016
  • Spike, a RISC-V ISA Simulator

    C 64 Updated Feb 1, 2016
  • Port of the Yocto Project to the RISC-V ISA

    Python 15 Updated Jan 21, 2016