Skip to content

x86: Decode MOVSXD r32, r/m32 and MOVSXD r16, r/m16#2930

Merged
Rot127 merged 2 commits into
capstone-engine:nextfrom
0xradulf:x86-movsxd-r32-r16-fix
May 22, 2026
Merged

x86: Decode MOVSXD r32, r/m32 and MOVSXD r16, r/m16#2930
Rot127 merged 2 commits into
capstone-engine:nextfrom
0xradulf:x86-movsxd-r32-r16-fix

Conversation

@0xradulf
Copy link
Copy Markdown
Contributor

@0xradulf 0xradulf commented May 22, 2026

Your checklist for this pull request

  • I've documented or updated the documentation of every API function and struct this PR changes.
  • I've added tests that prove my fix is effective or that my feature works (if possible)

Detailed description

I fix the previously rejected valid x86 MOVSXD instruction variants MOVSXD r32, r/m32 and r16 one, following LLVM's definitions.
I confirmed this instruction patterns are now being used in commercial obfuscators to break any tool that depends on capstone, which led me to investigate and fix this properly.
Since "autosync" branch doesn't support x86 yet, these variants that was already fixed in LLVM doesn't exist in autogenerated tables of capstone which is outdated.
I manually added the specific variants to the tables.

Test plan

Verified with cstool against the reproducers from each linked issue:
cstool -d x64 "63 c7" -> movsxd eax, edi
cstool -d x64 "63 20" -> movsxd esp, dword ptr [rax]
cstool -d x64 "63 6b 20" -> movsxd ebp, dword ptr [rbx+0x20]
cstool -d x64 "63 26" -> movsxd esp, dword ptr [rsi]
cstool -d x64 "66 63 c1" -> movsxd ax, ecx
cstool -d x64 "66 63 20" -> movsxd sp, dword ptr [rax]

All 86334 MC tests, 821 detail tests, 473 issue tests, 2 feature tests, and 9 integration tests pass, tested both regular and reduce mode.

Closing issues

Closes #1636
Closes #1832
Closes #2555

…D r32, r/m32 and MOVSXD r16 variant.

I confirmed this instruction patterns are used in commercial obfuscators now to break any tool that depends on capstone, which led me to investigate and fix this properly.
Since "autosync" branch doesn't support x86 yet, these instructions that was already fixed in LLVM doesn't exist in autogenerated tables of capstone.
I manually added the instructions to the table.

Fixes capstone-engine#1636
Fixes capstone-engine#1832
Fixes capstone-engine#2442
Fixes capstone-engine#2555

Verified with cstool against the reproducers from each linked issue:
  cstool -d x64 "63 c7"           -> movsxd eax, edi
  cstool -d x64 "63 20"           -> movsxd esp, dword ptr [rax]
  cstool -d x64 "63 6b 20 ..."    -> movsxd ebp, dword ptr [rbx+0x20]
  cstool -d x64 "63 26"           -> movsxd esp, dword ptr [rsi]
  cstool -d x64 "66 63 c1"        -> movsxd ax, ecx
  cstool -d x64 "66 63 20"        -> movsxd sp, dword ptr [rax]

All 86334 MC tests, 821 detail tests, 473 issue tests, 2 feature tests, and 9 integration tests pass, tested both regular and reduce mode.
Copy link
Copy Markdown
Collaborator

@Rot127 Rot127 left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Add tests for each instruction in tests/issues/ please.
Or in tests/details/x86.yaml.

@Rot127
Copy link
Copy Markdown
Collaborator

Rot127 commented May 22, 2026

@0xradulf I wanted to do the release today.
Do you think you'll manage to fix it today?
I can also move the release to tomorrow. Would be nice to have them in it

@0xradulf
Copy link
Copy Markdown
Contributor Author

Writing the tests right now, should be ready in a few minutes @Rot127

@0xradulf
Copy link
Copy Markdown
Contributor Author

Tests added in ad22a61, six entries in tests/issues/issues.yaml covering all reproducers (4 issue-tied + 2 for the r16 variants).

@0xradulf 0xradulf requested a review from Rot127 May 22, 2026 16:53
Copy link
Copy Markdown
Collaborator

@Rot127 Rot127 left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Thanks a lot for adding the tests so quickly.
I'll open the backport to v5 and do the release tomorrow then with fresh mind.

@Rot127 Rot127 merged commit 511ba59 into capstone-engine:next May 22, 2026
35 checks passed
@Rot127 Rot127 mentioned this pull request May 22, 2026
2 tasks
Rot127 added a commit that referenced this pull request May 23, 2026
* x86: Decode MOVSXD r32, r/m32 and MOVSXD r16, r/m16 (#2930)

* I fix the previously rejected valid MOVSXD instruction variants MOVSXD r32, r/m32 and MOVSXD r16 variant.
I confirmed this instruction patterns are used in commercial obfuscators now to break any tool that depends on capstone, which led me to investigate and fix this properly.
Since "autosync" branch doesn't support x86 yet, these instructions that was already fixed in LLVM doesn't exist in autogenerated tables of capstone.
I manually added the instructions to the table.

Fixes #2442

Verified with cstool against the reproducers from each linked issue:
  cstool -d x64 "63 c7"           -> movsxd eax, edi
  cstool -d x64 "63 20"           -> movsxd esp, dword ptr [rax]
  cstool -d x64 "63 6b 20 ..."    -> movsxd ebp, dword ptr [rbx+0x20]
  cstool -d x64 "63 26"           -> movsxd esp, dword ptr [rsi]
  cstool -d x64 "66 63 c1"        -> movsxd ax, ecx
  cstool -d x64 "66 63 20"        -> movsxd sp, dword ptr [rax]

All 86334 MC tests, 821 detail tests, 473 issue tests, 2 feature tests, and 9 integration tests pass, tested both regular and reduce mode.

* Add v5 version of tests.

---------

Co-authored-by: 0xradulf <radulf@iretq.com>
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Projects

None yet

Development

Successfully merging this pull request may close these issues.

[X86] Disassembly Error, failed to decode movsxd instruction again Can't disassemble 'movsxd esp, dword ptr [rax]' x86: MOVSXD without REX.W prefix

2 participants