feat(cpu): CPU-aware power plans#36
Merged
Merged
Conversation
Add PowerDuplicateScheme, PowerWrite/ReadAC+DCValueIndex, PowerWriteFriendlyName, PowerDeleteScheme imports plus DuplicateScheme/WriteValue/ReadAcValue/ WriteFriendlyName/DeleteScheme helpers and the processor subgroup + 7 well-known setting GUIDs. WriteValue writes both AC and DC rails.
…r (U2) The hardcoded Power Saver GUID was wrong (a1841308-1541-... vs real a1841308-3541-...), silently breaking Power Saver selection. Add a runtime base-scheme resolver (GUID match, friendly-name fallback) for the clone base, honoring the no-hardcoded-scheme-GUIDs rule. Add regression tests.
CpuInfo + CpuDetector: one-time cached registry read of ProcessorNameString/ VendorIdentifier, pure Parse() extracting vendor/normalized-model/family. Regex keeps the X3D2 dual-edition suffix distinct from X3D. No WMI/CPUID, no new dependency. Topology/parking is owned by the catalog (U4).
CpuTuneDefinition/Catalog: exact->family->generic resolution, parking strategy keyed on cache asymmetry (only asymmetric dual-CCD X3D parks the frequency CCD; single-CCD, symmetric dual, and dual-V-cache 9950X3D2 never park). Seeds the developer's verified 9850X3D and the 9800X3D single-CCD recipe, 9950X3D dual, 9950X3D2, plus non-X3D Ryzen and Intel-hybrid families and a generic fallback. All Balanced-based; none use High Performance. Deterministic content hash + advisory BIOS guidance per entry.
CpuPlanBuilder: pure Decide (Create/ReuseExisting/ReTune) keyed on installed-set + machine token + content hash, adopting orphaned GG plans instead of stacking duplicates and never targeting a foreign machine's plan. MaySafelyDelete positive-identity guard (installed + GG-named + not Microsoft). BuildOrActivate re-tunes in place (no delete on the hot path) with partial-failure cleanup. BestPrebuilt resolver. CpuPlanPref nested under Global (rides existing clone).
CpuPlanApply wraps build-optimized / suggest-prebuilt as one-off DriftItems run through ChangeApplier; the Apply lambda self-verifies (active==target AND every override reads back via PowerReadACValueIndex) and throws on mismatch, so a half-applied plan is reported unverified. Adds cpuplan Mechanism/Apply/Verify strings, a Learn More catalog entry, and regenerates SETTINGS-REFERENCE.md. DesiredGuid is pinned only after a successful verify.
…(U7) The preset's power-plan step is now CPU-aware (recommends the catalog's prebuilt choice -- Balanced for modern CPUs) and the hardcoded High Performance GUID is gone. Adds a guardrail so the preset never disables the AMD CCD-routing stack (V-Cache optimizer / provisioning) or Xbox Game Bar services on an asymmetric dual-CCD X3D CPU, which would break the optimization.
CPU/Power tab shows the detected CPU + tier/parking, two immediate-apply buttons (Suggest best prebuilt / Build optimized) guarded by _applyInFlight with in-progress/error states and DesiredGuid pinned only after a verified apply, plus a dual-CCD dependency panel (checkable AMD service + Game Bar vs advisory BIOS CPPC). Advisory-only Recommended BIOS tab keyed to the CPU with an empty-state card. CpuPlanStatus.DependencyStatus is a pure, tested function that never claims unqualified 'optimized'.
docs/CPU-AWARE-POWER-PLANS.md and docs/wiki/CPU-Power-Plans.md cover detection, tiered matching, the cache-asymmetry parking principle, exact recipes and why, prebuilt-vs-optimized, the dual-CCD dependency stack, the never-touch-built-ins guarantee, a 'Why not High Performance?' section, and the footprint record. Adds a Features section to the wiki sidebar.
- Persist CpuPlan identity only AFTER activation + read-back verify (was stamped in BuildOrActivate before verify; a verify failure could leave config pointing at an unverified plan that the next run trusted via ReuseExisting). - Orphan adoption now refuses well-known Microsoft plans (a user-renamed built-in could otherwise be re-tuned), wiring the positive-identity guard into the mutating path. - Verify both AC and DC rails (writer sets both); add PowerReadDCValueIndex. - Fix unreachable single-CCD-X3D family catalog entry (now covers unlisted X3D as single-CCD no-park); remove dead helper. - Intel model parse anchors on the i-series prefix so it never grabs a frequency/bus number (was fragmenting plan identity for Xeon/Pentium/old Core). - Make RecommendedPreset's installed-plans set injectable (deterministic test, no live OS enumeration). - Surface unverified result via Any(!Verified); cleaner active-plan-unreadable label. - Tests: rename misleading NoEntry_RecommendsHighPerformance; add built-in delete-guard coverage, null-machine-token reuse, multiple-orphan adoption, BestPrebuilt, exact-wins-over-family, unlisted-X3D, older-Intel/Xeon parse, ToGuid HighPerf/Ultimate, direct content-hash value-sensitivity, not-installed power-plan branch.
![github-advanced-security[bot]](https://avatars.githubusercontent.com/in/57789?s=60&v=4){kind=small}
There was a problem hiding this comment.
CodeQL found more than 20 potential problems in the proposed changes. Check the Files changed tab for more details.
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
2 participants
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
What
CPU-aware power plans: build and apply a Balanced-clone power scheme tuned to the detected CPU's topology, with UI and docs.
Units (U1–U10)
Powrprof)CpuPlanPrefconfigcpuplanVerification
dotnet buildclean (warnings = errors)dotnet test— all green (incl. CpuDetector, CpuPlanBuilder, CpuPlanStatus, CpuTuneCatalog, PowerPlanMonitor, RecommendedPreset suites)Plan + brainstorm included under
docs/plans/anddocs/brainstorms/.🤖 Generated with Claude Code