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Verilog Matlab VHDL Tcl Makefile Python Other
Latest commit 7a1c7d0 @jack-h jack-h Avoid bram delays when latency too high
1. Avoid using bram delays in bi_real_unscr_4x when delay
is not at least 2 greater than bram latency. This avoids the
case of delay=latency+1 which demands a counter with maximum
value 0.

2. Catch attempts to break this rule in the delay_bram draw script.
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