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add VHDL versions of the KISS files

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commit e11736c116647c8e1bbdb20308b8d99d90833c57 1 parent 1eec040
@chastell authored
Showing with 16,990 additions and 0 deletions.
  1. +114 −0 kiss/bbara_hot.vhd
  2. +114 −0 kiss/bbara_jed.vhd
  3. +114 −0 kiss/bbara_nov.vhd
  4. +114 −0 kiss/bbara_rnd.vhd
  5. +128 −0 kiss/bbsse_hot.vhd
  6. +128 −0 kiss/bbsse_jed.vhd
  7. +128 −0 kiss/bbsse_nov.vhd
  8. +128 −0 kiss/bbsse_rnd.vhd
  9. +66 −0 kiss/bbtas_hot.vhd
  10. +66 −0 kiss/bbtas_jed.vhd
  11. +66 −0 kiss/bbtas_nov.vhd
  12. +66 −0 kiss/bbtas_rnd.vhd
  13. +73 −0 kiss/beecount_hot.vhd
  14. +73 −0 kiss/beecount_jed.vhd
  15. +73 −0 kiss/beecount_nov.vhd
  16. +73 −0 kiss/beecount_rnd.vhd
  17. +163 −0 kiss/cse_hot.vhd
  18. +163 −0 kiss/cse_jed.vhd
  19. +163 −0 kiss/cse_nov.vhd
  20. +163 −0 kiss/cse_rnd.vhd
  21. +101 −0 kiss/dk14_hot.vhd
  22. +101 −0 kiss/dk14_jed.vhd
  23. +101 −0 kiss/dk14_nov.vhd
  24. +101 −0 kiss/dk14_rnd.vhd
  25. +68 −0 kiss/dk15_hot.vhd
  26. +68 −0 kiss/dk15_jed.vhd
  27. +68 −0 kiss/dk15_nov.vhd
  28. +68 −0 kiss/dk15_rnd.vhd
  29. +213 −0 kiss/dk16_hot.vhd
  30. +213 −0 kiss/dk16_jed.vhd
  31. +213 −0 kiss/dk16_nov.vhd
  32. +213 −0 kiss/dk16_rnd.vhd
  33. +80 −0 kiss/dk17_hot.vhd
  34. +80 −0 kiss/dk17_jed.vhd
  35. +80 −0 kiss/dk17_nov.vhd
  36. +80 −0 kiss/dk17_rnd.vhd
  37. +59 −0 kiss/dk27_hot.vhd
  38. +59 −0 kiss/dk27_jed.vhd
  39. +59 −0 kiss/dk27_nov.vhd
  40. +59 −0 kiss/dk27_rnd.vhd
  41. +99 −0 kiss/dk512_hot.vhd
  42. +99 −0 kiss/dk512_jed.vhd
  43. +99 −0 kiss/dk512_nov.vhd
  44. +99 −0 kiss/dk512_rnd.vhd
  45. +192 −0 kiss/donfile_hot.vhd
  46. +192 −0 kiss/donfile_jed.vhd
  47. +192 −0 kiss/donfile_nov.vhd
  48. +192 −0 kiss/donfile_rnd.vhd
  49. +222 −0 kiss/ex1_hot.vhd
  50. +222 −0 kiss/ex1_jed.vhd
  51. +222 −0 kiss/ex1_nov.vhd
  52. +222 −0 kiss/ex1_rnd.vhd
  53. +151 −0 kiss/ex2_hot.vhd
  54. +151 −0 kiss/ex2_jed.vhd
  55. +151 −0 kiss/ex2_nov.vhd
  56. +151 −0 kiss/ex2_rnd.vhd
  57. +88 −0 kiss/ex3_hot.vhd
  58. +88 −0 kiss/ex3_jed.vhd
  59. +88 −0 kiss/ex3_nov.vhd
  60. +88 −0 kiss/ex3_rnd.vhd
  61. +87 −0 kiss/ex4_hot.vhd
  62. +87 −0 kiss/ex4_jed.vhd
  63. +87 −0 kiss/ex4_nov.vhd
  64. +87 −0 kiss/ex4_rnd.vhd
  65. +81 −0 kiss/ex5_hot.vhd
  66. +81 −0 kiss/ex5_jed.vhd
  67. +81 −0 kiss/ex5_nov.vhd
  68. +81 −0 kiss/ex5_rnd.vhd
  69. +82 −0 kiss/ex6_hot.vhd
  70. +82 −0 kiss/ex6_jed.vhd
  71. +82 −0 kiss/ex6_nov.vhd
  72. +82 −0 kiss/ex6_rnd.vhd
  73. +88 −0 kiss/ex7_hot.vhd
  74. +88 −0 kiss/ex7_jed.vhd
  75. +88 −0 kiss/ex7_nov.vhd
  76. +88 −0 kiss/ex7_rnd.vhd
  77. +251 −0 kiss/keyb_hot.vhd
  78. +251 −0 kiss/keyb_jed.vhd
  79. +251 −0 kiss/keyb_nov.vhd
  80. +251 −0 kiss/keyb_rnd.vhd
  81. +441 −0 kiss/kirkman_hot.vhd
  82. +441 −0 kiss/kirkman_jed.vhd
  83. +441 −0 kiss/kirkman_nov.vhd
  84. +441 −0 kiss/kirkman_rnd.vhd
  85. +76 −0 kiss/lion9_hot.vhd
  86. +76 −0 kiss/lion9_jed.vhd
  87. +76 −0 kiss/lion9_nov.vhd
  88. +76 −0 kiss/lion9_rnd.vhd
  89. +47 −0 kiss/lion_hot.vhd
  90. +47 −0 kiss/lion_jed.vhd
  91. +47 −0 kiss/lion_nov.vhd
  92. +47 −0 kiss/lion_rnd.vhd
  93. +94 −0 kiss/mark1_hot.vhd
  94. +94 −0 kiss/mark1_jed.vhd
  95. +94 −0 kiss/mark1_nov.vhd
  96. +94 −0 kiss/mark1_rnd.vhd
  97. +46 −0 kiss/mc_hot.vhd
  98. +46 −0 kiss/mc_jed.vhd
  99. +46 −0 kiss/mc_nov.vhd
  100. +46 −0 kiss/mc_rnd.vhd
  101. +84 −0 kiss/modulo12_hot.vhd
  102. +84 −0 kiss/modulo12_jed.vhd
  103. +84 −0 kiss/modulo12_nov.vhd
  104. +84 −0 kiss/modulo12_rnd.vhd
  105. +78 −0 kiss/opus_hot.vhd
  106. +78 −0 kiss/opus_jed.vhd
  107. +78 −0 kiss/opus_nov.vhd
  108. +78 −0 kiss/opus_rnd.vhd
  109. +283 −0 kiss/planet_hot.vhd
  110. +283 −0 kiss/planet_jed.vhd
  111. +283 −0 kiss/planet_nov.vhd
  112. +283 −0 kiss/planet_rnd.vhd
  113. +169 −0 kiss/pma_hot.vhd
  114. +169 −0 kiss/pma_jed.vhd
  115. +169 −0 kiss/pma_nov.vhd
  116. +169 −0 kiss/pma_rnd.vhd
  117. +419 −0 kiss/s1488_hot.vhd
  118. +419 −0 kiss/s1488_jed.vhd
  119. +419 −0 kiss/s1488_nov.vhd
  120. +419 −0 kiss/s1488_rnd.vhd
  121. +418 −0 kiss/s1494_hot.vhd
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114 kiss/bbara_hot.vhd
@@ -0,0 +1,114 @@
+library ieee;
+use ieee.numeric_std.all;
+use ieee.std_logic_1164.all;
+entity bbara_hot is
+ port(
+ clock: in std_logic;
+ input: in std_logic_vector(3 downto 0);
+ output: out std_logic_vector(1 downto 0)
+ );
+end bbara_hot;
+architecture behaviour of bbara_hot is
+ constant st0: std_logic_vector(9 downto 0) := "1000000000";
+ constant st1: std_logic_vector(9 downto 0) := "0100000000";
+ constant st4: std_logic_vector(9 downto 0) := "0010000000";
+ constant st2: std_logic_vector(9 downto 0) := "0001000000";
+ constant st3: std_logic_vector(9 downto 0) := "0000100000";
+ constant st7: std_logic_vector(9 downto 0) := "0000010000";
+ constant st5: std_logic_vector(9 downto 0) := "0000001000";
+ constant st6: std_logic_vector(9 downto 0) := "0000000100";
+ constant st8: std_logic_vector(9 downto 0) := "0000000010";
+ constant st9: std_logic_vector(9 downto 0) := "0000000001";
+ signal current_state, next_state: std_logic_vector(9 downto 0);
+begin
+ process(clock) begin
+ if rising_edge(clock) then current_state <= next_state;
+ end if;
+ end process;
+ process(input, current_state) begin
+ next_state <= "----------"; output <= "--";
+ case current_state is
+ when st0 =>
+ if std_match(input, "--01") then next_state <= st0; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st0; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st0; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st0; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st1 =>
+ if std_match(input, "--01") then next_state <= st1; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st1; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st1; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st0; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st2; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st2 =>
+ if std_match(input, "--01") then next_state <= st2; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st2; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st2; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st1; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st3; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st3 =>
+ if std_match(input, "--01") then next_state <= st3; output <= "10";
+ elsif std_match(input, "--10") then next_state <= st3; output <= "10";
+ elsif std_match(input, "--00") then next_state <= st3; output <= "10";
+ elsif std_match(input, "0011") then next_state <= st7; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st3; output <= "10";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st4 =>
+ if std_match(input, "--01") then next_state <= st4; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st4; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st4; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st0; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st5; output <= "00";
+ end if;
+ when st5 =>
+ if std_match(input, "--01") then next_state <= st5; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st5; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st5; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st4; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st6; output <= "00";
+ end if;
+ when st6 =>
+ if std_match(input, "--01") then next_state <= st6; output <= "01";
+ elsif std_match(input, "--10") then next_state <= st6; output <= "01";
+ elsif std_match(input, "--00") then next_state <= st6; output <= "01";
+ elsif std_match(input, "0011") then next_state <= st7; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st6; output <= "01";
+ end if;
+ when st7 =>
+ if std_match(input, "--01") then next_state <= st7; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st7; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st7; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st8; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st8 =>
+ if std_match(input, "--01") then next_state <= st8; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st8; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st8; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st9; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st9 =>
+ if std_match(input, "--01") then next_state <= st9; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st9; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st9; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st0; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when others => next_state <= "----------"; output <= "--";
+ end case;
+ end process;
+end behaviour;
View
114 kiss/bbara_jed.vhd
@@ -0,0 +1,114 @@
+library ieee;
+use ieee.numeric_std.all;
+use ieee.std_logic_1164.all;
+entity bbara_jed is
+ port(
+ clock: in std_logic;
+ input: in std_logic_vector(3 downto 0);
+ output: out std_logic_vector(1 downto 0)
+ );
+end bbara_jed;
+architecture behaviour of bbara_jed is
+ constant st0: std_logic_vector(3 downto 0) := "0111";
+ constant st1: std_logic_vector(3 downto 0) := "0100";
+ constant st4: std_logic_vector(3 downto 0) := "0110";
+ constant st2: std_logic_vector(3 downto 0) := "0101";
+ constant st3: std_logic_vector(3 downto 0) := "0000";
+ constant st7: std_logic_vector(3 downto 0) := "0010";
+ constant st5: std_logic_vector(3 downto 0) := "1100";
+ constant st6: std_logic_vector(3 downto 0) := "1110";
+ constant st8: std_logic_vector(3 downto 0) := "0011";
+ constant st9: std_logic_vector(3 downto 0) := "1111";
+ signal current_state, next_state: std_logic_vector(3 downto 0);
+begin
+ process(clock) begin
+ if rising_edge(clock) then current_state <= next_state;
+ end if;
+ end process;
+ process(input, current_state) begin
+ next_state <= "----"; output <= "--";
+ case current_state is
+ when st0 =>
+ if std_match(input, "--01") then next_state <= st0; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st0; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st0; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st0; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st1 =>
+ if std_match(input, "--01") then next_state <= st1; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st1; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st1; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st0; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st2; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st2 =>
+ if std_match(input, "--01") then next_state <= st2; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st2; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st2; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st1; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st3; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st3 =>
+ if std_match(input, "--01") then next_state <= st3; output <= "10";
+ elsif std_match(input, "--10") then next_state <= st3; output <= "10";
+ elsif std_match(input, "--00") then next_state <= st3; output <= "10";
+ elsif std_match(input, "0011") then next_state <= st7; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st3; output <= "10";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st4 =>
+ if std_match(input, "--01") then next_state <= st4; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st4; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st4; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st0; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st5; output <= "00";
+ end if;
+ when st5 =>
+ if std_match(input, "--01") then next_state <= st5; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st5; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st5; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st4; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st6; output <= "00";
+ end if;
+ when st6 =>
+ if std_match(input, "--01") then next_state <= st6; output <= "01";
+ elsif std_match(input, "--10") then next_state <= st6; output <= "01";
+ elsif std_match(input, "--00") then next_state <= st6; output <= "01";
+ elsif std_match(input, "0011") then next_state <= st7; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st6; output <= "01";
+ end if;
+ when st7 =>
+ if std_match(input, "--01") then next_state <= st7; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st7; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st7; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st8; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st8 =>
+ if std_match(input, "--01") then next_state <= st8; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st8; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st8; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st9; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st9 =>
+ if std_match(input, "--01") then next_state <= st9; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st9; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st9; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st0; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when others => next_state <= "----"; output <= "--";
+ end case;
+ end process;
+end behaviour;
View
114 kiss/bbara_nov.vhd
@@ -0,0 +1,114 @@
+library ieee;
+use ieee.numeric_std.all;
+use ieee.std_logic_1164.all;
+entity bbara_nov is
+ port(
+ clock: in std_logic;
+ input: in std_logic_vector(3 downto 0);
+ output: out std_logic_vector(1 downto 0)
+ );
+end bbara_nov;
+architecture behaviour of bbara_nov is
+ constant st0: std_logic_vector(3 downto 0) := "0100";
+ constant st1: std_logic_vector(3 downto 0) := "0000";
+ constant st2: std_logic_vector(3 downto 0) := "0010";
+ constant st3: std_logic_vector(3 downto 0) := "0011";
+ constant st4: std_logic_vector(3 downto 0) := "0001";
+ constant st5: std_logic_vector(3 downto 0) := "1101";
+ constant st6: std_logic_vector(3 downto 0) := "1100";
+ constant st7: std_logic_vector(3 downto 0) := "0111";
+ constant st8: std_logic_vector(3 downto 0) := "0110";
+ constant st9: std_logic_vector(3 downto 0) := "0101";
+ signal current_state, next_state: std_logic_vector(3 downto 0);
+begin
+ process(clock) begin
+ if rising_edge(clock) then current_state <= next_state;
+ end if;
+ end process;
+ process(input, current_state) begin
+ next_state <= "----"; output <= "--";
+ case current_state is
+ when st0 =>
+ if std_match(input, "--01") then next_state <= st0; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st0; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st0; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st0; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st1 =>
+ if std_match(input, "--01") then next_state <= st1; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st1; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st1; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st0; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st2; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st2 =>
+ if std_match(input, "--01") then next_state <= st2; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st2; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st2; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st1; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st3; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st3 =>
+ if std_match(input, "--01") then next_state <= st3; output <= "10";
+ elsif std_match(input, "--10") then next_state <= st3; output <= "10";
+ elsif std_match(input, "--00") then next_state <= st3; output <= "10";
+ elsif std_match(input, "0011") then next_state <= st7; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st3; output <= "10";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st4 =>
+ if std_match(input, "--01") then next_state <= st4; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st4; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st4; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st0; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st5; output <= "00";
+ end if;
+ when st5 =>
+ if std_match(input, "--01") then next_state <= st5; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st5; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st5; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st4; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st6; output <= "00";
+ end if;
+ when st6 =>
+ if std_match(input, "--01") then next_state <= st6; output <= "01";
+ elsif std_match(input, "--10") then next_state <= st6; output <= "01";
+ elsif std_match(input, "--00") then next_state <= st6; output <= "01";
+ elsif std_match(input, "0011") then next_state <= st7; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st6; output <= "01";
+ end if;
+ when st7 =>
+ if std_match(input, "--01") then next_state <= st7; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st7; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st7; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st8; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st8 =>
+ if std_match(input, "--01") then next_state <= st8; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st8; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st8; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st9; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st9 =>
+ if std_match(input, "--01") then next_state <= st9; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st9; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st9; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st0; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when others => next_state <= "----"; output <= "--";
+ end case;
+ end process;
+end behaviour;
View
114 kiss/bbara_rnd.vhd
@@ -0,0 +1,114 @@
+library ieee;
+use ieee.numeric_std.all;
+use ieee.std_logic_1164.all;
+entity bbara_rnd is
+ port(
+ clock: in std_logic;
+ input: in std_logic_vector(3 downto 0);
+ output: out std_logic_vector(1 downto 0)
+ );
+end bbara_rnd;
+architecture behaviour of bbara_rnd is
+ constant st0: std_logic_vector(3 downto 0) := "1101";
+ constant st1: std_logic_vector(3 downto 0) := "0010";
+ constant st4: std_logic_vector(3 downto 0) := "1011";
+ constant st2: std_logic_vector(3 downto 0) := "1110";
+ constant st3: std_logic_vector(3 downto 0) := "1111";
+ constant st7: std_logic_vector(3 downto 0) := "0001";
+ constant st5: std_logic_vector(3 downto 0) := "0110";
+ constant st6: std_logic_vector(3 downto 0) := "0000";
+ constant st8: std_logic_vector(3 downto 0) := "1010";
+ constant st9: std_logic_vector(3 downto 0) := "1000";
+ signal current_state, next_state: std_logic_vector(3 downto 0);
+begin
+ process(clock) begin
+ if rising_edge(clock) then current_state <= next_state;
+ end if;
+ end process;
+ process(input, current_state) begin
+ next_state <= "----"; output <= "--";
+ case current_state is
+ when st0 =>
+ if std_match(input, "--01") then next_state <= st0; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st0; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st0; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st0; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st1 =>
+ if std_match(input, "--01") then next_state <= st1; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st1; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st1; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st0; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st2; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st2 =>
+ if std_match(input, "--01") then next_state <= st2; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st2; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st2; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st1; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st3; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st3 =>
+ if std_match(input, "--01") then next_state <= st3; output <= "10";
+ elsif std_match(input, "--10") then next_state <= st3; output <= "10";
+ elsif std_match(input, "--00") then next_state <= st3; output <= "10";
+ elsif std_match(input, "0011") then next_state <= st7; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st3; output <= "10";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st4 =>
+ if std_match(input, "--01") then next_state <= st4; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st4; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st4; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st0; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st5; output <= "00";
+ end if;
+ when st5 =>
+ if std_match(input, "--01") then next_state <= st5; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st5; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st5; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st4; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st6; output <= "00";
+ end if;
+ when st6 =>
+ if std_match(input, "--01") then next_state <= st6; output <= "01";
+ elsif std_match(input, "--10") then next_state <= st6; output <= "01";
+ elsif std_match(input, "--00") then next_state <= st6; output <= "01";
+ elsif std_match(input, "0011") then next_state <= st7; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st6; output <= "01";
+ end if;
+ when st7 =>
+ if std_match(input, "--01") then next_state <= st7; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st7; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st7; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st8; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st8 =>
+ if std_match(input, "--01") then next_state <= st8; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st8; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st8; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st9; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when st9 =>
+ if std_match(input, "--01") then next_state <= st9; output <= "00";
+ elsif std_match(input, "--10") then next_state <= st9; output <= "00";
+ elsif std_match(input, "--00") then next_state <= st9; output <= "00";
+ elsif std_match(input, "0011") then next_state <= st0; output <= "00";
+ elsif std_match(input, "-111") then next_state <= st1; output <= "00";
+ elsif std_match(input, "1011") then next_state <= st4; output <= "00";
+ end if;
+ when others => next_state <= "----"; output <= "--";
+ end case;
+ end process;
+end behaviour;
View
128 kiss/bbsse_hot.vhd
@@ -0,0 +1,128 @@
+library ieee;
+use ieee.numeric_std.all;
+use ieee.std_logic_1164.all;
+entity bbsse_hot is
+ port(
+ clock: in std_logic;
+ input: in std_logic_vector(6 downto 0);
+ output: out std_logic_vector(6 downto 0)
+ );
+end bbsse_hot;
+architecture behaviour of bbsse_hot is
+ constant st0: std_logic_vector(15 downto 0) := "1000000000000000";
+ constant st1: std_logic_vector(15 downto 0) := "0100000000000000";
+ constant st11: std_logic_vector(15 downto 0) := "0010000000000000";
+ constant st4: std_logic_vector(15 downto 0) := "0001000000000000";
+ constant st2: std_logic_vector(15 downto 0) := "0000100000000000";
+ constant st3: std_logic_vector(15 downto 0) := "0000010000000000";
+ constant st5: std_logic_vector(15 downto 0) := "0000001000000000";
+ constant st6: std_logic_vector(15 downto 0) := "0000000100000000";
+ constant st7: std_logic_vector(15 downto 0) := "0000000010000000";
+ constant st8: std_logic_vector(15 downto 0) := "0000000001000000";
+ constant st9: std_logic_vector(15 downto 0) := "0000000000100000";
+ constant st10: std_logic_vector(15 downto 0) := "0000000000010000";
+ constant st12: std_logic_vector(15 downto 0) := "0000000000001000";
+ constant st13: std_logic_vector(15 downto 0) := "0000000000000100";
+ constant st14: std_logic_vector(15 downto 0) := "0000000000000010";
+ constant st15: std_logic_vector(15 downto 0) := "0000000000000001";
+ signal current_state, next_state: std_logic_vector(15 downto 0);
+begin
+ process(clock) begin
+ if rising_edge(clock) then current_state <= next_state;
+ end if;
+ end process;
+ process(input, current_state) begin
+ next_state <= "----------------"; output <= "-------";
+ case current_state is
+ when st0 =>
+ if std_match(input, "0------") then next_state <= st0; output <= "0000000";
+ elsif std_match(input, "10----0") then next_state <= st1; output <= "00110-0";
+ elsif std_match(input, "10----1") then next_state <= st1; output <= "00010-0";
+ elsif std_match(input, "11----0") then next_state <= st11; output <= "0011010";
+ elsif std_match(input, "11----1") then next_state <= st11; output <= "0001010";
+ end if;
+ when st1 =>
+ if std_match(input, "100----") then next_state <= st1; output <= "00000-0";
+ elsif std_match(input, "101-1--") then next_state <= st4; output <= "10000-0";
+ elsif std_match(input, "101-0--") then next_state <= st2; output <= "10000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st2 =>
+ if std_match(input, "10-----") then next_state <= st3; output <= "00000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st3 =>
+ if std_match(input, "10--0--") then next_state <= st2; output <= "10000-0";
+ elsif std_match(input, "10--1--") then next_state <= st4; output <= "10000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st4 =>
+ if std_match(input, "10-----") then next_state <= st5; output <= "00000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st5 =>
+ if std_match(input, "10-1---") then next_state <= st4; output <= "10000-0";
+ elsif std_match(input, "10--1--") then next_state <= st4; output <= "10000-0";
+ elsif std_match(input, "10-00--") then next_state <= st6; output <= "0100010";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st6 =>
+ if std_match(input, "10---0-") then next_state <= st6; output <= "0100000";
+ elsif std_match(input, "10---1-") then next_state <= st7; output <= "01000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st7 =>
+ if std_match(input, "10-----") then next_state <= st8; output <= "0000010";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st8 =>
+ if std_match(input, "10---0-") then next_state <= st8; output <= "0000000";
+ elsif std_match(input, "10---1-") then next_state <= st9; output <= "10000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st9 =>
+ if std_match(input, "10-----") then next_state <= st10; output <= "00000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st10 =>
+ if std_match(input, "1001---") then next_state <= st10; output <= "00000-0";
+ elsif std_match(input, "10-01--") then next_state <= st1; output <= "00010-0";
+ elsif std_match(input, "10-00--") then next_state <= st6; output <= "0100010";
+ elsif std_match(input, "1011---") then next_state <= st9; output <= "10000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st11 =>
+ if std_match(input, "0----0-") then next_state <= st11; output <= "000--00";
+ elsif std_match(input, "11---0-") then next_state <= st11; output <= "0000000";
+ elsif std_match(input, "0----1-") then next_state <= st0; output <= "000---1";
+ elsif std_match(input, "10-----") then next_state <= st1; output <= "00000-0";
+ elsif std_match(input, "11---1-") then next_state <= st12; output <= "00001-0";
+ end if;
+ when st12 =>
+ if std_match(input, "11-----") then next_state <= st12; output <= "00001-0";
+ elsif std_match(input, "10-----") then next_state <= st1; output <= "00000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ end if;
+ when st13 =>
+ if std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ end if;
+ when st14 =>
+ if std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ end if;
+ when st15 =>
+ if std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ end if;
+ when others => next_state <= "----------------"; output <= "-------";
+ end case;
+ end process;
+end behaviour;
View
128 kiss/bbsse_jed.vhd
@@ -0,0 +1,128 @@
+library ieee;
+use ieee.numeric_std.all;
+use ieee.std_logic_1164.all;
+entity bbsse_jed is
+ port(
+ clock: in std_logic;
+ input: in std_logic_vector(6 downto 0);
+ output: out std_logic_vector(6 downto 0)
+ );
+end bbsse_jed;
+architecture behaviour of bbsse_jed is
+ constant st0: std_logic_vector(3 downto 0) := "0010";
+ constant st1: std_logic_vector(3 downto 0) := "0011";
+ constant st11: std_logic_vector(3 downto 0) := "1011";
+ constant st4: std_logic_vector(3 downto 0) := "1001";
+ constant st2: std_logic_vector(3 downto 0) := "0001";
+ constant st3: std_logic_vector(3 downto 0) := "0000";
+ constant st5: std_logic_vector(3 downto 0) := "1000";
+ constant st6: std_logic_vector(3 downto 0) := "1111";
+ constant st7: std_logic_vector(3 downto 0) := "1110";
+ constant st8: std_logic_vector(3 downto 0) := "1101";
+ constant st9: std_logic_vector(3 downto 0) := "0101";
+ constant st10: std_logic_vector(3 downto 0) := "0111";
+ constant st12: std_logic_vector(3 downto 0) := "1010";
+ constant st13: std_logic_vector(3 downto 0) := "1100";
+ constant st14: std_logic_vector(3 downto 0) := "0100";
+ constant st15: std_logic_vector(3 downto 0) := "0110";
+ signal current_state, next_state: std_logic_vector(3 downto 0);
+begin
+ process(clock) begin
+ if rising_edge(clock) then current_state <= next_state;
+ end if;
+ end process;
+ process(input, current_state) begin
+ next_state <= "----"; output <= "-------";
+ case current_state is
+ when st0 =>
+ if std_match(input, "0------") then next_state <= st0; output <= "0000000";
+ elsif std_match(input, "10----0") then next_state <= st1; output <= "00110-0";
+ elsif std_match(input, "10----1") then next_state <= st1; output <= "00010-0";
+ elsif std_match(input, "11----0") then next_state <= st11; output <= "0011010";
+ elsif std_match(input, "11----1") then next_state <= st11; output <= "0001010";
+ end if;
+ when st1 =>
+ if std_match(input, "100----") then next_state <= st1; output <= "00000-0";
+ elsif std_match(input, "101-1--") then next_state <= st4; output <= "10000-0";
+ elsif std_match(input, "101-0--") then next_state <= st2; output <= "10000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st2 =>
+ if std_match(input, "10-----") then next_state <= st3; output <= "00000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st3 =>
+ if std_match(input, "10--0--") then next_state <= st2; output <= "10000-0";
+ elsif std_match(input, "10--1--") then next_state <= st4; output <= "10000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st4 =>
+ if std_match(input, "10-----") then next_state <= st5; output <= "00000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st5 =>
+ if std_match(input, "10-1---") then next_state <= st4; output <= "10000-0";
+ elsif std_match(input, "10--1--") then next_state <= st4; output <= "10000-0";
+ elsif std_match(input, "10-00--") then next_state <= st6; output <= "0100010";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st6 =>
+ if std_match(input, "10---0-") then next_state <= st6; output <= "0100000";
+ elsif std_match(input, "10---1-") then next_state <= st7; output <= "01000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st7 =>
+ if std_match(input, "10-----") then next_state <= st8; output <= "0000010";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st8 =>
+ if std_match(input, "10---0-") then next_state <= st8; output <= "0000000";
+ elsif std_match(input, "10---1-") then next_state <= st9; output <= "10000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st9 =>
+ if std_match(input, "10-----") then next_state <= st10; output <= "00000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st10 =>
+ if std_match(input, "1001---") then next_state <= st10; output <= "00000-0";
+ elsif std_match(input, "10-01--") then next_state <= st1; output <= "00010-0";
+ elsif std_match(input, "10-00--") then next_state <= st6; output <= "0100010";
+ elsif std_match(input, "1011---") then next_state <= st9; output <= "10000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st11 =>
+ if std_match(input, "0----0-") then next_state <= st11; output <= "000--00";
+ elsif std_match(input, "11---0-") then next_state <= st11; output <= "0000000";
+ elsif std_match(input, "0----1-") then next_state <= st0; output <= "000---1";
+ elsif std_match(input, "10-----") then next_state <= st1; output <= "00000-0";
+ elsif std_match(input, "11---1-") then next_state <= st12; output <= "00001-0";
+ end if;
+ when st12 =>
+ if std_match(input, "11-----") then next_state <= st12; output <= "00001-0";
+ elsif std_match(input, "10-----") then next_state <= st1; output <= "00000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ end if;
+ when st13 =>
+ if std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ end if;
+ when st14 =>
+ if std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ end if;
+ when st15 =>
+ if std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ end if;
+ when others => next_state <= "----"; output <= "-------";
+ end case;
+ end process;
+end behaviour;
View
128 kiss/bbsse_nov.vhd
@@ -0,0 +1,128 @@
+library ieee;
+use ieee.numeric_std.all;
+use ieee.std_logic_1164.all;
+entity bbsse_nov is
+ port(
+ clock: in std_logic;
+ input: in std_logic_vector(6 downto 0);
+ output: out std_logic_vector(6 downto 0)
+ );
+end bbsse_nov;
+architecture behaviour of bbsse_nov is
+ constant st0: std_logic_vector(3 downto 0) := "1100";
+ constant st1: std_logic_vector(3 downto 0) := "0000";
+ constant st2: std_logic_vector(3 downto 0) := "0111";
+ constant st3: std_logic_vector(3 downto 0) := "0001";
+ constant st4: std_logic_vector(3 downto 0) := "0110";
+ constant st5: std_logic_vector(3 downto 0) := "0011";
+ constant st6: std_logic_vector(3 downto 0) := "0101";
+ constant st7: std_logic_vector(3 downto 0) := "0100";
+ constant st8: std_logic_vector(3 downto 0) := "1011";
+ constant st9: std_logic_vector(3 downto 0) := "1010";
+ constant st10: std_logic_vector(3 downto 0) := "0010";
+ constant st11: std_logic_vector(3 downto 0) := "1101";
+ constant st12: std_logic_vector(3 downto 0) := "1001";
+ constant st13: std_logic_vector(3 downto 0) := "1000";
+ constant st14: std_logic_vector(3 downto 0) := "1111";
+ constant st15: std_logic_vector(3 downto 0) := "1110";
+ signal current_state, next_state: std_logic_vector(3 downto 0);
+begin
+ process(clock) begin
+ if rising_edge(clock) then current_state <= next_state;
+ end if;
+ end process;
+ process(input, current_state) begin
+ next_state <= "----"; output <= "-------";
+ case current_state is
+ when st0 =>
+ if std_match(input, "0------") then next_state <= st0; output <= "0000000";
+ elsif std_match(input, "10----0") then next_state <= st1; output <= "00110-0";
+ elsif std_match(input, "10----1") then next_state <= st1; output <= "00010-0";
+ elsif std_match(input, "11----0") then next_state <= st11; output <= "0011010";
+ elsif std_match(input, "11----1") then next_state <= st11; output <= "0001010";
+ end if;
+ when st1 =>
+ if std_match(input, "100----") then next_state <= st1; output <= "00000-0";
+ elsif std_match(input, "101-1--") then next_state <= st4; output <= "10000-0";
+ elsif std_match(input, "101-0--") then next_state <= st2; output <= "10000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st2 =>
+ if std_match(input, "10-----") then next_state <= st3; output <= "00000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st3 =>
+ if std_match(input, "10--0--") then next_state <= st2; output <= "10000-0";
+ elsif std_match(input, "10--1--") then next_state <= st4; output <= "10000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st4 =>
+ if std_match(input, "10-----") then next_state <= st5; output <= "00000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st5 =>
+ if std_match(input, "10-1---") then next_state <= st4; output <= "10000-0";
+ elsif std_match(input, "10--1--") then next_state <= st4; output <= "10000-0";
+ elsif std_match(input, "10-00--") then next_state <= st6; output <= "0100010";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st6 =>
+ if std_match(input, "10---0-") then next_state <= st6; output <= "0100000";
+ elsif std_match(input, "10---1-") then next_state <= st7; output <= "01000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st7 =>
+ if std_match(input, "10-----") then next_state <= st8; output <= "0000010";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st8 =>
+ if std_match(input, "10---0-") then next_state <= st8; output <= "0000000";
+ elsif std_match(input, "10---1-") then next_state <= st9; output <= "10000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st9 =>
+ if std_match(input, "10-----") then next_state <= st10; output <= "00000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st10 =>
+ if std_match(input, "1001---") then next_state <= st10; output <= "00000-0";
+ elsif std_match(input, "10-01--") then next_state <= st1; output <= "00010-0";
+ elsif std_match(input, "10-00--") then next_state <= st6; output <= "0100010";
+ elsif std_match(input, "1011---") then next_state <= st9; output <= "10000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st11 =>
+ if std_match(input, "0----0-") then next_state <= st11; output <= "000--00";
+ elsif std_match(input, "11---0-") then next_state <= st11; output <= "0000000";
+ elsif std_match(input, "0----1-") then next_state <= st0; output <= "000---1";
+ elsif std_match(input, "10-----") then next_state <= st1; output <= "00000-0";
+ elsif std_match(input, "11---1-") then next_state <= st12; output <= "00001-0";
+ end if;
+ when st12 =>
+ if std_match(input, "11-----") then next_state <= st12; output <= "00001-0";
+ elsif std_match(input, "10-----") then next_state <= st1; output <= "00000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ end if;
+ when st13 =>
+ if std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ end if;
+ when st14 =>
+ if std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ end if;
+ when st15 =>
+ if std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ end if;
+ when others => next_state <= "----"; output <= "-------";
+ end case;
+ end process;
+end behaviour;
View
128 kiss/bbsse_rnd.vhd
@@ -0,0 +1,128 @@
+library ieee;
+use ieee.numeric_std.all;
+use ieee.std_logic_1164.all;
+entity bbsse_rnd is
+ port(
+ clock: in std_logic;
+ input: in std_logic_vector(6 downto 0);
+ output: out std_logic_vector(6 downto 0)
+ );
+end bbsse_rnd;
+architecture behaviour of bbsse_rnd is
+ constant st0: std_logic_vector(3 downto 0) := "1101";
+ constant st1: std_logic_vector(3 downto 0) := "0010";
+ constant st11: std_logic_vector(3 downto 0) := "1011";
+ constant st4: std_logic_vector(3 downto 0) := "1110";
+ constant st2: std_logic_vector(3 downto 0) := "1111";
+ constant st3: std_logic_vector(3 downto 0) := "0001";
+ constant st5: std_logic_vector(3 downto 0) := "0110";
+ constant st6: std_logic_vector(3 downto 0) := "0000";
+ constant st7: std_logic_vector(3 downto 0) := "1010";
+ constant st8: std_logic_vector(3 downto 0) := "1000";
+ constant st9: std_logic_vector(3 downto 0) := "0100";
+ constant st10: std_logic_vector(3 downto 0) := "1001";
+ constant st12: std_logic_vector(3 downto 0) := "1100";
+ constant st13: std_logic_vector(3 downto 0) := "0011";
+ constant st14: std_logic_vector(3 downto 0) := "0111";
+ constant st15: std_logic_vector(3 downto 0) := "0101";
+ signal current_state, next_state: std_logic_vector(3 downto 0);
+begin
+ process(clock) begin
+ if rising_edge(clock) then current_state <= next_state;
+ end if;
+ end process;
+ process(input, current_state) begin
+ next_state <= "----"; output <= "-------";
+ case current_state is
+ when st0 =>
+ if std_match(input, "0------") then next_state <= st0; output <= "0000000";
+ elsif std_match(input, "10----0") then next_state <= st1; output <= "00110-0";
+ elsif std_match(input, "10----1") then next_state <= st1; output <= "00010-0";
+ elsif std_match(input, "11----0") then next_state <= st11; output <= "0011010";
+ elsif std_match(input, "11----1") then next_state <= st11; output <= "0001010";
+ end if;
+ when st1 =>
+ if std_match(input, "100----") then next_state <= st1; output <= "00000-0";
+ elsif std_match(input, "101-1--") then next_state <= st4; output <= "10000-0";
+ elsif std_match(input, "101-0--") then next_state <= st2; output <= "10000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st2 =>
+ if std_match(input, "10-----") then next_state <= st3; output <= "00000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st3 =>
+ if std_match(input, "10--0--") then next_state <= st2; output <= "10000-0";
+ elsif std_match(input, "10--1--") then next_state <= st4; output <= "10000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st4 =>
+ if std_match(input, "10-----") then next_state <= st5; output <= "00000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st5 =>
+ if std_match(input, "10-1---") then next_state <= st4; output <= "10000-0";
+ elsif std_match(input, "10--1--") then next_state <= st4; output <= "10000-0";
+ elsif std_match(input, "10-00--") then next_state <= st6; output <= "0100010";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st6 =>
+ if std_match(input, "10---0-") then next_state <= st6; output <= "0100000";
+ elsif std_match(input, "10---1-") then next_state <= st7; output <= "01000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st7 =>
+ if std_match(input, "10-----") then next_state <= st8; output <= "0000010";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st8 =>
+ if std_match(input, "10---0-") then next_state <= st8; output <= "0000000";
+ elsif std_match(input, "10---1-") then next_state <= st9; output <= "10000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st9 =>
+ if std_match(input, "10-----") then next_state <= st10; output <= "00000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st10 =>
+ if std_match(input, "1001---") then next_state <= st10; output <= "00000-0";
+ elsif std_match(input, "10-01--") then next_state <= st1; output <= "00010-0";
+ elsif std_match(input, "10-00--") then next_state <= st6; output <= "0100010";
+ elsif std_match(input, "1011---") then next_state <= st9; output <= "10000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ elsif std_match(input, "11-----") then next_state <= st11; output <= "0000010";
+ end if;
+ when st11 =>
+ if std_match(input, "0----0-") then next_state <= st11; output <= "000--00";
+ elsif std_match(input, "11---0-") then next_state <= st11; output <= "0000000";
+ elsif std_match(input, "0----1-") then next_state <= st0; output <= "000---1";
+ elsif std_match(input, "10-----") then next_state <= st1; output <= "00000-0";
+ elsif std_match(input, "11---1-") then next_state <= st12; output <= "00001-0";
+ end if;
+ when st12 =>
+ if std_match(input, "11-----") then next_state <= st12; output <= "00001-0";
+ elsif std_match(input, "10-----") then next_state <= st1; output <= "00000-0";
+ elsif std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ end if;
+ when st13 =>
+ if std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ end if;
+ when st14 =>
+ if std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ end if;
+ when st15 =>
+ if std_match(input, "0------") then next_state <= st11; output <= "000--10";
+ end if;
+ when others => next_state <= "----"; output <= "-------";
+ end case;
+ end process;
+end behaviour;
View
66 kiss/bbtas_hot.vhd
@@ -0,0 +1,66 @@
+library ieee;
+use ieee.numeric_std.all;
+use ieee.std_logic_1164.all;
+entity bbtas_hot is
+ port(
+ clock: in std_logic;
+ input: in std_logic_vector(1 downto 0);
+ output: out std_logic_vector(1 downto 0)
+ );
+end bbtas_hot;
+architecture behaviour of bbtas_hot is
+ constant st0: std_logic_vector(5 downto 0) := "100000";
+ constant st1: std_logic_vector(5 downto 0) := "010000";
+ constant st2: std_logic_vector(5 downto 0) := "001000";
+ constant st3: std_logic_vector(5 downto 0) := "000100";
+ constant st4: std_logic_vector(5 downto 0) := "000010";
+ constant st5: std_logic_vector(5 downto 0) := "000001";
+ signal current_state, next_state: std_logic_vector(5 downto 0);
+begin
+ process(clock) begin
+ if rising_edge(clock) then current_state <= next_state;
+ end if;
+ end process;
+ process(input, current_state) begin
+ next_state <= "------"; output <= "--";
+ case current_state is
+ when st0 =>
+ if std_match(input, "00") then next_state <= st0; output <= "00";
+ elsif std_match(input, "01") then next_state <= st1; output <= "00";
+ elsif std_match(input, "10") then next_state <= st1; output <= "00";
+ elsif std_match(input, "11") then next_state <= st1; output <= "00";
+ end if;
+ when st1 =>
+ if std_match(input, "00") then next_state <= st0; output <= "00";
+ elsif std_match(input, "01") then next_state <= st2; output <= "00";
+ elsif std_match(input, "10") then next_state <= st2; output <= "00";
+ elsif std_match(input, "11") then next_state <= st2; output <= "00";
+ end if;
+ when st2 =>
+ if std_match(input, "00") then next_state <= st1; output <= "00";
+ elsif std_match(input, "01") then next_state <= st3; output <= "00";
+ elsif std_match(input, "10") then next_state <= st3; output <= "00";
+ elsif std_match(input, "11") then next_state <= st3; output <= "00";
+ end if;
+ when st3 =>
+ if std_match(input, "00") then next_state <= st4; output <= "00";
+ elsif std_match(input, "01") then next_state <= st3; output <= "01";
+ elsif std_match(input, "10") then next_state <= st3; output <= "10";
+ elsif std_match(input, "11") then next_state <= st3; output <= "11";
+ end if;
+ when st4 =>
+ if std_match(input, "00") then next_state <= st5; output <= "00";
+ elsif std_match(input, "01") then next_state <= st4; output <= "00";
+ elsif std_match(input, "10") then next_state <= st4; output <= "00";
+ elsif std_match(input, "11") then next_state <= st4; output <= "00";
+ end if;
+ when st5 =>
+ if std_match(input, "00") then next_state <= st0; output <= "00";
+ elsif std_match(input, "01") then next_state <= st5; output <= "00";
+ elsif std_match(input, "10") then next_state <= st5; output <= "00";
+ elsif std_match(input, "11") then next_state <= st5; output <= "00";
+ end if;
+ when others => next_state <= "------"; output <= "--";
+ end case;
+ end process;
+end behaviour;
View
66 kiss/bbtas_jed.vhd
@@ -0,0 +1,66 @@
+library ieee;
+use ieee.numeric_std.all;
+use ieee.std_logic_1164.all;
+entity bbtas_jed is
+ port(
+ clock: in std_logic;
+ input: in std_logic_vector(1 downto 0);
+ output: out std_logic_vector(1 downto 0)
+ );
+end bbtas_jed;
+architecture behaviour of bbtas_jed is
+ constant st0: std_logic_vector(2 downto 0) := "000";
+ constant st1: std_logic_vector(2 downto 0) := "001";
+ constant st2: std_logic_vector(2 downto 0) := "100";
+ constant st3: std_logic_vector(2 downto 0) := "101";
+ constant st4: std_logic_vector(2 downto 0) := "111";
+ constant st5: std_logic_vector(2 downto 0) := "011";
+ signal current_state, next_state: std_logic_vector(2 downto 0);
+begin
+ process(clock) begin
+ if rising_edge(clock) then current_state <= next_state;
+ end if;
+ end process;
+ process(input, current_state) begin
+ next_state <= "---"; output <= "--";
+ case current_state is
+ when st0 =>
+ if std_match(input, "00") then next_state <= st0; output <= "00";
+ elsif std_match(input, "01") then next_state <= st1; output <= "00";
+ elsif std_match(input, "10") then next_state <= st1; output <= "00";
+ elsif std_match(input, "11") then next_state <= st1; output <= "00";
+ end if;
+ when st1 =>
+ if std_match(input, "00") then next_state <= st0; output <= "00";
+ elsif std_match(input, "01") then next_state <= st2; output <= "00";
+ elsif std_match(input, "10") then next_state <= st2; output <= "00";
+ elsif std_match(input, "11") then next_state <= st2; output <= "00";
+ end if;
+ when st2 =>
+ if std_match(input, "00") then next_state <= st1; output <= "00";
+ elsif std_match(input, "01") then next_state <= st3; output <= "00";
+ elsif std_match(input, "10") then next_state <= st3; output <= "00";
+ elsif std_match(input, "11") then next_state <= st3; output <= "00";
+ end if;
+ when st3 =>
+ if std_match(input, "00") then next_state <= st4; output <= "00";
+ elsif std_match(input, "01") then next_state <= st3; output <= "01";
+ elsif std_match(input, "10") then next_state <= st3; output <= "10";
+ elsif std_match(input, "11") then next_state <= st3; output <= "11";
+ end if;
+ when st4 =>
+ if std_match(input, "00") then next_state <= st5; output <= "00";
+ elsif std_match(input, "01") then next_state <= st4; output <= "00";
+ elsif std_match(input, "10") then next_state <= st4; output <= "00";
+ elsif std_match(input, "11") then next_state <= st4; output <= "00";
+ end if;
+ when st5 =>
+ if std_match(input, "00") then next_state <= st0; output <= "00";
+ elsif std_match(input, "01") then next_state <= st5; output <= "00";
+ elsif std_match(input, "10") then next_state <= st5; output <= "00";
+ elsif std_match(input, "11") then next_state <= st5; output <= "00";
+ end if;
+ when others => next_state <= "---"; output <= "--";
+ end case;
+ end process;
+end behaviour;
View
66 kiss/bbtas_nov.vhd
@@ -0,0 +1,66 @@
+library ieee;
+use ieee.numeric_std.all;
+use ieee.std_logic_1164.all;
+entity bbtas_nov is
+ port(
+ clock: in std_logic;
+ input: in std_logic_vector(1 downto 0);
+ output: out std_logic_vector(1 downto 0)
+ );
+end bbtas_nov;
+architecture behaviour of bbtas_nov is
+ constant st0: std_logic_vector(2 downto 0) := "011";
+ constant st1: std_logic_vector(2 downto 0) := "000";
+ constant st2: std_logic_vector(2 downto 0) := "101";
+ constant st3: std_logic_vector(2 downto 0) := "110";
+ constant st4: std_logic_vector(2 downto 0) := "001";
+ constant st5: std_logic_vector(2 downto 0) := "010";
+ signal current_state, next_state: std_logic_vector(2 downto 0);
+begin
+ process(clock) begin
+ if rising_edge(clock) then current_state <= next_state;
+ end if;
+ end process;
+ process(input, current_state) begin
+ next_state <= "---"; output <= "--";
+ case current_state is
+ when st0 =>
+ if std_match(input, "00") then next_state <= st0; output <= "00";
+ elsif std_match(input, "01") then next_state <= st1; output <= "00";
+ elsif std_match(input, "10") then next_state <= st1; output <= "00";
+ elsif std_match(input, "11") then next_state <= st1; output <= "00";
+ end if;
+ when st1 =>
+ if std_match(input, "00") then next_state <= st0; output <= "00";
+ elsif std_match(input, "01") then next_state <= st2; output <= "00";
+ elsif std_match(input, "10") then next_state <= st2; output <= "00";
+ elsif std_match(input, "11") then next_state <= st2; output <= "00";
+ end if;
+ when st2 =>
+ if std_match(input, "00") then next_state <= st1; output <= "00";
+ elsif std_match(input, "01") then next_state <= st3; output <= "00";
+ elsif std_match(input, "10") then next_state <= st3; output <= "00";
+ elsif std_match(input, "11") then next_state <= st3; output <= "00";
+ end if;
+ when st3 =>
+ if std_match(input, "00") then next_state <= st4; output <= "00";
+ elsif std_match(input, "01") then next_state <= st3; output <= "01";
+ elsif std_match(input, "10") then next_state <= st3; output <= "10";
+ elsif std_match(input, "11") then next_state <= st3; output <= "11";
+ end if;
+ when st4 =>
+ if std_match(input, "00") then next_state <= st5; output <= "00";
+ elsif std_match(input, "01") then next_state <= st4; output <= "00";
+ elsif std_match(input, "10") then next_state <= st4; output <= "00";
+ elsif std_match(input, "11") then next_state <= st4; output <= "00";
+ end if;
+ when st5 =>
+ if std_match(input, "00") then next_state <= st0; output <= "00";
+ elsif std_match(input, "01") then next_state <= st5; output <= "00";
+ elsif std_match(input, "10") then next_state <= st5; output <= "00";
+ elsif std_match(input, "11") then next_state <= st5; output <= "00";
+ end if;
+ when others => next_state <= "---"; output <= "--";
+ end case;
+ end process;
+end behaviour;
View
66 kiss/bbtas_rnd.vhd
@@ -0,0 +1,66 @@
+library ieee;
+use ieee.numeric_std.all;
+use ieee.std_logic_1164.all;
+entity bbtas_rnd is
+ port(
+ clock: in std_logic;
+ input: in std_logic_vector(1 downto 0);
+ output: out std_logic_vector(1 downto 0)
+ );
+end bbtas_rnd;
+architecture behaviour of bbtas_rnd is
+ constant st0: std_logic_vector(2 downto 0) := "101";
+ constant st1: std_logic_vector(2 downto 0) := "010";
+ constant st2: std_logic_vector(2 downto 0) := "011";
+ constant st3: std_logic_vector(2 downto 0) := "110";
+ constant st4: std_logic_vector(2 downto 0) := "111";
+ constant st5: std_logic_vector(2 downto 0) := "001";
+ signal current_state, next_state: std_logic_vector(2 downto 0);
+begin
+ process(clock) begin
+ if rising_edge(clock) then current_state <= next_state;
+ end if;
+ end process;
+ process(input, current_state) begin
+ next_state <= "---"; output <= "--";
+ case current_state is
+ when st0 =>
+ if std_match(input, "00") then next_state <= st0; output <= "00";
+ elsif std_match(input, "01") then next_state <= st1; output <= "00";
+ elsif std_match(input, "10") then next_state <= st1; output <= "00";
+ elsif std_match(input, "11") then next_state <= st1; output <= "00";
+ end if;
+ when st1 =>
+ if std_match(input, "00") then next_state <= st0; output <= "00";
+ elsif std_match(input, "01") then next_state <= st2; output <= "00";
+ elsif std_match(input, "10") then next_state <= st2; output <= "00";
+ elsif std_match(input, "11") then next_state <= st2; output <= "00";
+ end if;
+ when st2 =>
+ if std_match(input, "00") then next_state <= st1; output <= "00";
+ elsif std_match(input, "01") then next_state <= st3; output <= "00";
+ elsif std_match(input, "10") then next_state <= st3; output <= "00";
+ elsif std_match(input, "11") then next_state <= st3; output <= "00";
+ end if;
+ when st3 =>
+ if std_match(input, "00") then next_state <= st4; output <= "00";
+ elsif std_match(input, "01") then next_state <= st3; output <= "01";
+ elsif std_match(input, "10") then next_state <= st3; output <= "10";
+ elsif std_match(input, "11") then next_state <= st3; output <= "11";
+ end if;
+ when st4 =>
+ if std_match(input, "00") then next_state <= st5; output <= "00";
+ elsif std_match(input, "01") then next_state <= st4; output <= "00";
+ elsif std_match(input, "10") then next_state <= st4; output <= "00";
+ elsif std_match(input, "11") then next_state <= st4; output <= "00";
+ end if;
+ when st5 =>
+ if std_match(input, "00") then next_state <= st0; output <= "00";
+ elsif std_match(input, "01") then next_state <= st5; output <= "00";
+ elsif std_match(input, "10") then next_state <= st5; output <= "00";
+ elsif std_match(input, "11") then next_state <= st5; output <= "00";
+ end if;
+ when others => next_state <= "---"; output <= "--";
+ end case;
+ end process;
+end behaviour;
View
73 kiss/beecount_hot.vhd
@@ -0,0 +1,73 @@
+library ieee;
+use ieee.numeric_std.all;
+use ieee.std_logic_1164.all;
+entity beecount_hot is
+ port(
+ clock: in std_logic;
+ input: in std_logic_vector(2 downto 0);
+ output: out std_logic_vector(3 downto 0)
+ );
+end beecount_hot;
+architecture behaviour of beecount_hot is
+ constant st0: std_logic_vector(6 downto 0) := "1000000";
+ constant st1: std_logic_vector(6 downto 0) := "0100000";
+ constant st4: std_logic_vector(6 downto 0) := "0010000";
+ constant st2: std_logic_vector(6 downto 0) := "0001000";
+ constant st3: std_logic_vector(6 downto 0) := "0000100";
+ constant st5: std_logic_vector(6 downto 0) := "0000010";
+ constant st6: std_logic_vector(6 downto 0) := "0000001";
+ signal current_state, next_state: std_logic_vector(6 downto 0);
+begin
+ process(clock) begin
+ if rising_edge(clock) then current_state <= next_state;
+ end if;
+ end process;
+ process(input, current_state) begin
+ next_state <= "-------"; output <= "----";
+ case current_state is
+ when st0 =>
+ if std_match(input, "000") then next_state <= st0; output <= "0101";
+ elsif std_match(input, "100") then next_state <= st1; output <= "0101";
+ elsif std_match(input, "010") then next_state <= st4; output <= "0101";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st1 =>
+ if std_match(input, "100") then next_state <= st1; output <= "0101";
+ elsif std_match(input, "0-0") then next_state <= st0; output <= "0101";
+ elsif std_match(input, "110") then next_state <= st2; output <= "0101";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st2 =>
+ if std_match(input, "110") then next_state <= st2; output <= "0101";
+ elsif std_match(input, "100") then next_state <= st1; output <= "0101";
+ elsif std_match(input, "010") then next_state <= st3; output <= "0101";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st3 =>
+ if std_match(input, "010") then next_state <= st3; output <= "0101";
+ elsif std_match(input, "110") then next_state <= st2; output <= "0101";
+ elsif std_match(input, "000") then next_state <= st0; output <= "0110";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st4 =>
+ if std_match(input, "010") then next_state <= st4; output <= "0101";
+ elsif std_match(input, "-00") then next_state <= st0; output <= "0101";
+ elsif std_match(input, "110") then next_state <= st5; output <= "0101";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st5 =>
+ if std_match(input, "110") then next_state <= st5; output <= "0101";
+ elsif std_match(input, "010") then next_state <= st4; output <= "0101";
+ elsif std_match(input, "100") then next_state <= st6; output <= "0101";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st6 =>
+ if std_match(input, "100") then next_state <= st6; output <= "0101";
+ elsif std_match(input, "110") then next_state <= st5; output <= "0101";
+ elsif std_match(input, "000") then next_state <= st0; output <= "1001";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when others => next_state <= "-------"; output <= "----";
+ end case;
+ end process;
+end behaviour;
View
73 kiss/beecount_jed.vhd
@@ -0,0 +1,73 @@
+library ieee;
+use ieee.numeric_std.all;
+use ieee.std_logic_1164.all;
+entity beecount_jed is
+ port(
+ clock: in std_logic;
+ input: in std_logic_vector(2 downto 0);
+ output: out std_logic_vector(3 downto 0)
+ );
+end beecount_jed;
+architecture behaviour of beecount_jed is
+ constant st0: std_logic_vector(2 downto 0) := "100";
+ constant st1: std_logic_vector(2 downto 0) := "101";
+ constant st4: std_logic_vector(2 downto 0) := "110";
+ constant st2: std_logic_vector(2 downto 0) := "001";
+ constant st3: std_logic_vector(2 downto 0) := "010";
+ constant st5: std_logic_vector(2 downto 0) := "000";
+ constant st6: std_logic_vector(2 downto 0) := "111";
+ signal current_state, next_state: std_logic_vector(2 downto 0);
+begin
+ process(clock) begin
+ if rising_edge(clock) then current_state <= next_state;
+ end if;
+ end process;
+ process(input, current_state) begin
+ next_state <= "---"; output <= "----";
+ case current_state is
+ when st0 =>
+ if std_match(input, "000") then next_state <= st0; output <= "0101";
+ elsif std_match(input, "100") then next_state <= st1; output <= "0101";
+ elsif std_match(input, "010") then next_state <= st4; output <= "0101";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st1 =>
+ if std_match(input, "100") then next_state <= st1; output <= "0101";
+ elsif std_match(input, "0-0") then next_state <= st0; output <= "0101";
+ elsif std_match(input, "110") then next_state <= st2; output <= "0101";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st2 =>
+ if std_match(input, "110") then next_state <= st2; output <= "0101";
+ elsif std_match(input, "100") then next_state <= st1; output <= "0101";
+ elsif std_match(input, "010") then next_state <= st3; output <= "0101";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st3 =>
+ if std_match(input, "010") then next_state <= st3; output <= "0101";
+ elsif std_match(input, "110") then next_state <= st2; output <= "0101";
+ elsif std_match(input, "000") then next_state <= st0; output <= "0110";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st4 =>
+ if std_match(input, "010") then next_state <= st4; output <= "0101";
+ elsif std_match(input, "-00") then next_state <= st0; output <= "0101";
+ elsif std_match(input, "110") then next_state <= st5; output <= "0101";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st5 =>
+ if std_match(input, "110") then next_state <= st5; output <= "0101";
+ elsif std_match(input, "010") then next_state <= st4; output <= "0101";
+ elsif std_match(input, "100") then next_state <= st6; output <= "0101";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st6 =>
+ if std_match(input, "100") then next_state <= st6; output <= "0101";
+ elsif std_match(input, "110") then next_state <= st5; output <= "0101";
+ elsif std_match(input, "000") then next_state <= st0; output <= "1001";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when others => next_state <= "---"; output <= "----";
+ end case;
+ end process;
+end behaviour;
View
73 kiss/beecount_nov.vhd
@@ -0,0 +1,73 @@
+library ieee;
+use ieee.numeric_std.all;
+use ieee.std_logic_1164.all;
+entity beecount_nov is
+ port(
+ clock: in std_logic;
+ input: in std_logic_vector(2 downto 0);
+ output: out std_logic_vector(3 downto 0)
+ );
+end beecount_nov;
+architecture behaviour of beecount_nov is
+ constant st0: std_logic_vector(2 downto 0) := "011";
+ constant st1: std_logic_vector(2 downto 0) := "111";
+ constant st2: std_logic_vector(2 downto 0) := "101";
+ constant st3: std_logic_vector(2 downto 0) := "100";
+ constant st4: std_logic_vector(2 downto 0) := "010";
+ constant st5: std_logic_vector(2 downto 0) := "000";
+ constant st6: std_logic_vector(2 downto 0) := "001";
+ signal current_state, next_state: std_logic_vector(2 downto 0);
+begin
+ process(clock) begin
+ if rising_edge(clock) then current_state <= next_state;
+ end if;
+ end process;
+ process(input, current_state) begin
+ next_state <= "---"; output <= "----";
+ case current_state is
+ when st0 =>
+ if std_match(input, "000") then next_state <= st0; output <= "0101";
+ elsif std_match(input, "100") then next_state <= st1; output <= "0101";
+ elsif std_match(input, "010") then next_state <= st4; output <= "0101";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st1 =>
+ if std_match(input, "100") then next_state <= st1; output <= "0101";
+ elsif std_match(input, "0-0") then next_state <= st0; output <= "0101";
+ elsif std_match(input, "110") then next_state <= st2; output <= "0101";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st2 =>
+ if std_match(input, "110") then next_state <= st2; output <= "0101";
+ elsif std_match(input, "100") then next_state <= st1; output <= "0101";
+ elsif std_match(input, "010") then next_state <= st3; output <= "0101";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st3 =>
+ if std_match(input, "010") then next_state <= st3; output <= "0101";
+ elsif std_match(input, "110") then next_state <= st2; output <= "0101";
+ elsif std_match(input, "000") then next_state <= st0; output <= "0110";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st4 =>
+ if std_match(input, "010") then next_state <= st4; output <= "0101";
+ elsif std_match(input, "-00") then next_state <= st0; output <= "0101";
+ elsif std_match(input, "110") then next_state <= st5; output <= "0101";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st5 =>
+ if std_match(input, "110") then next_state <= st5; output <= "0101";
+ elsif std_match(input, "010") then next_state <= st4; output <= "0101";
+ elsif std_match(input, "100") then next_state <= st6; output <= "0101";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st6 =>
+ if std_match(input, "100") then next_state <= st6; output <= "0101";
+ elsif std_match(input, "110") then next_state <= st5; output <= "0101";
+ elsif std_match(input, "000") then next_state <= st0; output <= "1001";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when others => next_state <= "---"; output <= "----";
+ end case;
+ end process;
+end behaviour;
View
73 kiss/beecount_rnd.vhd
@@ -0,0 +1,73 @@
+library ieee;
+use ieee.numeric_std.all;
+use ieee.std_logic_1164.all;
+entity beecount_rnd is
+ port(
+ clock: in std_logic;
+ input: in std_logic_vector(2 downto 0);
+ output: out std_logic_vector(3 downto 0)
+ );
+end beecount_rnd;
+architecture behaviour of beecount_rnd is
+ constant st0: std_logic_vector(2 downto 0) := "101";
+ constant st1: std_logic_vector(2 downto 0) := "010";
+ constant st4: std_logic_vector(2 downto 0) := "011";
+ constant st2: std_logic_vector(2 downto 0) := "110";
+ constant st3: std_logic_vector(2 downto 0) := "111";
+ constant st5: std_logic_vector(2 downto 0) := "001";
+ constant st6: std_logic_vector(2 downto 0) := "000";
+ signal current_state, next_state: std_logic_vector(2 downto 0);
+begin
+ process(clock) begin
+ if rising_edge(clock) then current_state <= next_state;
+ end if;
+ end process;
+ process(input, current_state) begin
+ next_state <= "---"; output <= "----";
+ case current_state is
+ when st0 =>
+ if std_match(input, "000") then next_state <= st0; output <= "0101";
+ elsif std_match(input, "100") then next_state <= st1; output <= "0101";
+ elsif std_match(input, "010") then next_state <= st4; output <= "0101";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st1 =>
+ if std_match(input, "100") then next_state <= st1; output <= "0101";
+ elsif std_match(input, "0-0") then next_state <= st0; output <= "0101";
+ elsif std_match(input, "110") then next_state <= st2; output <= "0101";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st2 =>
+ if std_match(input, "110") then next_state <= st2; output <= "0101";
+ elsif std_match(input, "100") then next_state <= st1; output <= "0101";
+ elsif std_match(input, "010") then next_state <= st3; output <= "0101";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st3 =>
+ if std_match(input, "010") then next_state <= st3; output <= "0101";
+ elsif std_match(input, "110") then next_state <= st2; output <= "0101";
+ elsif std_match(input, "000") then next_state <= st0; output <= "0110";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st4 =>
+ if std_match(input, "010") then next_state <= st4; output <= "0101";
+ elsif std_match(input, "-00") then next_state <= st0; output <= "0101";
+ elsif std_match(input, "110") then next_state <= st5; output <= "0101";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st5 =>
+ if std_match(input, "110") then next_state <= st5; output <= "0101";
+ elsif std_match(input, "010") then next_state <= st4; output <= "0101";
+ elsif std_match(input, "100") then next_state <= st6; output <= "0101";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when st6 =>
+ if std_match(input, "100") then next_state <= st6; output <= "0101";
+ elsif std_match(input, "110") then next_state <= st5; output <= "0101";
+ elsif std_match(input, "000") then next_state <= st0; output <= "1001";
+ elsif std_match(input, "--1") then next_state <= st0; output <= "1010";
+ end if;
+ when others => next_state <= "---"; output <= "----";
+ end case;
+ end process;
+end behaviour;
View
163 kiss/cse_hot.vhd
@@ -0,0 +1,163 @@
+library ieee;
+use ieee.numeric_std.all;
+use ieee.std_logic_1164.all;
+entity cse_hot is
+ port(
+ clock: in std_logic;
+ input: in std_logic_vector(6 downto 0);
+ output: out std_logic_vector(6 downto 0)
+ );
+end cse_hot;
+architecture behaviour of cse_hot is
+ constant st0: std_logic_vector(15 downto 0) := "1000000000000000";
+ constant st1: std_logic_vector(15 downto 0) := "0100000000000000";
+ constant st9: std_logic_vector(15 downto 0) := "0010000000000000";
+ constant st6: std_logic_vector(15 downto 0) := "0001000000000000";
+ constant st8: std_logic_vector(15 downto 0) := "0000100000000000";
+ constant st2: std_logic_vector(15 downto 0) := "0000010000000000";
+ constant st5: std_logic_vector(15 downto 0) := "0000001000000000";
+ constant st3: std_logic_vector(15 downto 0) := "0000000100000000";
+ constant st4: std_logic_vector(15 downto 0) := "0000000010000000";
+ constant st7: std_logic_vector(15 downto 0) := "0000000001000000";
+ constant st10: std_logic_vector(15 downto 0) := "0000000000100000";
+ constant st11: std_logic_vector(15 downto 0) := "0000000000010000";
+ constant st12: std_logic_vector(15 downto 0) := "0000000000001000";
+ constant st13: std_logic_vector(15 downto 0) := "0000000000000100";
+ constant st14: std_logic_vector(15 downto 0) := "0000000000000010";
+ constant st15: std_logic_vector(15 downto 0) := "0000000000000001";
+ signal current_state, next_state: std_logic_vector(15 downto 0);
+begin
+ process(clock) begin
+ if rising_edge(clock) then current_state <= next_state;
+ end if;
+ end process;
+ process(input, current_state) begin
+ next_state <= "----------------"; output <= "-------";
+ case current_state is
+ when st0 =>
+ if std_match(input, "1-000--") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "1-11---") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "1-1-1--") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "10010--") then next_state <= st1; output <= "1100-10";
+ elsif std_match(input, "10011--") then next_state <= st9; output <= "0010001";
+ elsif std_match(input, "10001--") then next_state <= st6; output <= "0000-01";
+ elsif std_match(input, "10100--") then next_state <= st8; output <= "0000--0";
+ elsif std_match(input, "0------") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "-1-----") then next_state <= st0; output <= "0000-00";
+ end if;
+ when st1 =>
+ if std_match(input, "101----") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "10010--") then next_state <= st1; output <= "0100-00";
+ elsif std_match(input, "1000---") then next_state <= st2; output <= "0000-00";
+ elsif std_match(input, "0------") then next_state <= st0; output <= "0000-10";
+ elsif std_match(input, "-1-----") then next_state <= st0; output <= "0000-10";
+ end if;
+ when st2 =>
+ if std_match(input, "10010--") then next_state <= st1; output <= "1100-00";
+ elsif std_match(input, "10011--") then next_state <= st5; output <= "0001000";
+ elsif std_match(input, "10000--") then next_state <= st2; output <= "0000-00";
+ elsif std_match(input, "10001--") then next_state <= st3; output <= "1000-00";
+ elsif std_match(input, "101----") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "0-----0") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "0-----1") then next_state <= st0; output <= "0000-10";
+ elsif std_match(input, "-1----0") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "-1----1") then next_state <= st0; output <= "0000-10";
+ end if;
+ when st3 =>
+ if std_match(input, "10001--") then next_state <= st3; output <= "0000-00";
+ elsif std_match(input, "100-0--") then next_state <= st4; output <= "0000-00";
+ elsif std_match(input, "101----") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "0------") then next_state <= st0; output <= "0000-10";
+ elsif std_match(input, "-1-----") then next_state <= st0; output <= "0000-10";
+ end if;
+ when st4 =>
+ if std_match(input, "101----") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "10010--") then next_state <= st1; output <= "1100-00";
+ elsif std_match(input, "1000---") then next_state <= st4; output <= "0000-00";
+ elsif std_match(input, "10011--") then next_state <= st5; output <= "0001000";
+ elsif std_match(input, "0------") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "-1-----") then next_state <= st0; output <= "0000-00";
+ end if;
+ when st5 =>
+ if std_match(input, "10-1---") then next_state <= st5; output <= "0000-00";
+ elsif std_match(input, "10-0---") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "0------") then next_state <= st0; output <= "0000--0";
+ elsif std_match(input, "-1-----") then next_state <= st0; output <= "0000--0";
+ end if;
+ when st6 =>
+ if std_match(input, "10--1--") then next_state <= st6; output <= "0000-00";
+ elsif std_match(input, "101----") then next_state <= st6; output <= "0000-00";
+ elsif std_match(input, "100-0--") then next_state <= st7; output <= "0000-00";
+ elsif std_match(input, "0------") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "-1-----") then next_state <= st0; output <= "0000-00";
+ end if;
+ when st7 =>
+ if std_match(input, "100--0-") then next_state <= st7; output <= "0000-00";
+ elsif std_match(input, "101--0-") then next_state <= st6; output <= "0000-01";
+ elsif std_match(input, "10---1-") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "0------") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "-1-----") then next_state <= st0; output <= "0000-00";
+ end if;
+ when st8 =>
+ if std_match(input, "10-00--") then next_state <= st8; output <= "0000-00";
+ elsif std_match(input, "10010--") then next_state <= st9; output <= "0010101";
+ elsif std_match(input, "10-01--") then next_state <= st10; output <= "0000-10";
+ elsif std_match(input, "0------") then next_state <= st0; output <= "0000--0";
+ elsif std_match(input, "-1-----") then next_state <= st0; output <= "0000--0";
+ elsif std_match(input, "10-11--") then next_state <= st0; output <= "0000--0";
+ end if;
+ when st9 =>
+ if std_match(input, "10-1---") then next_state <= st9; output <= "0000000";
+ elsif std_match(input, "10-0---") then next_state <= st7; output <= "0000000";
+ elsif std_match(input, "0------") then next_state <= st0; output <= "0000--0";
+ elsif std_match(input, "-1-----") then next_state <= st0; output <= "0000--0";
+ end if;
+ when st10 =>
+ if std_match(input, "10-0---") then next_state <= st10; output <= "0000-00";
+ elsif std_match(input, "10-10--") then next_state <= st11; output <= "0000100";
+ elsif std_match(input, "0------") then next_state <= st0; output <= "0000--0";
+ elsif std_match(input, "-1-----") then next_state <= st0; output <= "0000--0";
+ elsif std_match(input, "10-11--") then next_state <= st0; output <= "0000--0";
+ end if;
+ when st11 =>
+ if std_match(input, "10-10--") then next_state <= st11; output <= "0000000";
+ elsif std_match(input, "10-0---") then next_state <= st12; output <= "0000000";
+ elsif std_match(input, "0------") then next_state <= st0; output <= "0000--0";
+ elsif std_match(input, "-1-----") then next_state <= st0; output <= "0000--0";
+ elsif std_match(input, "10-11--") then next_state <= st0; output <= "0000--0";
+ end if;
+ when st12 =>
+ if std_match(input, "10-0---") then next_state <= st12; output <= "0000000";
+ elsif std_match(input, "10-10--") then next_state <= st13; output <= "1000000";
+ elsif std_match(input, "0------") then next_state <= st0; output <= "0000--0";
+ elsif std_match(input, "-1-----") then next_state <= st0; output <= "0000--0";
+ elsif std_match(input, "10-11--") then next_state <= st0; output <= "0000--0";
+ end if;
+ when st13 =>
+ if std_match(input, "10-10--") then next_state <= st13; output <= "0000000";
+ elsif std_match(input, "10-01--") then next_state <= st13; output <= "0000000";
+ elsif std_match(input, "10100--") then next_state <= st14; output <= "0000000";
+ elsif std_match(input, "10000--") then next_state <= st15; output <= "0000000";
+ elsif std_match(input, "0------") then next_state <= st0; output <= "0000--0";
+ elsif std_match(input, "-1-----") then next_state <= st0; output <= "0000--0";
+ end if;
+ when st14 =>
+ if std_match(input, "--111--") then next_state <= st14; output <= "0000000";
+ elsif std_match(input, "--100--") then next_state <= st14; output <= "0000000";
+ elsif std_match(input, "--110--") then next_state <= st13; output <= "1000000";
+ elsif std_match(input, "--101--") then next_state <= st13; output <= "1000000";
+ elsif std_match(input, "--0----") then next_state <= st0; output <= "0001000";
+ end if;
+ when st15 =>
+ if std_match(input, "10000--") then next_state <= st15; output <= "0000000";
+ elsif std_match(input, "10010--") then next_state <= st13; output <= "1000000";
+ elsif std_match(input, "10001--") then next_state <= st13; output <= "1000000";
+ elsif std_match(input, "101----") then next_state <= st8; output <= "0001000";
+ elsif std_match(input, "0------") then next_state <= st0; output <= "0001000";
+ elsif std_match(input, "-1-----") then next_state <= st0; output <= "0001000";
+ elsif std_match(input, "10011--") then next_state <= st0; output <= "0001000";
+ end if;
+ when others => next_state <= "----------------"; output <= "-------";
+ end case;
+ end process;
+end behaviour;
View
163 kiss/cse_jed.vhd
@@ -0,0 +1,163 @@
+library ieee;
+use ieee.numeric_std.all;
+use ieee.std_logic_1164.all;
+entity cse_jed is
+ port(
+ clock: in std_logic;
+ input: in std_logic_vector(6 downto 0);
+ output: out std_logic_vector(6 downto 0)
+ );
+end cse_jed;
+architecture behaviour of cse_jed is
+ constant st0: std_logic_vector(3 downto 0) := "0100";
+ constant st1: std_logic_vector(3 downto 0) := "0110";
+ constant st9: std_logic_vector(3 downto 0) := "1110";
+ constant st6: std_logic_vector(3 downto 0) := "0101";
+ constant st8: std_logic_vector(3 downto 0) := "0001";
+ constant st2: std_logic_vector(3 downto 0) := "0011";
+ constant st5: std_logic_vector(3 downto 0) := "1100";
+ constant st3: std_logic_vector(3 downto 0) := "1101";
+ constant st4: std_logic_vector(3 downto 0) := "1111";
+ constant st7: std_logic_vector(3 downto 0) := "0111";
+ constant st10: std_logic_vector(3 downto 0) := "1001";
+ constant st11: std_logic_vector(3 downto 0) := "1010";
+ constant st12: std_logic_vector(3 downto 0) := "1011";
+ constant st13: std_logic_vector(3 downto 0) := "0000";
+ constant st14: std_logic_vector(3 downto 0) := "1000";
+ constant st15: std_logic_vector(3 downto 0) := "0010";
+ signal current_state, next_state: std_logic_vector(3 downto 0);
+begin
+ process(clock) begin
+ if rising_edge(clock) then current_state <= next_state;
+ end if;
+ end process;
+ process(input, current_state) begin
+ next_state <= "----"; output <= "-------";
+ case current_state is
+ when st0 =>
+ if std_match(input, "1-000--") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "1-11---") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "1-1-1--") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "10010--") then next_state <= st1; output <= "1100-10";
+ elsif std_match(input, "10011--") then next_state <= st9; output <= "0010001";
+ elsif std_match(input, "10001--") then next_state <= st6; output <= "0000-01";
+ elsif std_match(input, "10100--") then next_state <= st8; output <= "0000--0";
+ elsif std_match(input, "0------") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "-1-----") then next_state <= st0; output <= "0000-00";
+ end if;
+ when st1 =>
+ if std_match(input, "101----") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "10010--") then next_state <= st1; output <= "0100-00";
+ elsif std_match(input, "1000---") then next_state <= st2; output <= "0000-00";
+ elsif std_match(input, "0------") then next_state <= st0; output <= "0000-10";
+ elsif std_match(input, "-1-----") then next_state <= st0; output <= "0000-10";
+ end if;
+ when st2 =>
+ if std_match(input, "10010--") then next_state <= st1; output <= "1100-00";
+ elsif std_match(input, "10011--") then next_state <= st5; output <= "0001000";
+ elsif std_match(input, "10000--") then next_state <= st2; output <= "0000-00";
+ elsif std_match(input, "10001--") then next_state <= st3; output <= "1000-00";
+ elsif std_match(input, "101----") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "0-----0") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "0-----1") then next_state <= st0; output <= "0000-10";
+ elsif std_match(input, "-1----0") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "-1----1") then next_state <= st0; output <= "0000-10";
+ end if;
+ when st3 =>
+ if std_match(input, "10001--") then next_state <= st3; output <= "0000-00";
+ elsif std_match(input, "100-0--") then next_state <= st4; output <= "0000-00";
+ elsif std_match(input, "101----") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "0------") then next_state <= st0; output <= "0000-10";
+ elsif std_match(input, "-1-----") then next_state <= st0; output <= "0000-10";
+ end if;
+ when st4 =>
+ if std_match(input, "101----") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "10010--") then next_state <= st1; output <= "1100-00";
+ elsif std_match(input, "1000---") then next_state <= st4; output <= "0000-00";
+ elsif std_match(input, "10011--") then next_state <= st5; output <= "0001000";
+ elsif std_match(input, "0------") then next_state <= st0; output <= "0000-00";
+ elsif std_match(input, "-1-----") then next_state <= st0; output <= "0000-00";
+ end if;