This repository contains my laboratory activities and project files for the HDL Programming course. The materials are hosted on my Google Site, where I have documented my learning journey and practical exercises throughout the course.
These projects and activities demonstrate my attempts to apply the concepts and techniques I learned using SystemVerilog, ModelSim, Intel Quartus Prime, and FPGA implementations. While the work here reflects my personal effort and understanding, I hope it can also serve as a helpful reference or inspiration for others exploring hardware description languages and FPGA programming.
You can explore all the laboratory activities and project files here: https://sites.google.com/g.msuiit.edu.ph/bca181-hdlprogramming/home