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Merge pull request #281 from EmbeddedMan/MX1_MX2

Add in support for MX1/MX2 PIC32 processors
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2 parents 1bf3e05 + 8c71a97 commit f4f5abd738edfd1ccedfeef68f844cb562cccfed @ricklon ricklon committed Oct 1, 2012
Showing with 7,939 additions and 1,809 deletions.
  1. +187 −0 build/windows/dist/avrdude.conf
  2. +213 −1 hardware/pic32/boards.txt
  3. +47 −9 hardware/pic32/cores/pic32/HardwareSerial.cpp
  4. +13 −0 hardware/pic32/cores/pic32/HardwareSerial.h
  5. +1 −1 hardware/pic32/cores/pic32/HardwareSerial_cdcacm.c
  6. +14 −2 hardware/pic32/cores/pic32/HardwareSerial_usb.c
  7. +8 −0 hardware/pic32/cores/pic32/System_Defs.h
  8. +1 −1 hardware/pic32/cores/pic32/Tone.cpp
  9. +21 −1 hardware/pic32/cores/pic32/WInterrupts.c
  10. +165 −0 hardware/pic32/cores/pic32/chipKIT-application-32MX120F032-nobootloader.ld
  11. +134 −134 hardware/pic32/cores/pic32/chipKIT-application-32MX120F032.ld
  12. +166 −0 hardware/pic32/cores/pic32/chipKIT-application-32MX250F128-nobootloader.ld
  13. +135 −135 hardware/pic32/cores/pic32/chipKIT-application-32MX250F128.ld
  14. +170 −0 hardware/pic32/cores/pic32/chipKIT-application-32MX320F128-nobootloader.ld
  15. +134 −134 hardware/pic32/cores/pic32/chipKIT-application-32MX320F128.ld
  16. +134 −134 hardware/pic32/cores/pic32/chipKIT-application-32MX340F512.ld
  17. +134 −134 hardware/pic32/cores/pic32/chipKIT-application-32MX360F512.ld
  18. +134 −134 hardware/pic32/cores/pic32/chipKIT-application-32MX440F128.ld
  19. +134 −134 hardware/pic32/cores/pic32/chipKIT-application-32MX440F256.ld
  20. +134 −134 hardware/pic32/cores/pic32/chipKIT-application-32MX440F512.ld
  21. +170 −0 hardware/pic32/cores/pic32/chipKIT-application-32MX460F512-nobootloader.ld
  22. +134 −134 hardware/pic32/cores/pic32/chipKIT-application-32MX460F512.ld
  23. +171 −0 hardware/pic32/cores/pic32/chipKIT-application-32MX795F512-nobootloader.ld
  24. +135 −135 hardware/pic32/cores/pic32/chipKIT-application-32MX795F512.ld
  25. +1 −1 hardware/pic32/cores/pic32/chipKIT-application-COMMON.ld
  26. +210 −1 hardware/pic32/cores/pic32/p32_defs.h
  27. +39 −0 hardware/pic32/cores/pic32/pins_arduino.c
  28. +125 −3 hardware/pic32/cores/pic32/pins_arduino.h
  29. +206 −130 hardware/pic32/cores/pic32/wiring.c
  30. +33 −4 hardware/pic32/cores/pic32/wiring.h
  31. +121 −59 hardware/pic32/cores/pic32/wiring_analog.c
  32. +86 −36 hardware/pic32/cores/pic32/wiring_digital.c
  33. +13 −20 hardware/pic32/variants/Cerebot_32MX4/Board_Defs.h
  34. +13 −20 hardware/pic32/variants/Cerebot_32MX7/Board_Defs.h
  35. +718 −0 hardware/pic32/variants/Cerebot_GA4/Board_Data.c
  36. +395 −0 hardware/pic32/variants/Cerebot_GA4/Board_Defs.h
  37. +13 −20 hardware/pic32/variants/Cerebot_MX3cK/Board_Defs.h
  38. +13 −20 hardware/pic32/variants/Cerebot_MX4cK/Board_Defs.h
  39. +13 −20 hardware/pic32/variants/Cerebot_MX7cK/Board_Defs.h
  40. +5 −25 hardware/pic32/variants/Default_100/Board_Defs.h
  41. +9 −29 hardware/pic32/variants/Default_64/Board_Defs.h
  42. +711 −0 hardware/pic32/variants/Fubarino_Mini/Board_Data.c
  43. +401 −0 hardware/pic32/variants/Fubarino_Mini/Board_Defs.h
  44. +11 −21 hardware/pic32/variants/Max32/Board_Defs.h
  45. +21 −20 hardware/pic32/variants/Uno32/Board_Defs.h
  46. +642 −0 hardware/pic32/variants/Uno32_Pmod_Shield/Board_Data.c
  47. +387 −0 hardware/pic32/variants/Uno32_Pmod_Shield/Board_Defs.h
  48. +19 −0 hardware/pic32/variants/fubarino_sd_v10/Board_Data.c
  49. +1 −1 hardware/pic32/variants/fubarino_sd_v10/Board_Defs.h
  50. +15 −22 hardware/pic32/variants/uC32/Board_Defs.h
  51. +642 −0 hardware/pic32/variants/uC32_Pmod_Shield/Board_Data.c
  52. +387 −0 hardware/pic32/variants/uC32_Pmod_Shield/Board_Defs.h
@@ -17564,3 +17564,190 @@ part
;
+#------------------------------------------------------------
+# Pic CPU PIC32MX250F128D added by Brian Schmalz, May 2012
+#------------------------------------------------------------
+
+part
+ id = "pic32-250-128";
+ desc = "32MX250F128D";
+ signature = 0x50 0x49 0x43;
+ has_jtag = no;
+# stk500_devcode = 0xB2;
+# avr910_devcode = 0x43;
+ chip_erase_delay = 9000;
+ pagel = 0xD7;
+ bs2 = 0xA0;
+ reset = dedicated;
+ pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
+ "x x x x x x x x x x x x x x x x";
+
+ chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0",
+ "x x x x x x x x x x x x x x x x";
+
+ timeout = 200;
+ stabdelay = 100;
+ cmdexedelay = 25;
+ synchloops = 32;
+ bytedelay = 0;
+ pollindex = 3;
+ pollvalue = 0x53;
+ predelay = 1;
+ postdelay = 1;
+ pollmethod = 1;
+
+ pp_controlstack =
+ 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F,
+ 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F,
+ 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B,
+ 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02;
+ hventerstabdelay = 100;
+ progmodedelay = 0;
+ latchcycles = 5;
+ togglevtg = 1;
+ poweroffdelay = 15;
+ resetdelayms = 1;
+ resetdelayus = 0;
+ hvleavestabdelay = 15;
+ chiperasepulsewidth = 0;
+ chiperasepolltimeout = 10;
+ programfusepulsewidth = 0;
+ programfusepolltimeout = 5;
+ programlockpulsewidth = 0;
+ programlockpolltimeout = 5;
+
+ idr = 0x31;
+ spmcr = 0x57;
+ rampz = 0x3b;
+ allowfullpagebitstream = no;
+
+ memory "eeprom"
+ paged = no; /* leave this "no" */
+ page_size = 8; /* for parallel programming */
+ size = 4096;
+ min_write_delay = 9000;
+ max_write_delay = 9000;
+ readback_p1 = 0x00;
+ readback_p2 = 0x00;
+ read = " 1 0 1 0 0 0 0 0",
+ " x x x x a11 a10 a9 a8",
+ " a7 a6 a5 a4 a3 a2 a1 a0",
+ " o o o o o o o o";
+
+ write = " 1 1 0 0 0 0 0 0",
+ " x x x x a11 a10 a9 a8",
+ " a7 a6 a5 a4 a3 a2 a1 a0",
+ " i i i i i i i i";
+
+ loadpage_lo = " 1 1 0 0 0 0 0 1",
+ " 0 0 0 0 0 0 0 0",
+ " 0 0 0 0 0 a2 a1 a0",
+ " i i i i i i i i";
+
+ writepage = " 1 1 0 0 0 0 1 0",
+ " 0 0 x x a11 a10 a9 a8",
+ " a7 a6 a5 a4 a3 0 0 0",
+ " x x x x x x x x";
+
+ mode = 0x41;
+ delay = 10;
+ blocksize = 8;
+ readsize = 256;
+ ;
+
+ memory "flash"
+ paged = yes;
+ size = 131072;
+ page_size = 256;
+ num_pages = 512;
+ min_write_delay = 4500;
+ max_write_delay = 4500;
+ readback_p1 = 0xff;
+ readback_p2 = 0xff;
+ read_lo = " 0 0 1 0 0 0 0 0",
+ "a15 a14 a13 a12 a11 a10 a9 a8",
+ " a7 a6 a5 a4 a3 a2 a1 a0",
+ " o o o o o o o o";
+
+ read_hi = " 0 0 1 0 1 0 0 0",
+ "a15 a14 a13 a12 a11 a10 a9 a8",
+ " a7 a6 a5 a4 a3 a2 a1 a0",
+ " o o o o o o o o";
+
+ loadpage_lo = " 0 1 0 0 0 0 0 0",
+ " x x x x x x x x",
+ " x a6 a5 a4 a3 a2 a1 a0",
+ " i i i i i i i i";
+
+ loadpage_hi = " 0 1 0 0 1 0 0 0",
+ " x x x x x x x x",
+ " x a6 a5 a4 a3 a2 a1 a0",
+ " i i i i i i i i";
+
+ writepage = " 0 1 0 0 1 1 0 0",
+ "a15 a14 a13 a12 a11 a10 a9 a8",
+ " a7 x x x x x x x",
+ " x x x x x x x x";
+
+ mode = 0x41;
+ delay = 10;
+ blocksize = 128;
+ readsize = 256;
+ ;
+
+ memory "lock"
+ size = 1;
+ read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0",
+ "x x x x x x x x x x o o o o o o";
+
+ write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x",
+ "x x x x x x x x 1 1 i i i i i i";
+ min_write_delay = 9000;
+ max_write_delay = 9000;
+ ;
+
+ memory "lfuse"
+ size = 1;
+ write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0",
+ "x x x x x x x x i i i i i i i i";
+
+ read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0",
+ "x x x x x x x x o o o o o o o o";
+ min_write_delay = 9000;
+ max_write_delay = 9000;
+ ;
+
+ memory "hfuse"
+ size = 1;
+ write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0",
+ "x x x x x x x x i i i i i i i i";
+
+ read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0",
+ "x x x x x x x x o o o o o o o o";
+ min_write_delay = 9000;
+ max_write_delay = 9000;
+ ;
+
+ memory "efuse"
+ size = 1;
+ write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0",
+ "x x x x x x x x x x x x x i i i";
+
+ read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0",
+ "x x x x x x x x o o o o o o o o";
+ min_write_delay = 9000;
+ max_write_delay = 9000;
+ ;
+
+ memory "calibration"
+ size = 1;
+ read = "0 0 1 1 1 0 0 0 x x x x x x x x",
+ "0 0 0 0 0 0 0 0 o o o o o o o o";
+ ;
+
+ memory "signature"
+ size = 3;
+ read = "0 0 1 1 0 0 0 0 x x x x x x x x",
+ "x x x x x x a1 a0 o o o o o o o o";
+ ;
+ ;
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