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Issue #242 upated boards.txt and linker scripts from Keith, and Gene.

Former-commit-id: 2ade94c
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commit b2542cf6e2f566e76e38f23b7a56cdee331d567f 1 parent a5df115
@ricklon ricklon authored
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1,236 hardware/pic32/boards.txt
@@ -1,600 +1,636 @@
-############################################################
-uno_pic32.name=chipKIT UNO32
-
-# new items
-uno_pic32.platform=pic32
-uno_pic32.board=_BOARD_UNO_
-uno_pic32.board.define=
-#uno_pic32.compiler.define=
-uno_pic32.ccflags=ffff
-uno_pic32.ldscript=chipKIT-UNO32-application-32MX320F128L.ld
-# end of new items
-
-# Use a high -Gnum for devices that have less than 64K of data memory
-# For -G1024, objects 1024 bytes or smaller will be accessed by
-# gp-relative addressing
-uno_pic32.compiler.c.flags=-O2::-c::-mno-smart-io::-w::-ffunction-sections::-fdata-sections::-G1024::-g::-mdebugger::-Wcast-align
-uno_pic32.compiler.cpp.flags=-O2::-c::-mno-smart-io::-w::-fno-exceptions::-ffunction-sections::-fdata-sections::-G1024::-g::-mdebugger::-Wcast-align
-
-uno_pic32.upload.protocol=stk500v2
-uno_pic32.upload.maximum_size=126976
-uno_pic32.upload.speed=115200
-
-uno_pic32.bootloader.low_fuses=0xff
-uno_pic32.bootloader.high_fuses=0xdd
-uno_pic32.bootloader.extended_fuses=0x00
-uno_pic32.bootloader.path=not-supported
-uno_pic32.bootloader.file=not-supported
-uno_pic32.bootloader.unlock_bits=0x3F
-uno_pic32.bootloader.lock_bits=0x0F
-
-uno_pic32.build.mcu=32MX320F128H
-uno_pic32.build.f_cpu=80000000L
-uno_pic32.build.core=pic32
-uno_pic32.build.variant=Uno32
-#uno_pic32.upload.using=
-
-############################################################
-mega_pic32.name=chipKIT MAX32
-
-# new items
-mega_pic32.platform=pic32
-mega_pic32.board=_BOARD_MEGA_
-mega_pic32.board.define=
-mega_pic32.ccflags=ffff
-mega_pic32.ldscript=chipKIT-MAX32-application-32MX795F512L.ld
-# end of new items
-
-mega_pic32.upload.protocol=stk500v2
-mega_pic32.upload.maximum_size=520192
-mega_pic32.upload.speed=115200
-
-mega_pic32.bootloader.low_fuses=0xff
-mega_pic32.bootloader.high_fuses=0xdd
-mega_pic32.bootloader.extended_fuses=0x00
-mega_pic32.bootloader.path=not-supported
-mega_pic32.bootloader.file=not-supported
-mega_pic32.bootloader.unlock_bits=0x3F
-mega_pic32.bootloader.lock_bits=0x0F
-
-mega_pic32.build.mcu=32MX795F512L
-mega_pic32.build.f_cpu=80000000L
-mega_pic32.build.core=pic32
-mega_pic32.build.variant=Max32
-#mega_pic32.upload.using=
-
-############################################################
-mega_usb_pic32.name=chipKIT MAX32-USB for Serial
-
-# new items
-mega_usb_pic32.platform=pic32
-mega_usb_pic32.board=_BOARD_MEGA_USB_
-mega_usb_pic32.board.define=-D_USE_USB_FOR_SERIAL_
-mega_usb_pic32.ccflags=ffff
-mega_usb_pic32.ldscript=chipKIT-MAX32-application-32MX795F512L.ld
-# end of new items
-
-mega_usb_pic32.upload.protocol=stk500v2
-mega_usb_pic32.upload.maximum_size=520192
-mega_usb_pic32.upload.speed=115200
-
-mega_usb_pic32.bootloader.low_fuses=0xff
-mega_usb_pic32.bootloader.high_fuses=0xdd
-mega_usb_pic32.bootloader.extended_fuses=0x00
-mega_usb_pic32.bootloader.path=not-supported
-mega_usb_pic32.bootloader.file=not-supported
-mega_usb_pic32.bootloader.unlock_bits=0x3F
-mega_usb_pic32.bootloader.lock_bits=0x0F
-
-mega_usb_pic32.build.mcu=32MX795F512L
-mega_usb_pic32.build.f_cpu=80000000L
-mega_usb_pic32.build.core=pic32
-mega_usb_pic32.build.variant=Max32
-#mega_usb_pic32.upload.using=
-
-############################################################
-chipkit_uc32.name=chipKIT uC32
-
-# new items
-chipkit_uc32.platform=pic32
-chipkit_uc32.board=_BOARD_UC32_
-chipkit_uc32.board.define=
-chipkit_uc32.ccflags=ffff
-chipkit_uc32.ldscript=chipKIT-application-32MX340F512H.ld
-# end of new items
-
-# Use a high -Gnum for devices that have less than 64K of data memory
-# For -G1024, objects 1024 bytes or smaller will be accessed by
-# gp-relative addressing
-chipkit_uc32.compiler.c.flags=-O2::-c::-mno-smart-io::-w::-ffunction-sections::-fdata-sections::-G1024::-g::-mdebugger::-Wcast-align
-chipkit_uc32.compiler.cpp.flags=-O2::-c::-mno-smart-io::-w::-fno-exceptions::-ffunction-sections::-fdata-sections::-G1024::-g::-mdebugger::-Wcast-align
-
-chipkit_uc32.upload.protocol=stk500v2
-chipkit_uc32.upload.maximum_size=520192
-chipkit_uc32.upload.speed=115200
-
-chipkit_uc32.bootloader.low_fuses=0xff
-chipkit_uc32.bootloader.high_fuses=0xdd
-chipkit_uc32.bootloader.extended_fuses=0x00
-chipkit_uc32.bootloader.path=not-supported
-chipkit_uc32.bootloader.file=not-supported
-chipkit_uc32.bootloader.unlock_bits=0x3F
-chipkit_uc32.bootloader.lock_bits=0x0F
-
-chipkit_uc32.build.mcu=32MX340F512H
-chipkit_uc32.build.f_cpu=80000000L
-chipkit_uc32.build.core=pic32
-chipkit_uc32.build.variant=uC32
-#chipkit_uc32.upload.using=
-
-############################################################
-cerebot_mx3ck.name=Cerebot MX3cK
-
-# new items
-cerebot_mx3ck.platform=pic32
-cerebot_mx3ck.board=_BOARD_CEREBOT_MX3CK_
-cerebot_mx3ck.board.define=
-cerebot_mx3ck.ccflags=ffff
-cerebot_mx3ck.ldscript=chipKIT-UNO32-application-32MX320F128L.ld
-# end of new items
-
-# Use a high -Gnum for devices that have less than 64K of data memory
-# For -G1024, objects 1024 bytes or smaller will be accessed by
-# gp-relative addressing
-cerebot_mx3ck.compiler.c.flags=-O2::-c::-mno-smart-io::-w::-ffunction-sections::-fdata-sections::-G1024::-g::-mdebugger::-Wcast-align
-cerebot_mx3ck.compiler.cpp.flags=-O2::-c::-mno-smart-io::-w::-fno-exceptions::-ffunction-sections::-fdata-sections::-G1024::-g::-mdebugger::-Wcast-align
-
-cerebot_mx3ck.upload.protocol=stk500v2
-cerebot_mx3ck.upload.maximum_size=126976
-cerebot_mx3ck.upload.speed=115200
-
-cerebot_mx3ck.bootloader.low_fuses=0xff
-cerebot_mx3ck.bootloader.high_fuses=0xdd
-cerebot_mx3ck.bootloader.extended_fuses=0x00
-cerebot_mx3ck.bootloader.path=not-supported
-cerebot_mx3ck.bootloader.file=not-supported
-cerebot_mx3ck.bootloader.unlock_bits=0x3F
-cerebot_mx3ck.bootloader.lock_bits=0x0F
-
-cerebot_mx3ck.build.mcu=32MX320F128H
-cerebot_mx3ck.build.f_cpu=80000000L
-cerebot_mx3ck.build.core=pic32
-cerebot_mx3ck.build.variant=Cerebot_MX3cK
-#cerebot_mx3ck.upload.using=
-
-############################################################
-cerebot_mx4ck.name=Cerebot MX4cK
-
-# new items
-cerebot_mx4ck.platform=pic32
-cerebot_mx4ck.board=_BOARD_CEREBOT_MX4CK_
-cerebot_mx4ck.board.define=
-cerebot_mx4ck.ccflags=ffff
-cerebot_mx4ck.ldscript=chipKIT-application-32MX460F512L.ld
-# end of new items
-
-cerebot_mx4ck.upload.protocol=stk500v2
-cerebot_mx4ck.upload.maximum_size=520192
-cerebot_mx4ck.upload.speed=115200
-
-cerebot_mx4ck.bootloader.low_fuses=0xff
-cerebot_mx4ck.bootloader.high_fuses=0xdd
-cerebot_mx4ck.bootloader.extended_fuses=0x00
-cerebot_mx4ck.bootloader.path=not-supported
-cerebot_mx4ck.bootloader.file=not-supported
-cerebot_mx4ck.bootloader.unlock_bits=0x3F
-cerebot_mx4ck.bootloader.lock_bits=0x0F
-
-cerebot_mx4ck.build.mcu=32MX460F512L
-cerebot_mx4ck.build.f_cpu=80000000L
-cerebot_mx4ck.build.core=pic32
-cerebot_mx4ck.build.variant=Cerebot_MX4cK
-#cerebot_mx4ck.upload.using=
-
-############################################################
-cerebot_mx7ck.name=Cerebot MX7cK
-
-# new items
-cerebot_mx7ck.platform=pic32
-cerebot_mx7ck.board=_BOARD_CEREBOT_MX7CK_
-cerebot_mx7ck.board.define=
-cerebot_mx7ck.ccflags=ffff
-cerebot_mx7ck.ldscript=chipKIT-MAX32-application-32MX795F512L.ld
-# end of new items
-
-cerebot_mx7ck.upload.protocol=stk500v2
-cerebot_mx7ck.upload.maximum_size=520192
-cerebot_mx7ck.upload.speed=115200
-
-cerebot_mx7ck.bootloader.low_fuses=0xff
-cerebot_mx7ck.bootloader.high_fuses=0xdd
-cerebot_mx7ck.bootloader.extended_fuses=0x00
-cerebot_mx7ck.bootloader.path=not-supported
-cerebot_mx7ck.bootloader.file=not-supported
-cerebot_mx7ck.bootloader.unlock_bits=0x3F
-cerebot_mx7ck.bootloader.lock_bits=0x0F
-
-cerebot_mx7ck.build.mcu=32MX795F512L
-cerebot_mx7ck.build.f_cpu=80000000L
-cerebot_mx7ck.build.core=pic32
-cerebot_mx7ck.build.variant=Cerebot_MX7cK
-#cerebot_mx7ck.upload.using=
-
-############################################################
-cerebot32mx4.name=Cerebot 32MX4
-
-# new items
-cerebot32mx4.platform=pic32
-cerebot32mx4.board=_BOARD_CEREBOT_32MX4_
-cerebot32mx4.board.define=
-cerebot32mx4.ccflags=ffff
-cerebot32mx4.ldscript=chipKIT-application-32MX460F512L.ld
-# end of new items
-
-cerebot32mx4.upload.protocol=stk500v2
-cerebot32mx4.upload.maximum_size=520192
-cerebot32mx4.upload.speed=115200
-
-cerebot32mx4.bootloader.low_fuses=0xff
-cerebot32mx4.bootloader.high_fuses=0xdd
-cerebot32mx4.bootloader.extended_fuses=0x00
-cerebot32mx4.bootloader.path=not-supported
-cerebot32mx4.bootloader.file=not-supported
-cerebot32mx4.bootloader.unlock_bits=0x3F
-cerebot32mx4.bootloader.lock_bits=0x0F
-
-cerebot32mx4.build.mcu=32MX460F512L
-cerebot32mx4.build.f_cpu=80000000L
-cerebot32mx4.build.core=pic32
-cerebot32mx4.build.variant=Cerebot_32MX4
-#cerebot32mx4.upload.using=
-
-############################################################
-cerebot32mx7.name=Cerebot 32MX7
-
-# new items
-cerebot32mx7.platform=pic32
-cerebot32mx7.board=_BOARD_CEREBOT_32MX7_
-cerebot32mx7.board.define=
-cerebot32mx7.ccflags=ffff
-cerebot32mx7.ldscript=chipKIT-MAX32-application-32MX795F512L.ld
-# end of new items
-
-cerebot32mx7.upload.protocol=stk500v2
-cerebot32mx7.upload.maximum_size=520192
-cerebot32mx7.upload.speed=115200
-
-cerebot32mx7.bootloader.low_fuses=0xff
-cerebot32mx7.bootloader.high_fuses=0xdd
-cerebot32mx7.bootloader.extended_fuses=0x00
-cerebot32mx7.bootloader.path=not-supported
-cerebot32mx7.bootloader.file=not-supported
-cerebot32mx7.bootloader.unlock_bits=0x3F
-cerebot32mx7.bootloader.lock_bits=0x0F
-
-cerebot32mx7.build.mcu=32MX795F512L
-cerebot32mx7.build.f_cpu=80000000L
-cerebot32mx7.build.core=pic32
-cerebot32mx7.build.variant=Cerebot_32MX7
-#cerebot32mx7.upload.using=
-
-############################################################
-mc_pic32_starterkit.name=Microchip PIC32 Starter kit
-
-# new items
-mc_pic32_starterkit.platform=pic32
-mc_pic32_starterkit.board=_BOARD_PIC32_STARTER_KIT_
-mc_pic32_starterkit.board.define=
-mc_pic32_starterkit.ccflags=ffff
-mc_pic32_starterkit.ldscript=chipKIT-UNO32-application-32MX320F128L.ld
-# end of new items
-
-mc_pic32_starterkit.upload.protocol=stk500v2
-mc_pic32_starterkit.upload.maximum_size=520192
-mc_pic32_starterkit.upload.speed=115200
-
-mc_pic32_starterkit.bootloader.low_fuses=0xff
-mc_pic32_starterkit.bootloader.high_fuses=0xdd
-mc_pic32_starterkit.bootloader.extended_fuses=0x00
-mc_pic32_starterkit.bootloader.path=not-supported
-mc_pic32_starterkit.bootloader.file=not-supported
-mc_pic32_starterkit.bootloader.unlock_bits=0x3F
-mc_pic32_starterkit.bootloader.lock_bits=0x0F
-
-mc_pic32_starterkit.build.mcu=32MX360F512L
-mc_pic32_starterkit.build.f_cpu=80000000L
-mc_pic32_starterkit.build.core=pic32
-mc_pic32_starterkit.build.variant=Default_100
-#mc_pic32_starterkit.upload.using=
-
-############################################################
-mc_pic32_ethernet_starterkit.name=Microchip PIC32 Ethernet Starter kit
-
-# new items
-mc_pic32_ethernet_starterkit.platform=pic32
-mc_pic32_ethernet_starterkit.board=_BOARD_PIC32_ETHERNET_STARTER_KIT_
-mc_pic32_ethernet_starterkit.board.define=-D_USE_USB_FOR_SERIAL_
-mc_pic32_ethernet_starterkit.ccflags=ffff
-mc_pic32_ethernet_starterkit.ldscript=chipKIT-MAX32-application-32MX795F512L.ld
-# end of new items
-
-mc_pic32_ethernet_starterkit.upload.protocol=stk500v2
-mc_pic32_ethernet_starterkit.upload.maximum_size=520192
-mc_pic32_ethernet_starterkit.upload.speed=115200
-
-mc_pic32_ethernet_starterkit.bootloader.low_fuses=0xff
-mc_pic32_ethernet_starterkit.bootloader.high_fuses=0xdd
-mc_pic32_ethernet_starterkit.bootloader.extended_fuses=0x00
-mc_pic32_ethernet_starterkit.bootloader.path=not-supported
-mc_pic32_ethernet_starterkit.bootloader.file=not-supported
-mc_pic32_ethernet_starterkit.bootloader.unlock_bits=0x3F
-mc_pic32_ethernet_starterkit.bootloader.lock_bits=0x0F
-
-mc_pic32_ethernet_starterkit.build.mcu=32MX795F512L
-mc_pic32_ethernet_starterkit.build.f_cpu=80000000L
-mc_pic32_ethernet_starterkit.build.core=pic32
-mc_pic32_ethernet_starterkit.build.variant=Default_100
-#mc_pic32_ethernet_starterkit.upload.using=
-
-############################################################
-mc_pic32_usb_starterkit.name=Microchip PIC32 USB Starter kit II
-
-# new items
-mc_pic32_usb_starterkit.platform=pic32
-mc_pic32_usb_starterkit.board=_BOARD_PIC32_USB_STARTER_KIT_
-mc_pic32_usb_starterkit.board.define=-D_USE_USB_FOR_SERIAL_
-mc_pic32_usb_starterkit.ccflags=ffff
-mc_pic32_usb_starterkit.ldscript=chipKIT-MAX32-application-32MX795F512L.ld
-# end of new items
-
-mc_pic32_usb_starterkit.upload.protocol=stk500v2
-mc_pic32_usb_starterkit.upload.maximum_size=520192
-mc_pic32_usb_starterkit.upload.speed=115200
-
-mc_pic32_usb_starterkit.bootloader.low_fuses=0xff
-mc_pic32_usb_starterkit.bootloader.high_fuses=0xdd
-mc_pic32_usb_starterkit.bootloader.extended_fuses=0x00
-mc_pic32_usb_starterkit.bootloader.path=not-supported
-mc_pic32_usb_starterkit.bootloader.file=not-supported
-mc_pic32_usb_starterkit.bootloader.unlock_bits=0x3F
-mc_pic32_usb_starterkit.bootloader.lock_bits=0x0F
-
-mc_pic32_usb_starterkit.build.mcu=32MX795F512L
-mc_pic32_usb_starterkit.build.f_cpu=80000000L
-mc_pic32_usb_starterkit.build.core=pic32
-mc_pic32_usb_starterkit.build.variant=Default_100
-#mc_pic32_usb_starterkit.upload.using=
-
-############################################################
-mc_pic32_explorer16.name=Microchip PIC32 Explorer 16
-
-# new items
-mc_pic32_explorer16.platform=pic32
-mc_pic32_explorer16.board=_BOARD_PIC32_EXPLORER16_
-mc_pic32_explorer16.board.define=
-mc_pic32_explorer16.ccflags=ffff
-mc_pic32_explorer16.ldscript=chipKIT-UNO32-application-32MX320F128L.ld
-# end of new items
-
-mc_pic32_explorer16.upload.protocol=stk500v2
-mc_pic32_explorer16.upload.maximum_size=520192
-mc_pic32_explorer16.upload.speed=115200
-
-mc_pic32_explorer16.bootloader.low_fuses=0xff
-mc_pic32_explorer16.bootloader.high_fuses=0xdd
-mc_pic32_explorer16.bootloader.extended_fuses=0x00
-mc_pic32_explorer16.bootloader.path=not-supported
-mc_pic32_explorer16.bootloader.file=not-supported
-mc_pic32_explorer16.bootloader.unlock_bits=0x3F
-mc_pic32_explorer16.bootloader.lock_bits=0x0F
-
-mc_pic32_explorer16.build.mcu=32MX360F512L
-mc_pic32_explorer16.build.f_cpu=80000000L
-mc_pic32_explorer16.build.core=pic32
-mc_pic32_explorer16.build.variant=Default_100
-#mc_pic32_explorer16.upload.using=
-
-############################################################
-mikroe_multimedia.name=MirkoElektronika PIC32 Multimedia Board
-
-# new items
-mikroe_multimedia.platform=pic32
-mikroe_multimedia.board=_BOARD_MIKROE_MULTIMEDIA_
-mikroe_multimedia.board.define=-D_USE_USB_FOR_SERIAL_
-mikroe_multimedia.ccflags=ffff
-mikroe_multimedia.ldscript=chipKIT-application-32MX460F512L.ld
-# end of new items
-
-mikroe_multimedia.upload.protocol=stk500v2
-mikroe_multimedia.upload.maximum_size=520192
-mikroe_multimedia.upload.speed=115200
-
-mikroe_multimedia.bootloader.low_fuses=0xff
-mikroe_multimedia.bootloader.high_fuses=0xdd
-mikroe_multimedia.bootloader.extended_fuses=0x00
-mikroe_multimedia.bootloader.path=not-supported
-mikroe_multimedia.bootloader.file=not-supported
-mikroe_multimedia.bootloader.unlock_bits=0x3F
-mikroe_multimedia.bootloader.lock_bits=0x0F
-
-mikroe_multimedia.build.mcu=32MX460F512L
-mikroe_multimedia.build.f_cpu=80000000L
-mikroe_multimedia.build.core=pic32
-mikroe_multimedia.build.variant=Default_100
-#mikroe_multimedia.upload.using=
-
-############################################################
-mikroe_mikromedia.name=MirkoElektronika PIC32 mikroMedia Board
-
-# new items
-mikroe_mikromedia.platform=pic32
-mikroe_mikromedia.board=_BOARD_MIKROE_MIKROMEDIA_
-mikroe_mikromedia.board.define=-D_USE_USB_FOR_SERIAL_
-mikroe_mikromedia.ccflags=ffff
-mikroe_mikromedia.ldscript=chipKIT-application-32MX460F512L.ld
-# end of new items
-
-mikroe_mikromedia.upload.protocol=stk500v2
-mikroe_mikromedia.upload.maximum_size=520192
-mikroe_mikromedia.upload.speed=115200
-
-mikroe_mikromedia.bootloader.low_fuses=0xff
-mikroe_mikromedia.bootloader.high_fuses=0xdd
-mikroe_mikromedia.bootloader.extended_fuses=0x00
-mikroe_mikromedia.bootloader.path=not-supported
-mikroe_mikromedia.bootloader.file=not-supported
-mikroe_mikromedia.bootloader.unlock_bits=0x3F
-mikroe_mikromedia.bootloader.lock_bits=0x0F
-
-mikroe_mikromedia.build.mcu=32MX460F512L
-mikroe_mikromedia.build.f_cpu=80000000L
-mikroe_mikromedia.build.core=pic32
-mikroe_mikromedia.build.variant=Default_100
-#mikroe_mikromedia.upload.using=
-
-############################################################
-ubw32_mx460.name=Pic32 UBW32-MX460
-
-# new items
-ubw32_mx460.platform=pic32
-ubw32_mx460.board=_BOARD_UBW32_MX460_
-ubw32_mx460.board.define=-D_USE_USB_FOR_SERIAL_
-ubw32_mx460.ccflags=ffff
-ubw32_mx460.ldscript=chipKIT-application-32MX460F512L.ld
-# end of new items
-
-ubw32_mx460.upload.protocol=stk500v2
-ubw32_mx460.upload.maximum_size=520192
-ubw32_mx460.upload.speed=115200
-
-ubw32_mx460.bootloader.low_fuses=0xff
-ubw32_mx460.bootloader.high_fuses=0xdd
-ubw32_mx460.bootloader.extended_fuses=0x00
-ubw32_mx460.bootloader.path=not-supported
-ubw32_mx460.bootloader.file=not-supported
-ubw32_mx460.bootloader.unlock_bits=0x3F
-ubw32_mx460.bootloader.lock_bits=0x0F
-
-ubw32_mx460.build.mcu=32MX460F512L
-ubw32_mx460.build.f_cpu=80000000L
-ubw32_mx460.build.core=pic32
-ubw32_mx460.build.variant=Default_100
-#ubw32_mx460.upload.using=
-
-############################################################
-ubw32_mx795.name=Pic32 UBW32-MX795
-
-# new items
-ubw32_mx795.platform=pic32
-ubw32_mx795.board=_BOARD_UBW32_MX795_
-ubw32_mx795.board.define=-D_USE_USB_FOR_SERIAL_
-ubw32_mx795.ccflags=ffff
-ubw32_mx795.ldscript=chipKIT-MAX32-application-32MX795F512L.ld
-# end of new items
-
-ubw32_mx795.upload.protocol=stk500v2
-ubw32_mx795.upload.maximum_size=520192
-ubw32_mx795.upload.speed=115200
-
-ubw32_mx795.bootloader.low_fuses=0xff
-ubw32_mx795.bootloader.high_fuses=0xdd
-ubw32_mx795.bootloader.extended_fuses=0x00
-ubw32_mx795.bootloader.path=not-supported
-ubw32_mx795.bootloader.file=not-supported
-ubw32_mx795.bootloader.unlock_bits=0x3F
-ubw32_mx795.bootloader.lock_bits=0x0F
-
-ubw32_mx795.build.mcu=32MX795F512L
-ubw32_mx795.build.f_cpu=80000000L
-ubw32_mx795.build.core=pic32
-ubw32_mx795.build.variant=Default_100
-#ubw32_mx795.upload.using=
-
-############################################################
-cui32.name=Pic32 CUI32-Development Stick
-
-# new items
-cui32.platform=pic32
-cui32.board=_BOARD_CUI32_
-cui32.board.define=-D_USE_USB_FOR_SERIAL_
-cui32.ccflags=ffff
-cui32.ldscript=chipKIT-application-32MX440F512H.ld
-# end of new items
-
-cui32.upload.protocol=stk500v2
-cui32.upload.maximum_size=520192
-cui32.upload.speed=115200
-
-cui32.bootloader.low_fuses=0xff
-cui32.bootloader.high_fuses=0xdd
-cui32.bootloader.extended_fuses=0x00
-cui32.bootloader.path=not-supported
-cui32.bootloader.file=not-supported
-cui32.bootloader.unlock_bits=0x3F
-cui32.bootloader.lock_bits=0x0F
-
-cui32.build.mcu=32MX440F512H
-cui32.build.f_cpu=80000000L
-cui32.build.core=pic32
-cui32.build.variant=Default_64
-#cui32.upload.using=
-
-############################################################
-CUI32stem.name=CUI32stem
-
-# new items
-CUI32stem.platform=pic32
-CUI32stem.board=_BOARD_CUI32_
-CUI32stem.board.define=-D_USE_USB_FOR_SERIAL_
-CUI32stem.ccflags=ffff
-CUI32stem.ldscript=chipKIT-MAX32-application-32MX795F512L.ld
-# end of new items
-
-CUI32stem.upload.protocol=stk500v2
-CUI32stem.upload.maximum_size=520192
-CUI32stem.upload.speed=115200
-
-CUI32stem.bootloader.low_fuses=0xff
-CUI32stem.bootloader.high_fuses=0xdd
-CUI32stem.bootloader.extended_fuses=0x00
-CUI32stem.bootloader.path=not-supported
-CUI32stem.bootloader.file=not-supported
-CUI32stem.bootloader.unlock_bits=0x3F
-CUI32stem.bootloader.lock_bits=0x0F
-
-CUI32stem.build.mcu=32MX795F512H
-CUI32stem.build.f_cpu=80000000L
-CUI32stem.build.core=pic32
-CUI32stem.build.variant=Default_64
-#CUI32stem.upload.using=
-
-
-############################################################
-fubarino_sd.name=FubarinoSD
-
-# new items
-fubarino_sd.platform=pic32
-fubarino_sd.board=_BOARD_FUBARINO_SD_
-fubarino_sd.board.define=-D_USE_USB_FOR_SERIAL_
-fubarino_sd.ccflags=ffff
-fubarino_sd.ldscript=chipKIT-application-32MX440F256H.ld
-# end of new items
-
-fubarino_sd.upload.protocol=stk500v2
-fubarino_sd.upload.maximum_size=258048
-fubarino_sd.upload.speed=115200
-
-fubarino_sd.bootloader.low_fuses=0xff
-fubarino_sd.bootloader.high_fuses=0xdd
-fubarino_sd.bootloader.extended_fuses=0x00
-fubarino_sd.bootloader.path=not-supported
-fubarino_sd.bootloader.file=not-supported
-fubarino_sd.bootloader.unlock_bits=0x3F
-fubarino_sd.bootloader.lock_bits=0x0F
-
-fubarino_sd.build.mcu=32MX440F256H
-fubarino_sd.build.f_cpu=80000000L
-fubarino_sd.build.core=pic32
-fubarino_sd.build.variant=fubarino_sd_v11
-
-
+############################################################
+uno_pic32.name=chipKIT UNO32
+
+# new items
+uno_pic32.platform=pic32
+uno_pic32.board=_BOARD_UNO_
+uno_pic32.board.define=
+#uno_pic32.compiler.define=
+uno_pic32.ccflags=ffff
+uno_pic32.ldscript=chipKIT-application-32MX320F128.ld
+# end of new items
+
+# Use a high -Gnum for devices that have less than 64K of data memory
+# For -G1024, objects 1024 bytes or smaller will be accessed by
+# gp-relative addressing
+uno_pic32.compiler.c.flags=-O2::-c::-mno-smart-io::-w::-ffunction-sections::-fdata-sections::-G1024::-g::-mdebugger::-Wcast-align
+uno_pic32.compiler.cpp.flags=-O2::-c::-mno-smart-io::-w::-fno-exceptions::-ffunction-sections::-fdata-sections::-G1024::-g::-mdebugger::-Wcast-align
+
+uno_pic32.upload.protocol=stk500v2
+uno_pic32.upload.maximum_size=126976
+uno_pic32.upload.speed=115200
+
+uno_pic32.bootloader.low_fuses=0xff
+uno_pic32.bootloader.high_fuses=0xdd
+uno_pic32.bootloader.extended_fuses=0x00
+uno_pic32.bootloader.path=not-supported
+uno_pic32.bootloader.file=not-supported
+uno_pic32.bootloader.unlock_bits=0x3F
+uno_pic32.bootloader.lock_bits=0x0F
+
+uno_pic32.build.mcu=32MX320F128H
+uno_pic32.build.f_cpu=80000000L
+uno_pic32.build.core=pic32
+uno_pic32.build.variant=Uno32
+#uno_pic32.upload.using=
+
+############################################################
+mega_pic32.name=chipKIT MAX32
+
+# new items
+mega_pic32.platform=pic32
+mega_pic32.board=_BOARD_MEGA_
+mega_pic32.board.define=
+mega_pic32.ccflags=ffff
+mega_pic32.ldscript=chipKIT-application-32MX795F512.ld
+# end of new items
+
+mega_pic32.upload.protocol=stk500v2
+mega_pic32.upload.maximum_size=520192
+mega_pic32.upload.speed=115200
+
+mega_pic32.bootloader.low_fuses=0xff
+mega_pic32.bootloader.high_fuses=0xdd
+mega_pic32.bootloader.extended_fuses=0x00
+mega_pic32.bootloader.path=not-supported
+mega_pic32.bootloader.file=not-supported
+mega_pic32.bootloader.unlock_bits=0x3F
+mega_pic32.bootloader.lock_bits=0x0F
+
+mega_pic32.build.mcu=32MX795F512L
+mega_pic32.build.f_cpu=80000000L
+mega_pic32.build.core=pic32
+mega_pic32.build.variant=Max32
+#mega_pic32.upload.using=
+
+############################################################
+mega_usb_pic32.name=chipKIT MAX32-USB for Serial
+
+# new items
+mega_usb_pic32.platform=pic32
+mega_usb_pic32.board=_BOARD_MEGA_USB_
+mega_usb_pic32.board.define=-D_USE_USB_FOR_SERIAL_
+mega_usb_pic32.ccflags=ffff
+mega_usb_pic32.ldscript=chipKIT-application-32MX795F512.ld
+# end of new items
+
+mega_usb_pic32.upload.protocol=stk500v2
+mega_usb_pic32.upload.maximum_size=520192
+mega_usb_pic32.upload.speed=115200
+
+mega_usb_pic32.bootloader.low_fuses=0xff
+mega_usb_pic32.bootloader.high_fuses=0xdd
+mega_usb_pic32.bootloader.extended_fuses=0x00
+mega_usb_pic32.bootloader.path=not-supported
+mega_usb_pic32.bootloader.file=not-supported
+mega_usb_pic32.bootloader.unlock_bits=0x3F
+mega_usb_pic32.bootloader.lock_bits=0x0F
+
+mega_usb_pic32.build.mcu=32MX795F512L
+mega_usb_pic32.build.f_cpu=80000000L
+mega_usb_pic32.build.core=pic32
+mega_usb_pic32.build.variant=Max32
+#mega_usb_pic32.upload.using=
+
+############################################################
+chipkit_uc32.name=chipKIT uC32
+
+# new items
+chipkit_uc32.platform=pic32
+chipkit_uc32.board=_BOARD_UC32_
+chipkit_uc32.board.define=
+chipkit_uc32.ccflags=ffff
+chipkit_uc32.ldscript=chipKIT-application-32MX340F512.ld
+# end of new items
+
+# Use a high -Gnum for devices that have less than 64K of data memory
+# For -G1024, objects 1024 bytes or smaller will be accessed by
+# gp-relative addressing
+chipkit_uc32.compiler.c.flags=-O2::-c::-mno-smart-io::-w::-ffunction-sections::-fdata-sections::-G1024::-g::-mdebugger::-Wcast-align
+chipkit_uc32.compiler.cpp.flags=-O2::-c::-mno-smart-io::-w::-fno-exceptions::-ffunction-sections::-fdata-sections::-G1024::-g::-mdebugger::-Wcast-align
+
+chipkit_uc32.upload.protocol=stk500v2
+chipkit_uc32.upload.maximum_size=520192
+chipkit_uc32.upload.speed=115200
+
+chipkit_uc32.bootloader.low_fuses=0xff
+chipkit_uc32.bootloader.high_fuses=0xdd
+chipkit_uc32.bootloader.extended_fuses=0x00
+chipkit_uc32.bootloader.path=not-supported
+chipkit_uc32.bootloader.file=not-supported
+chipkit_uc32.bootloader.unlock_bits=0x3F
+chipkit_uc32.bootloader.lock_bits=0x0F
+
+chipkit_uc32.build.mcu=32MX340F512H
+chipkit_uc32.build.f_cpu=80000000L
+chipkit_uc32.build.core=pic32
+chipkit_uc32.build.variant=uC32
+#chipkit_uc32.upload.using=
+
+############################################################
+cerebot_mx3ck_512.name=Cerebot MX3cK 512
+
+# new items
+cerebot_mx3ck_512.platform=pic32
+cerebot_mx3ck_512.board=_BOARD_CEREBOT_MX3CK_512_
+cerebot_mx3ck_512.board.define=
+cerebot_mx3ck_512.ccflags=ffff
+cerebot_mx3ck_512.ldscript=chipKIT-application-32MX340F512.ld
+# end of new items
+
+# Use a high -Gnum for devices that have less than 64K of data memory
+# For -G1024, objects 1024 bytes or smaller will be accessed by
+# gp-relative addressing
+cerebot_mx3ck_512.compiler.c.flags=-O2::-c::-mno-smart-io::-w::-ffunction-sections::-fdata-sections::-G1024::-g::-mdebugger::-Wcast-align
+cerebot_mx3ck_512.compiler.cpp.flags=-O2::-c::-mno-smart-io::-w::-fno-exceptions::-ffunction-sections::-fdata-sections::-G1024::-g::-mdebugger::-Wcast-align
+
+cerebot_mx3ck_512.upload.protocol=stk500v2
+cerebot_mx3ck_512.upload.maximum_size=520192
+cerebot_mx3ck_512.upload.speed=115200
+
+cerebot_mx3ck_512.bootloader.low_fuses=0xff
+cerebot_mx3ck_512.bootloader.high_fuses=0xdd
+cerebot_mx3ck_512.bootloader.extended_fuses=0x00
+cerebot_mx3ck_512.bootloader.path=not-supported
+cerebot_mx3ck_512.bootloader.file=not-supported
+cerebot_mx3ck_512.bootloader.unlock_bits=0x3F
+cerebot_mx3ck_512.bootloader.lock_bits=0x0F
+
+cerebot_mx3ck_512.build.mcu=32MX340F512H
+cerebot_mx3ck_512.build.f_cpu=80000000L
+cerebot_mx3ck_512.build.core=pic32
+cerebot_mx3ck_512.build.variant=Cerebot_MX3cK_512
+#chipkit_uc32.upload.using=
+
+############################################################
+cerebot_mx3ck.name=Cerebot MX3cK
+
+# new items
+cerebot_mx3ck.platform=pic32
+cerebot_mx3ck.board=_BOARD_CEREBOT_MX3CK_
+cerebot_mx3ck.board.define=
+cerebot_mx3ck.ccflags=ffff
+cerebot_mx3ck.ldscript=chipKIT-application-32MX320F128.ld
+# end of new items
+
+# Use a high -Gnum for devices that have less than 64K of data memory
+# For -G1024, objects 1024 bytes or smaller will be accessed by
+# gp-relative addressing
+cerebot_mx3ck.compiler.c.flags=-O2::-c::-mno-smart-io::-w::-ffunction-sections::-fdata-sections::-G1024::-g::-mdebugger::-Wcast-align
+cerebot_mx3ck.compiler.cpp.flags=-O2::-c::-mno-smart-io::-w::-fno-exceptions::-ffunction-sections::-fdata-sections::-G1024::-g::-mdebugger::-Wcast-align
+
+cerebot_mx3ck.upload.protocol=stk500v2
+cerebot_mx3ck.upload.maximum_size=126976
+cerebot_mx3ck.upload.speed=115200
+
+cerebot_mx3ck.bootloader.low_fuses=0xff
+cerebot_mx3ck.bootloader.high_fuses=0xdd
+cerebot_mx3ck.bootloader.extended_fuses=0x00
+cerebot_mx3ck.bootloader.path=not-supported
+cerebot_mx3ck.bootloader.file=not-supported
+cerebot_mx3ck.bootloader.unlock_bits=0x3F
+cerebot_mx3ck.bootloader.lock_bits=0x0F
+
+cerebot_mx3ck.build.mcu=32MX320F128H
+cerebot_mx3ck.build.f_cpu=80000000L
+cerebot_mx3ck.build.core=pic32
+cerebot_mx3ck.build.variant=Cerebot_MX3cK
+#cerebot_mx3ck.upload.using=
+
+############################################################
+cerebot_mx4ck.name=Cerebot MX4cK
+
+# new items
+cerebot_mx4ck.platform=pic32
+cerebot_mx4ck.board=_BOARD_CEREBOT_MX4CK_
+cerebot_mx4ck.board.define=
+cerebot_mx4ck.ccflags=ffff
+cerebot_mx4ck.ldscript=chipKIT-application-32MX460F512.ld
+# end of new items
+
+cerebot_mx4ck.upload.protocol=stk500v2
+cerebot_mx4ck.upload.maximum_size=520192
+cerebot_mx4ck.upload.speed=115200
+
+cerebot_mx4ck.bootloader.low_fuses=0xff
+cerebot_mx4ck.bootloader.high_fuses=0xdd
+cerebot_mx4ck.bootloader.extended_fuses=0x00
+cerebot_mx4ck.bootloader.path=not-supported
+cerebot_mx4ck.bootloader.file=not-supported
+cerebot_mx4ck.bootloader.unlock_bits=0x3F
+cerebot_mx4ck.bootloader.lock_bits=0x0F
+
+cerebot_mx4ck.build.mcu=32MX460F512L
+cerebot_mx4ck.build.f_cpu=80000000L
+cerebot_mx4ck.build.core=pic32
+cerebot_mx4ck.build.variant=Cerebot_MX4cK
+#cerebot_mx4ck.upload.using=
+
+############################################################
+cerebot_mx7ck.name=Cerebot MX7cK
+
+# new items
+cerebot_mx7ck.platform=pic32
+cerebot_mx7ck.board=_BOARD_CEREBOT_MX7CK_
+cerebot_mx7ck.board.define=
+cerebot_mx7ck.ccflags=ffff
+cerebot_mx7ck.ldscript=chipKIT-application-32MX795F512.ld
+# end of new items
+
+cerebot_mx7ck.upload.protocol=stk500v2
+cerebot_mx7ck.upload.maximum_size=520192
+cerebot_mx7ck.upload.speed=115200
+
+cerebot_mx7ck.bootloader.low_fuses=0xff
+cerebot_mx7ck.bootloader.high_fuses=0xdd
+cerebot_mx7ck.bootloader.extended_fuses=0x00
+cerebot_mx7ck.bootloader.path=not-supported
+cerebot_mx7ck.bootloader.file=not-supported
+cerebot_mx7ck.bootloader.unlock_bits=0x3F
+cerebot_mx7ck.bootloader.lock_bits=0x0F
+
+cerebot_mx7ck.build.mcu=32MX795F512L
+cerebot_mx7ck.build.f_cpu=80000000L
+cerebot_mx7ck.build.core=pic32
+cerebot_mx7ck.build.variant=Cerebot_MX7cK
+#cerebot_mx7ck.upload.using=
+
+############################################################
+cerebot32mx4.name=Cerebot 32MX4
+
+# new items
+cerebot32mx4.platform=pic32
+cerebot32mx4.board=_BOARD_CEREBOT_32MX4_
+cerebot32mx4.board.define=
+cerebot32mx4.ccflags=ffff
+cerebot32mx4.ldscript=chipKIT-application-32MX460F512.ld
+# end of new items
+
+cerebot32mx4.upload.protocol=stk500v2
+cerebot32mx4.upload.maximum_size=520192
+cerebot32mx4.upload.speed=115200
+
+cerebot32mx4.bootloader.low_fuses=0xff
+cerebot32mx4.bootloader.high_fuses=0xdd
+cerebot32mx4.bootloader.extended_fuses=0x00
+cerebot32mx4.bootloader.path=not-supported
+cerebot32mx4.bootloader.file=not-supported
+cerebot32mx4.bootloader.unlock_bits=0x3F
+cerebot32mx4.bootloader.lock_bits=0x0F
+
+cerebot32mx4.build.mcu=32MX460F512L
+cerebot32mx4.build.f_cpu=80000000L
+cerebot32mx4.build.core=pic32
+cerebot32mx4.build.variant=Cerebot_32MX4
+#cerebot32mx4.upload.using=
+
+############################################################
+cerebot32mx7.name=Cerebot 32MX7
+
+# new items
+cerebot32mx7.platform=pic32
+cerebot32mx7.board=_BOARD_CEREBOT_32MX7_
+cerebot32mx7.board.define=
+cerebot32mx7.ccflags=ffff
+cerebot32mx7.ldscript=chipKIT-application-32MX795F512.ld
+# end of new items
+
+cerebot32mx7.upload.protocol=stk500v2
+cerebot32mx7.upload.maximum_size=520192
+cerebot32mx7.upload.speed=115200
+
+cerebot32mx7.bootloader.low_fuses=0xff
+cerebot32mx7.bootloader.high_fuses=0xdd
+cerebot32mx7.bootloader.extended_fuses=0x00
+cerebot32mx7.bootloader.path=not-supported
+cerebot32mx7.bootloader.file=not-supported
+cerebot32mx7.bootloader.unlock_bits=0x3F
+cerebot32mx7.bootloader.lock_bits=0x0F
+
+cerebot32mx7.build.mcu=32MX795F512L
+cerebot32mx7.build.f_cpu=80000000L
+cerebot32mx7.build.core=pic32
+cerebot32mx7.build.variant=Cerebot_32MX7
+#cerebot32mx7.upload.using=
+
+############################################################
+mc_pic32_starterkit.name=Microchip PIC32 Starter kit
+
+# new items
+mc_pic32_starterkit.platform=pic32
+mc_pic32_starterkit.board=_BOARD_PIC32_STARTER_KIT_
+mc_pic32_starterkit.board.define=
+mc_pic32_starterkit.ccflags=ffff
+mc_pic32_starterkit.ldscript=chipKIT-application-32MX320F128.ld
+# end of new items
+
+mc_pic32_starterkit.upload.protocol=stk500v2
+mc_pic32_starterkit.upload.maximum_size=520192
+mc_pic32_starterkit.upload.speed=115200
+
+mc_pic32_starterkit.bootloader.low_fuses=0xff
+mc_pic32_starterkit.bootloader.high_fuses=0xdd
+mc_pic32_starterkit.bootloader.extended_fuses=0x00
+mc_pic32_starterkit.bootloader.path=not-supported
+mc_pic32_starterkit.bootloader.file=not-supported
+mc_pic32_starterkit.bootloader.unlock_bits=0x3F
+mc_pic32_starterkit.bootloader.lock_bits=0x0F
+
+mc_pic32_starterkit.build.mcu=32MX360F512L
+mc_pic32_starterkit.build.f_cpu=80000000L
+mc_pic32_starterkit.build.core=pic32
+mc_pic32_starterkit.build.variant=Default_100
+#mc_pic32_starterkit.upload.using=
+
+############################################################
+mc_pic32_ethernet_starterkit.name=Microchip PIC32 Ethernet Starter kit
+
+# new items
+mc_pic32_ethernet_starterkit.platform=pic32
+mc_pic32_ethernet_starterkit.board=_BOARD_PIC32_ETHERNET_STARTER_KIT_
+mc_pic32_ethernet_starterkit.board.define=-D_USE_USB_FOR_SERIAL_
+mc_pic32_ethernet_starterkit.ccflags=ffff
+mc_pic32_ethernet_starterkit.ldscript=chipKIT-application-32MX795F512.ld
+# end of new items
+
+mc_pic32_ethernet_starterkit.upload.protocol=stk500v2
+mc_pic32_ethernet_starterkit.upload.maximum_size=520192
+mc_pic32_ethernet_starterkit.upload.speed=115200
+
+mc_pic32_ethernet_starterkit.bootloader.low_fuses=0xff
+mc_pic32_ethernet_starterkit.bootloader.high_fuses=0xdd
+mc_pic32_ethernet_starterkit.bootloader.extended_fuses=0x00
+mc_pic32_ethernet_starterkit.bootloader.path=not-supported
+mc_pic32_ethernet_starterkit.bootloader.file=not-supported
+mc_pic32_ethernet_starterkit.bootloader.unlock_bits=0x3F
+mc_pic32_ethernet_starterkit.bootloader.lock_bits=0x0F
+
+mc_pic32_ethernet_starterkit.build.mcu=32MX795F512L
+mc_pic32_ethernet_starterkit.build.f_cpu=80000000L
+mc_pic32_ethernet_starterkit.build.core=pic32
+mc_pic32_ethernet_starterkit.build.variant=Default_100
+#mc_pic32_ethernet_starterkit.upload.using=
+
+############################################################
+mc_pic32_usb_starterkit.name=Microchip PIC32 USB Starter kit II
+
+# new items
+mc_pic32_usb_starterkit.platform=pic32
+mc_pic32_usb_starterkit.board=_BOARD_PIC32_USB_STARTER_KIT_
+mc_pic32_usb_starterkit.board.define=-D_USE_USB_FOR_SERIAL_
+mc_pic32_usb_starterkit.ccflags=ffff
+mc_pic32_usb_starterkit.ldscript=chipKIT-application-32MX795F512.ld
+# end of new items
+
+mc_pic32_usb_starterkit.upload.protocol=stk500v2
+mc_pic32_usb_starterkit.upload.maximum_size=520192
+mc_pic32_usb_starterkit.upload.speed=115200
+
+mc_pic32_usb_starterkit.bootloader.low_fuses=0xff
+mc_pic32_usb_starterkit.bootloader.high_fuses=0xdd
+mc_pic32_usb_starterkit.bootloader.extended_fuses=0x00
+mc_pic32_usb_starterkit.bootloader.path=not-supported
+mc_pic32_usb_starterkit.bootloader.file=not-supported
+mc_pic32_usb_starterkit.bootloader.unlock_bits=0x3F
+mc_pic32_usb_starterkit.bootloader.lock_bits=0x0F
+
+mc_pic32_usb_starterkit.build.mcu=32MX795F512L
+mc_pic32_usb_starterkit.build.f_cpu=80000000L
+mc_pic32_usb_starterkit.build.core=pic32
+mc_pic32_usb_starterkit.build.variant=Default_100
+#mc_pic32_usb_starterkit.upload.using=
+
+############################################################
+mc_pic32_explorer16.name=Microchip PIC32 Explorer 16
+
+# new items
+mc_pic32_explorer16.platform=pic32
+mc_pic32_explorer16.board=_BOARD_PIC32_EXPLORER16_
+mc_pic32_explorer16.board.define=
+mc_pic32_explorer16.ccflags=ffff
+mc_pic32_explorer16.ldscript=chipKIT-application-32MX320F128.ld
+# end of new items
+
+mc_pic32_explorer16.upload.protocol=stk500v2
+mc_pic32_explorer16.upload.maximum_size=520192
+mc_pic32_explorer16.upload.speed=115200
+
+mc_pic32_explorer16.bootloader.low_fuses=0xff
+mc_pic32_explorer16.bootloader.high_fuses=0xdd
+mc_pic32_explorer16.bootloader.extended_fuses=0x00
+mc_pic32_explorer16.bootloader.path=not-supported
+mc_pic32_explorer16.bootloader.file=not-supported
+mc_pic32_explorer16.bootloader.unlock_bits=0x3F
+mc_pic32_explorer16.bootloader.lock_bits=0x0F
+
+mc_pic32_explorer16.build.mcu=32MX360F512L
+mc_pic32_explorer16.build.f_cpu=80000000L
+mc_pic32_explorer16.build.core=pic32
+mc_pic32_explorer16.build.variant=Default_100
+#mc_pic32_explorer16.upload.using=
+
+############################################################
+mikroe_multimedia.name=MirkoElektronika PIC32 Multimedia Board
+
+# new items
+mikroe_multimedia.platform=pic32
+mikroe_multimedia.board=_BOARD_MIKROE_MULTIMEDIA_
+mikroe_multimedia.board.define=-D_USE_USB_FOR_SERIAL_
+mikroe_multimedia.ccflags=ffff
+mikroe_multimedia.ldscript=chipKIT-application-32MX460F512.ld
+# end of new items
+
+mikroe_multimedia.upload.protocol=stk500v2
+mikroe_multimedia.upload.maximum_size=520192
+mikroe_multimedia.upload.speed=115200
+
+mikroe_multimedia.bootloader.low_fuses=0xff
+mikroe_multimedia.bootloader.high_fuses=0xdd
+mikroe_multimedia.bootloader.extended_fuses=0x00
+mikroe_multimedia.bootloader.path=not-supported
+mikroe_multimedia.bootloader.file=not-supported
+mikroe_multimedia.bootloader.unlock_bits=0x3F
+mikroe_multimedia.bootloader.lock_bits=0x0F
+
+mikroe_multimedia.build.mcu=32MX460F512L
+mikroe_multimedia.build.f_cpu=80000000L
+mikroe_multimedia.build.core=pic32
+mikroe_multimedia.build.variant=Default_100
+#mikroe_multimedia.upload.using=
+
+############################################################
+mikroe_mikromedia.name=MirkoElektronika PIC32 mikroMedia Board
+
+# new items
+mikroe_mikromedia.platform=pic32
+mikroe_mikromedia.board=_BOARD_MIKROE_MIKROMEDIA_
+mikroe_mikromedia.board.define=-D_USE_USB_FOR_SERIAL_
+mikroe_mikromedia.ccflags=ffff
+mikroe_mikromedia.ldscript=chipKIT-application-32MX460F512.ld
+# end of new items
+
+mikroe_mikromedia.upload.protocol=stk500v2
+mikroe_mikromedia.upload.maximum_size=520192
+mikroe_mikromedia.upload.speed=115200
+
+mikroe_mikromedia.bootloader.low_fuses=0xff
+mikroe_mikromedia.bootloader.high_fuses=0xdd
+mikroe_mikromedia.bootloader.extended_fuses=0x00
+mikroe_mikromedia.bootloader.path=not-supported
+mikroe_mikromedia.bootloader.file=not-supported
+mikroe_mikromedia.bootloader.unlock_bits=0x3F
+mikroe_mikromedia.bootloader.lock_bits=0x0F
+
+mikroe_mikromedia.build.mcu=32MX460F512L
+mikroe_mikromedia.build.f_cpu=80000000L
+mikroe_mikromedia.build.core=pic32
+mikroe_mikromedia.build.variant=Default_100
+#mikroe_mikromedia.upload.using=
+
+############################################################
+ubw32_mx460.name=Pic32 UBW32-MX460
+
+# new items
+ubw32_mx460.platform=pic32
+ubw32_mx460.board=_BOARD_UBW32_MX460_
+ubw32_mx460.board.define=-D_USE_USB_FOR_SERIAL_
+ubw32_mx460.ccflags=ffff
+ubw32_mx460.ldscript=chipKIT-application-32MX460F512.ld
+# end of new items
+
+ubw32_mx460.upload.protocol=stk500v2
+ubw32_mx460.upload.maximum_size=520192
+ubw32_mx460.upload.speed=115200
+
+ubw32_mx460.bootloader.low_fuses=0xff
+ubw32_mx460.bootloader.high_fuses=0xdd
+ubw32_mx460.bootloader.extended_fuses=0x00
+ubw32_mx460.bootloader.path=not-supported
+ubw32_mx460.bootloader.file=not-supported
+ubw32_mx460.bootloader.unlock_bits=0x3F
+ubw32_mx460.bootloader.lock_bits=0x0F
+
+ubw32_mx460.build.mcu=32MX460F512L
+ubw32_mx460.build.f_cpu=80000000L
+ubw32_mx460.build.core=pic32
+ubw32_mx460.build.variant=Default_100
+#ubw32_mx460.upload.using=
+
+############################################################
+ubw32_mx795.name=Pic32 UBW32-MX795
+
+# new items
+ubw32_mx795.platform=pic32
+ubw32_mx795.board=_BOARD_UBW32_MX795_
+ubw32_mx795.board.define=-D_USE_USB_FOR_SERIAL_
+ubw32_mx795.ccflags=ffff
+ubw32_mx795.ldscript=chipKIT-application-32MX795F512.ld
+# end of new items
+
+ubw32_mx795.upload.protocol=stk500v2
+ubw32_mx795.upload.maximum_size=520192
+ubw32_mx795.upload.speed=115200
+
+ubw32_mx795.bootloader.low_fuses=0xff
+ubw32_mx795.bootloader.high_fuses=0xdd
+ubw32_mx795.bootloader.extended_fuses=0x00
+ubw32_mx795.bootloader.path=not-supported
+ubw32_mx795.bootloader.file=not-supported
+ubw32_mx795.bootloader.unlock_bits=0x3F
+ubw32_mx795.bootloader.lock_bits=0x0F
+
+ubw32_mx795.build.mcu=32MX795F512L
+ubw32_mx795.build.f_cpu=80000000L
+ubw32_mx795.build.core=pic32
+ubw32_mx795.build.variant=Default_100
+#ubw32_mx795.upload.using=
+
+############################################################
+cui32.name=Pic32 CUI32-Development Stick
+
+# new items
+cui32.platform=pic32
+cui32.board=_BOARD_CUI32_
+cui32.board.define=-D_USE_USB_FOR_SERIAL_
+cui32.ccflags=ffff
+cui32.ldscript=chipKIT-application-32MX440F512.ld
+# end of new items
+
+cui32.upload.protocol=stk500v2
+cui32.upload.maximum_size=520192
+cui32.upload.speed=115200
+
+cui32.bootloader.low_fuses=0xff
+cui32.bootloader.high_fuses=0xdd
+cui32.bootloader.extended_fuses=0x00
+cui32.bootloader.path=not-supported
+cui32.bootloader.file=not-supported
+cui32.bootloader.unlock_bits=0x3F
+cui32.bootloader.lock_bits=0x0F
+
+cui32.build.mcu=32MX440F512H
+cui32.build.f_cpu=80000000L
+cui32.build.core=pic32
+cui32.build.variant=Default_64
+#cui32.upload.using=
+
+############################################################
+CUI32stem.name=CUI32stem
+
+# new items
+CUI32stem.platform=pic32
+CUI32stem.board=_BOARD_CUI32_
+CUI32stem.board.define=-D_USE_USB_FOR_SERIAL_
+CUI32stem.ccflags=ffff
+CUI32stem.ldscript=chipKIT-application-32MX795F512.ld
+# end of new items
+
+CUI32stem.upload.protocol=stk500v2
+CUI32stem.upload.maximum_size=520192
+CUI32stem.upload.speed=115200
+
+CUI32stem.bootloader.low_fuses=0xff
+CUI32stem.bootloader.high_fuses=0xdd
+CUI32stem.bootloader.extended_fuses=0x00
+CUI32stem.bootloader.path=not-supported
+CUI32stem.bootloader.file=not-supported
+CUI32stem.bootloader.unlock_bits=0x3F
+CUI32stem.bootloader.lock_bits=0x0F
+
+CUI32stem.build.mcu=32MX795F512H
+CUI32stem.build.f_cpu=80000000L
+CUI32stem.build.core=pic32
+CUI32stem.build.variant=Default_64
+#CUI32stem.upload.using=
+
+
+############################################################
+fubarino_sd.name=FubarinoSD
+
+# new items
+fubarino_sd.platform=pic32
+fubarino_sd.board=_BOARD_FUBARINO_SD_
+fubarino_sd.board.define=-D_USE_USB_FOR_SERIAL_
+fubarino_sd.ccflags=ffff
+fubarino_sd.ldscript=chipKIT-application-32MX440F256.ld
+# end of new items
+
+fubarino_sd.upload.protocol=stk500v2
+fubarino_sd.upload.maximum_size=258048
+fubarino_sd.upload.speed=115200
+
+fubarino_sd.bootloader.low_fuses=0xff
+fubarino_sd.bootloader.high_fuses=0xdd
+fubarino_sd.bootloader.extended_fuses=0x00
+fubarino_sd.bootloader.path=not-supported
+fubarino_sd.bootloader.file=not-supported
+fubarino_sd.bootloader.unlock_bits=0x3F
+fubarino_sd.bootloader.lock_bits=0x0F
+
+fubarino_sd.build.mcu=32MX440F256H
+fubarino_sd.build.f_cpu=80000000L
+fubarino_sd.build.core=pic32
+fubarino_sd.build.variant=fubarino_sd_v11
+
+
+
View
134 hardware/pic32/cores/pic32/chipKIT-application-32MX120F032.ld
@@ -0,0 +1,134 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-tradlittlemips")
+OUTPUT_ARCH(pic32mx)
+ENTRY(_reset)
+/*
+ * Provide for a minimum stack and heap size
+ * - _min_stack_size - represents the minimum space that must be made
+ * available for the stack. Can be overridden from
+ * the command line using the linker's --defsym option.
+ * - _min_heap_size - represents the minimum space that must be made
+ * available for the heap. Can be overridden from
+ * the command line using the linker's --defsym option.
+ */
+EXTERN (_min_stack_size _min_heap_size)
+PROVIDE(_min_stack_size = 0x800) ;
+PROVIDE(_min_heap_size = 0x800) ;
+
+/*************************************************************************
+ * Processor-specific object file. Contains SFR definitions.
+ *************************************************************************/
+INPUT("processor.o")
+
+/*************************************************************************
+ * Memory Regions
+ *
+ * Memory regions without attributes cannot be used for orphaned sections.
+ * Only sections specifically assigned to these regions can be allocated
+ * into these regions.
+ *************************************************************************/
+MEMORY
+{
+ exception_mem : ORIGIN = 0x9D000000, LENGTH = 0x1000
+ kseg0_program_mem (rx) : ORIGIN = 0x9D001000, LENGTH = 0x6000
+ kseg0_eeprom_mem : ORIGIN = 0x9D006000, LENGTH = 0x1000
+ kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0
+ kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
+ debug_exec_mem : ORIGIN = 0xBFC00490, LENGTH = 0
+ config3 : ORIGIN = 0xBFC00BF0, LENGTH = 0x4
+ config2 : ORIGIN = 0xBFC00BF4, LENGTH = 0x4
+ config1 : ORIGIN = 0xBFC00BF8, LENGTH = 0x4
+ config0 : ORIGIN = 0xBFC00BFC, LENGTH = 0x4
+ kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x2000
+ sfrs : ORIGIN = 0xBF800000, LENGTH = 0x100000
+ configsfrs : ORIGIN = 0xBFC00BF0, LENGTH = 0x10
+}
+
+/*************************************************************************
+ * Memory Address Equates
+ *************************************************************************/
+_ebase_address = ORIGIN(exception_mem);
+_IMAGE_PTR_TABLE = _ebase_address + 0x0F8;
+_IMAGE_HEADER_ADDR = _ebase_address + 0x0FC;
+_GEN_EXCPT_ADDR = _ebase_address + 0x180;
+_RESET_ADDR = ORIGIN(kseg0_program_mem);
+_EEPROM_ADDR = ORIGIN(kseg0_eeprom_mem);
+_BEV_EXCPT_ADDR = 0xBFC00380;
+_DBG_EXCPT_ADDR = 0xBFC00480;
+_DBG_CODE_ADDR = ORIGIN(debug_exec_mem);
+
+/*************************************************************************
+ * Bootloader program directives.
+ *
+ * _IMAGE_TYPE
+ *
+ * image type:
+ */
+
+_imageReserved = 0x00000000 ;
+_imageMPIDE = 0x00000001 ; /* This is a normal MPIDE sketch */
+_imageBootFlashBootloader = 0x00000002 ; /* This is a boot flash bootloader */
+_imageProgramFlashBootloader = 0x00000004 ; /* This is a program flash bootloader */
+_imageSplitFlashBootloader = 0x00000008 ; /* This has bootloader code in both boot and program flash */
+
+ /*
+ * Instructions for the bootloader
+ */
+
+_imageFullFlashEraseLess4KEEProm = 0x00010000 ; /* The original bootloader method of erasing all of program flash except the last 4K reserved for eeprom */
+_imageJustInTimeFlashErase = 0x00020000 ; /* Only flash pages written too needed by the sketch is erased */
+_imageLinkerSpecifiedFlashErase = 0x00040000 ; /* The linker defines the flash range to erase */
+_imageFullFlashErase = 0x00080000 ; /* All of flash is erased */
+_imageExecutionJumpAddress = 0x01000000 ; /* the bootloader will jump to the execution jump address immediately after programming */
+_imageExecutionJumpToFirstInFlash = 0x02000000 ; /* the bootloader will jump to the first sketch loaded in flash ignoring the execution jump address immediately after programming */
+
+/*
+ * _IMAGE_FLASH_SIZE
+ *
+ * Typically _imageJustInTimeFlashErase is selected to just erase the pages
+ * of flash that code is written too; thus leaving all other flash pages untouched.
+ *
+ * If _imageLinkerSpecifiedFlashErase set, then the range
+ * starting from _ebase_address for _IMAGE_FLASH_SIZE bytes are erased.
+ *
+ * If _imageFullFlashErase is specified, than the whole flash
+ * as known by the bootloader will be erased. This will erase eeprom as well
+ *
+ * if _imageFullFlashEraseLess4KEEProm is set, all of flash less the last 4K is
+ * erased, this is the old default. This bit could be set to make a program flash bootloader
+ * erasing everything but the old flash. If NOTHING is set, this will be the default as this is the old behavior.
+ *
+ * _JUMP_ADDR
+ *
+ * This is the address that the bootloader will jump to start execution
+ * of the sketch. This is almost always _RESET_ADDR.
+ *
+ * However, you can specify an alternate entry execution point for example
+ * if you have alternate starup code that, say, shared
+ * the runtime with other sketches or needed some kind of specific handling
+ *
+ * Immediately after programming (avrdude upload) the bootloader will typically
+ * jump to the just loaded sketch, no matter where it was loaded in flash.
+ * _imageExecutionJumpToFirstInFlash will tell the bootloader to jump to the first
+ * sketch in flash even if the just loaded one is not at the beginning of flash.
+ * This is useful when programming sketches in slots of flash and then always
+ * jumping to the program-flash loader (vector sketch) as if the board was just reset.
+ * This bit does not effect jumping to a sketch already in flash after reset.
+ * As of today, after reset, the first program in flash will always be jumped to.
+ *
+ *************************************************************************/
+ _IMAGE_TYPE = _imageMPIDE | _imageJustInTimeFlashErase | _imageExecutionJumpAddress;
+ _IMAGE_FLASH_SIZE = LENGTH(exception_mem) + LENGTH(kseg0_program_mem);
+_JUMP_ADDR = _RESET_ADDR;
+
+SECTIONS
+{
+ /* Boot Sections */
+ .reset _RESET_ADDR :
+ {
+ KEEP(*(.reset))
+ } > kseg0_program_mem
+}
+
+/* From here out every linker script is the same, so just include it */
+INCLUDE "./hardware/pic32/cores/pic32/chipKIT-application-COMMON.ld"
View
135 hardware/pic32/cores/pic32/chipKIT-application-32MX250F128.ld
@@ -0,0 +1,135 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-tradlittlemips")
+OUTPUT_ARCH(pic32mx)
+ENTRY(_reset)
+/*
+ * Provide for a minimum stack and heap size
+ * - _min_stack_size - represents the minimum space that must be made
+ * available for the stack. Can be overridden from
+ * the command line using the linker's --defsym option.
+ * - _min_heap_size - represents the minimum space that must be made
+ * available for the heap. Can be overridden from
+ * the command line using the linker's --defsym option.
+ */
+EXTERN (_min_stack_size _min_heap_size)
+PROVIDE(_min_stack_size = 0x800) ;
+PROVIDE(_min_heap_size = 0x800) ;
+
+/*************************************************************************
+ * Processor-specific object file. Contains SFR definitions.
+ *************************************************************************/
+INPUT("processor.o")
+
+/*************************************************************************
+ * Memory Regions
+ *
+ * Memory regions without attributes cannot be used for orphaned sections.
+ * Only sections specifically assigned to these regions can be allocated
+ * into these regions.
+ *************************************************************************/
+MEMORY
+{
+ exception_mem : ORIGIN = 0x9D000000, LENGTH = 0x1000
+ kseg0_program_mem (rx) : ORIGIN = 0x9D001000, LENGTH = 0x1D000
+ kseg0_eeprom_mem : ORIGIN = 0x9D01E000, LENGTH = 0x1000
+ kseg0_splitflash_mem : ORIGIN = 0x9D01F000, LENGTH = 0x1000
+ kseg0_boot_mem : ORIGIN = 0x9FC00200, LENGTH = 0
+ kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
+ debug_exec_mem : ORIGIN = 0xBFC00490, LENGTH = 0
+ config3 : ORIGIN = 0xBFC00BF0, LENGTH = 0x4
+ config2 : ORIGIN = 0xBFC00BF4, LENGTH = 0x4
+ config1 : ORIGIN = 0xBFC00BF8, LENGTH = 0x4
+ config0 : ORIGIN = 0xBFC00BFC, LENGTH = 0x4
+ kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x8000
+ sfrs : ORIGIN = 0xBF800000, LENGTH = 0x100000
+ configsfrs : ORIGIN = 0xBFC00BF0, LENGTH = 0x10
+}
+
+/*************************************************************************
+ * Memory Address Equates
+ *************************************************************************/
+_ebase_address = ORIGIN(exception_mem);
+_IMAGE_PTR_TABLE = _ebase_address + 0x0F8;
+_IMAGE_HEADER_ADDR = _ebase_address + 0x0FC;
+_GEN_EXCPT_ADDR = _ebase_address + 0x180;
+_RESET_ADDR = ORIGIN(kseg0_program_mem);
+_EEPROM_ADDR = ORIGIN(kseg0_eeprom_mem);
+_BEV_EXCPT_ADDR = 0xBFC00380;
+_DBG_EXCPT_ADDR = 0xBFC00480;
+_DBG_CODE_ADDR = ORIGIN(debug_exec_mem);
+
+/*************************************************************************
+ * Bootloader program directives.
+ *
+ * _IMAGE_TYPE
+ *
+ * image type:
+ */
+
+_imageReserved = 0x00000000 ;
+_imageMPIDE = 0x00000001 ; /* This is a normal MPIDE sketch */
+_imageBootFlashBootloader = 0x00000002 ; /* This is a boot flash bootloader */
+_imageProgramFlashBootloader = 0x00000004 ; /* This is a program flash bootloader */
+_imageSplitFlashBootloader = 0x00000008 ; /* This has bootloader code in both boot and program flash */
+
+ /*
+ * Instructions for the bootloader
+ */
+
+_imageFullFlashEraseLess4KEEProm = 0x00010000 ; /* The original bootloader method of erasing all of program flash except the last 4K reserved for eeprom */
+_imageJustInTimeFlashErase = 0x00020000 ; /* Only flash pages written too needed by the sketch is erased */
+_imageLinkerSpecifiedFlashErase = 0x00040000 ; /* The linker defines the flash range to erase */
+_imageFullFlashErase = 0x00080000 ; /* All of flash is erased */
+_imageExecutionJumpAddress = 0x01000000 ; /* the bootloader will jump to the execution jump address immediately after programming */
+_imageExecutionJumpToFirstInFlash = 0x02000000 ; /* the bootloader will jump to the first sketch loaded in flash ignoring the execution jump address immediately after programming */
+
+/*
+ * _IMAGE_FLASH_SIZE
+ *
+ * Typically _imageJustInTimeFlashErase is selected to just erase the pages
+ * of flash that code is written too; thus leaving all other flash pages untouched.
+ *
+ * If _imageLinkerSpecifiedFlashErase set, then the range
+ * starting from _ebase_address for _IMAGE_FLASH_SIZE bytes are erased.
+ *
+ * If _imageFullFlashErase is specified, than the whole flash
+ * as known by the bootloader will be erased. This will erase eeprom as well
+ *
+ * if _imageFullFlashEraseLess4KEEProm is set, all of flash less the last 4K is
+ * erased, this is the old default. This bit could be set to make a program flash bootloader
+ * erasing everything but the old flash. If NOTHING is set, this will be the default as this is the old behavior.
+ *
+ * _JUMP_ADDR
+ *
+ * This is the address that the bootloader will jump to start execution
+ * of the sketch. This is almost always _RESET_ADDR.
+ *
+ * However, you can specify an alternate entry execution point for example
+ * if you have alternate starup code that, say, shared
+ * the runtime with other sketches or needed some kind of specific handling
+ *
+ * Immediately after programming (avrdude upload) the bootloader will typically
+ * jump to the just loaded sketch, no matter where it was loaded in flash.
+ * _imageExecutionJumpToFirstInFlash will tell the bootloader to jump to the first
+ * sketch in flash even if the just loaded one is not at the beginning of flash.
+ * This is useful when programming sketches in slots of flash and then always
+ * jumping to the program-flash loader (vector sketch) as if the board was just reset.
+ * This bit does not effect jumping to a sketch already in flash after reset.
+ * As of today, after reset, the first program in flash will always be jumped to.
+ *
+ *************************************************************************/
+ _IMAGE_TYPE = _imageMPIDE | _imageJustInTimeFlashErase | _imageExecutionJumpAddress;
+ _IMAGE_FLASH_SIZE = LENGTH(exception_mem) + LENGTH(kseg0_program_mem);
+_JUMP_ADDR = _RESET_ADDR;
+
+SECTIONS
+{
+ /* Boot Sections */
+ .reset _RESET_ADDR :
+ {
+ KEEP(*(.reset))
+ } > kseg0_program_mem
+}
+
+/* From here out every linker script is the same, so just include it */
+INCLUDE "./hardware/pic32/cores/pic32/chipKIT-application-COMMON.ld"
View
134 hardware/pic32/cores/pic32/chipKIT-application-32MX320F128.ld
@@ -0,0 +1,134 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-tradlittlemips")
+OUTPUT_ARCH(pic32mx)
+ENTRY(_reset)
+/*
+ * Provide for a minimum stack and heap size
+ * - _min_stack_size - represents the minimum space that must be made
+ * available for the stack. Can be overridden from
+ * the command line using the linker's --defsym option.
+ * - _min_heap_size - represents the minimum space that must be made
+ * available for the heap. Can be overridden from
+ * the command line using the linker's --defsym option.
+ */
+EXTERN (_min_stack_size _min_heap_size)
+PROVIDE(_min_stack_size = 0x800) ;
+PROVIDE(_min_heap_size = 0x800) ;
+
+/*************************************************************************
+ * Processor-specific object file. Contains SFR definitions.
+ *************************************************************************/
+INPUT("processor.o")
+
+/*************************************************************************
+ * Memory Regions
+ *
+ * Memory regions without attributes cannot be used for orphaned sections.
+ * Only sections specifically assigned to these regions can be allocated
+ * into these regions.
+ *************************************************************************/
+MEMORY
+{
+ exception_mem : ORIGIN = 0x9D000000, LENGTH = 0x1000
+ kseg0_program_mem (rx) : ORIGIN = 0x9D001000, LENGTH = 0x1E000
+ kseg0_eeprom_mem : ORIGIN = 0x9D01F000, LENGTH = 0x1000
+ kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0
+ kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
+ debug_exec_mem : ORIGIN = 0xBFC02000, LENGTH = 0
+ config3 : ORIGIN = 0xBFC02FF0, LENGTH = 4
+ config2 : ORIGIN = 0xBFC02FF4, LENGTH = 4
+ config1 : ORIGIN = 0xBFC02FF8, LENGTH = 4
+ config0 : ORIGIN = 0xBFC02FFC, LENGTH = 4
+ kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x4000
+ sfrs : ORIGIN = 0xBF800000, LENGTH = 0x100000
+ configsfrs : ORIGIN = 0xBFC02FF0, LENGTH = 0x10
+}
+
+/*************************************************************************
+ * Memory Address Equates
+ *************************************************************************/
+_ebase_address = ORIGIN(exception_mem);
+_IMAGE_PTR_TABLE = _ebase_address + 0x0F8;
+_IMAGE_HEADER_ADDR = _ebase_address + 0x0FC;
+_GEN_EXCPT_ADDR = _ebase_address + 0x180;
+_RESET_ADDR = ORIGIN(kseg0_program_mem);
+_EEPROM_ADDR = ORIGIN(kseg0_eeprom_mem);
+_BEV_EXCPT_ADDR = 0xBFC00380;
+_DBG_EXCPT_ADDR = 0xBFC00480;
+_DBG_CODE_ADDR = ORIGIN(debug_exec_mem);
+
+/*************************************************************************
+ * Bootloader program directives.
+ *
+ * _IMAGE_TYPE
+ *
+ * image type:
+ */
+
+_imageReserved = 0x00000000 ;
+_imageMPIDE = 0x00000001 ; /* This is a normal MPIDE sketch */
+_imageBootFlashBootloader = 0x00000002 ; /* This is a boot flash bootloader */
+_imageProgramFlashBootloader = 0x00000004 ; /* This is a program flash bootloader */
+_imageSplitFlashBootloader = 0x00000008 ; /* This has bootloader code in both boot and program flash */
+
+ /*
+ * Instructions for the bootloader
+ */
+
+_imageFullFlashEraseLess4KEEProm = 0x00010000 ; /* The original bootloader method of erasing all of program flash except the last 4K reserved for eeprom */
+_imageJustInTimeFlashErase = 0x00020000 ; /* Only flash pages written too needed by the sketch is erased */
+_imageLinkerSpecifiedFlashErase = 0x00040000 ; /* The linker defines the flash range to erase */
+_imageFullFlashErase = 0x00080000 ; /* All of flash is erased */
+_imageExecutionJumpAddress = 0x01000000 ; /* the bootloader will jump to the execution jump address immediately after programming */
+_imageExecutionJumpToFirstInFlash = 0x02000000 ; /* the bootloader will jump to the first sketch loaded in flash ignoring the execution jump address immediately after programming */
+
+/*
+ * _IMAGE_FLASH_SIZE
+ *
+ * Typically _imageJustInTimeFlashErase is selected to just erase the pages
+ * of flash that code is written too; thus leaving all other flash pages untouched.
+ *
+ * If _imageLinkerSpecifiedFlashErase set, then the range
+ * starting from _ebase_address for _IMAGE_FLASH_SIZE bytes are erased.
+ *
+ * If _imageFullFlashErase is specified, than the whole flash
+ * as known by the bootloader will be erased. This will erase eeprom as well
+ *
+ * if _imageFullFlashEraseLess4KEEProm is set, all of flash less the last 4K is
+ * erased, this is the old default. This bit could be set to make a program flash bootloader
+ * erasing everything but the old flash. If NOTHING is set, this will be the default as this is the old behavior.
+ *
+ * _JUMP_ADDR
+ *
+ * This is the address that the bootloader will jump to start execution
+ * of the sketch. This is almost always _RESET_ADDR.
+ *
+ * However, you can specify an alternate entry execution point for example
+ * if you have alternate starup code that, say, shared
+ * the runtime with other sketches or needed some kind of specific handling
+ *
+ * Immediately after programming (avrdude upload) the bootloader will typically
+ * jump to the just loaded sketch, no matter where it was loaded in flash.
+ * _imageExecutionJumpToFirstInFlash will tell the bootloader to jump to the first
+ * sketch in flash even if the just loaded one is not at the beginning of flash.
+ * This is useful when programming sketches in slots of flash and then always
+ * jumping to the program-flash loader (vector sketch) as if the board was just reset.
+ * This bit does not effect jumping to a sketch already in flash after reset.
+ * As of today, after reset, the first program in flash will always be jumped to.
+ *
+ *************************************************************************/
+ _IMAGE_TYPE = _imageMPIDE | _imageJustInTimeFlashErase | _imageExecutionJumpAddress;
+ _IMAGE_FLASH_SIZE = LENGTH(exception_mem) + LENGTH(kseg0_program_mem);
+_JUMP_ADDR = _RESET_ADDR;
+
+SECTIONS
+{
+ /* Boot Sections */
+ .reset _RESET_ADDR :
+ {
+ KEEP(*(.reset))
+ } > kseg0_program_mem
+}
+
+/* From here out every linker script is the same, so just include it */
+INCLUDE "./hardware/pic32/cores/pic32/chipKIT-application-COMMON.ld"
View
134 hardware/pic32/cores/pic32/chipKIT-application-32MX340F512.ld
@@ -0,0 +1,134 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-tradlittlemips")
+OUTPUT_ARCH(pic32mx)
+ENTRY(_reset)
+/*
+ * Provide for a minimum stack and heap size
+ * - _min_stack_size - represents the minimum space that must be made
+ * available for the stack. Can be overridden from
+ * the command line using the linker's --defsym option.
+ * - _min_heap_size - represents the minimum space that must be made
+ * available for the heap. Can be overridden from
+ * the command line using the linker's --defsym option.
+ */
+EXTERN (_min_stack_size _min_heap_size)
+PROVIDE(_min_stack_size = 0x800) ;
+PROVIDE(_min_heap_size = 0x800) ;
+
+/*************************************************************************
+ * Processor-specific object file. Contains SFR definitions.
+ *************************************************************************/
+INPUT("processor.o")
+
+/*************************************************************************
+ * Memory Regions
+ *
+ * Memory regions without attributes cannot be used for orphaned sections.
+ * Only sections specifically assigned to these regions can be allocated
+ * into these regions.
+ *************************************************************************/
+MEMORY
+{
+ exception_mem : ORIGIN = 0x9D000000, LENGTH = 0x1000
+ kseg0_program_mem (rx) : ORIGIN = 0x9D001000, LENGTH = 0x7E000
+ kseg0_eeprom_mem : ORIGIN = 0x9D07F000, LENGTH = 0x1000
+ kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0
+ kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
+ debug_exec_mem : ORIGIN = 0xBFC02000, LENGTH = 0
+ config3 : ORIGIN = 0xBFC02FF0, LENGTH = 4
+ config2 : ORIGIN = 0xBFC02FF4, LENGTH = 4
+ config1 : ORIGIN = 0xBFC02FF8, LENGTH = 4
+ config0 : ORIGIN = 0xBFC02FFC, LENGTH = 4
+ kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x8000
+ sfrs : ORIGIN = 0xBF800000, LENGTH = 0x100000
+ configsfrs : ORIGIN = 0xBFC02FF0, LENGTH = 0x10
+}
+
+/*************************************************************************
+ * Memory Address Equates
+ *************************************************************************/
+_ebase_address = ORIGIN(exception_mem);
+_IMAGE_PTR_TABLE = _ebase_address + 0x0F8;
+_IMAGE_HEADER_ADDR = _ebase_address + 0x0FC;
+_GEN_EXCPT_ADDR = _ebase_address + 0x180;
+_RESET_ADDR = ORIGIN(kseg0_program_mem);
+_EEPROM_ADDR = ORIGIN(kseg0_eeprom_mem);
+_BEV_EXCPT_ADDR = 0xBFC00380;
+_DBG_EXCPT_ADDR = 0xBFC00480;
+_DBG_CODE_ADDR = ORIGIN(debug_exec_mem);
+
+/*************************************************************************
+ * Bootloader program directives.
+ *
+ * _IMAGE_TYPE
+ *
+ * image type:
+ */
+
+_imageReserved = 0x00000000 ;
+_imageMPIDE = 0x00000001 ; /* This is a normal MPIDE sketch */
+_imageBootFlashBootloader = 0x00000002 ; /* This is a boot flash bootloader */
+_imageProgramFlashBootloader = 0x00000004 ; /* This is a program flash bootloader */
+_imageSplitFlashBootloader = 0x00000008 ; /* This has bootloader code in both boot and program flash */
+
+ /*
+ * Instructions for the bootloader
+ */
+
+_imageFullFlashEraseLess4KEEProm = 0x00010000 ; /* The original bootloader method of erasing all of program flash except the last 4K reserved for eeprom */
+_imageJustInTimeFlashErase = 0x00020000 ; /* Only flash pages written too needed by the sketch is erased */
+_imageLinkerSpecifiedFlashErase = 0x00040000 ; /* The linker defines the flash range to erase */
+_imageFullFlashErase = 0x00080000 ; /* All of flash is erased */
+_imageExecutionJumpAddress = 0x01000000 ; /* the bootloader will jump to the execution jump address immediately after programming */
+_imageExecutionJumpToFirstInFlash = 0x02000000 ; /* the bootloader will jump to the first sketch loaded in flash ignoring the execution jump address immediately after programming */
+
+/*
+ * _IMAGE_FLASH_SIZE
+ *
+ * Typically _imageJustInTimeFlashErase is selected to just erase the pages
+ * of flash that code is written too; thus leaving all other flash pages untouched.
+ *
+ * If _imageLinkerSpecifiedFlashErase set, then the range
+ * starting from _ebase_address for _IMAGE_FLASH_SIZE bytes are erased.
+ *
+ * If _imageFullFlashErase is specified, than the whole flash
+ * as known by the bootloader will be erased. This will erase eeprom as well
+ *
+ * if _imageFullFlashEraseLess4KEEProm is set, all of flash less the last 4K is
+ * erased, this is the old default. This bit could be set to make a program flash bootloader
+ * erasing everything but the old flash. If NOTHING is set, this will be the default as this is the old behavior.
+ *
+ * _JUMP_ADDR
+ *
+ * This is the address that the bootloader will jump to start execution
+ * of the sketch. This is almost always _RESET_ADDR.
+ *
+ * However, you can specify an alternate entry execution point for example
+ * if you have alternate starup code that, say, shared
+ * the runtime with other sketches or needed some kind of specific handling
+ *
+ * Immediately after programming (avrdude upload) the bootloader will typically
+ * jump to the just loaded sketch, no matter where it was loaded in flash.
+ * _imageExecutionJumpToFirstInFlash will tell the bootloader to jump to the first
+ * sketch in flash even if the just loaded one is not at the beginning of flash.
+ * This is useful when programming sketches in slots of flash and then always
+ * jumping to the program-flash loader (vector sketch) as if the board was just reset.
+ * This bit does not effect jumping to a sketch already in flash after reset.
+ * As of today, after reset, the first program in flash will always be jumped to.
+ *
+ *************************************************************************/
+ _IMAGE_TYPE = _imageMPIDE | _imageJustInTimeFlashErase | _imageExecutionJumpAddress;
+ _IMAGE_FLASH_SIZE = LENGTH(exception_mem) + LENGTH(kseg0_program_mem);
+_JUMP_ADDR = _RESET_ADDR;
+
+SECTIONS
+{
+ /* Boot Sections */
+ .reset _RESET_ADDR :
+ {
+ KEEP(*(.reset))
+ } > kseg0_program_mem
+}
+
+/* From here out every linker script is the same, so just include it */
+INCLUDE "./hardware/pic32/cores/pic32/chipKIT-application-COMMON.ld"
View
134 hardware/pic32/cores/pic32/chipKIT-application-32MX360F512.ld
@@ -0,0 +1,134 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-tradlittlemips")
+OUTPUT_ARCH(pic32mx)
+ENTRY(_reset)
+/*
+ * Provide for a minimum stack and heap size
+ * - _min_stack_size - represents the minimum space that must be made
+ * available for the stack. Can be overridden from
+ * the command line using the linker's --defsym option.
+ * - _min_heap_size - represents the minimum space that must be made
+ * available for the heap. Can be overridden from
+ * the command line using the linker's --defsym option.
+ */
+EXTERN (_min_stack_size _min_heap_size)
+PROVIDE(_min_stack_size = 0x800) ;
+PROVIDE(_min_heap_size = 0x800) ;
+
+/*************************************************************************
+ * Processor-specific object file. Contains SFR definitions.
+ *************************************************************************/
+INPUT("processor.o")
+
+/*************************************************************************
+ * Memory Regions
+ *
+ * Memory regions without attributes cannot be used for orphaned sections.
+ * Only sections specifically assigned to these regions can be allocated
+ * into these regions.
+ *************************************************************************/
+MEMORY
+{
+ exception_mem : ORIGIN = 0x9D000000, LENGTH = 0x1000
+ kseg0_program_mem (rx) : ORIGIN = 0x9D001000, LENGTH = 0x7E000
+ kseg0_eeprom_mem : ORIGIN = 0x9D07F000, LENGTH = 0x1000
+ kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0
+ kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
+ debug_exec_mem : ORIGIN = 0xBFC02000, LENGTH = 0
+ config3 : ORIGIN = 0xBFC02FF0, LENGTH = 4
+ config2 : ORIGIN = 0xBFC02FF4, LENGTH = 4
+ config1 : ORIGIN = 0xBFC02FF8, LENGTH = 4
+ config0 : ORIGIN = 0xBFC02FFC, LENGTH = 4
+ kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x8000
+ sfrs : ORIGIN = 0xBF800000, LENGTH = 0x100000
+ configsfrs : ORIGIN = 0xBFC02FF0, LENGTH = 0x10
+}
+
+/*************************************************************************
+ * Memory Address Equates
+ *************************************************************************/
+_ebase_address = ORIGIN(exception_mem);
+_IMAGE_PTR_TABLE = _ebase_address + 0x0F8;
+_IMAGE_HEADER_ADDR = _ebase_address + 0x0FC;
+_GEN_EXCPT_ADDR = _ebase_address + 0x180;
+_RESET_ADDR = ORIGIN(kseg0_program_mem);
+_EEPROM_ADDR = ORIGIN(kseg0_eeprom_mem);
+_BEV_EXCPT_ADDR = 0xBFC00380;
+_DBG_EXCPT_ADDR = 0xBFC00480;
+_DBG_CODE_ADDR = ORIGIN(debug_exec_mem);
+
+/*************************************************************************
+ * Bootloader program directives.
+ *
+ * _IMAGE_TYPE
+ *
+ * image type:
+ */
+
+_imageReserved = 0x00000000 ;
+_imageMPIDE = 0x00000001 ; /* This is a normal MPIDE sketch */
+_imageBootFlashBootloader = 0x00000002 ; /* This is a boot flash bootloader */
+_imageProgramFlashBootloader = 0x00000004 ; /* This is a program flash bootloader */
+_imageSplitFlashBootloader = 0x00000008 ; /* This has bootloader code in both boot and program flash */
+
+ /*
+ * Instructions for the bootloader
+ */
+
+_imageFullFlashEraseLess4KEEProm = 0x00010000 ; /* The original bootloader method of erasing all of program flash except the last 4K reserved for eeprom */
+_imageJustInTimeFlashErase = 0x00020000 ; /* Only flash pages written too needed by the sketch is erased */
+_imageLinkerSpecifiedFlashErase = 0x00040000 ; /* The linker defines the flash range to erase */
+_imageFullFlashErase = 0x00080000 ; /* All of flash is erased */
+_imageExecutionJumpAddress = 0x01000000 ; /* the bootloader will jump to the execution jump address immediately after programming */
+_imageExecutionJumpToFirstInFlash = 0x02000000 ; /* the bootloader will jump to the first sketch loaded in flash ignoring the execution jump address immediately after programming */
+
+/*
+ * _IMAGE_FLASH_SIZE
+ *
+ * Typically _imageJustInTimeFlashErase is selected to just erase the pages
+ * of flash that code is written too; thus leaving all other flash pages untouched.
+ *
+ * If _imageLinkerSpecifiedFlashErase set, then the range
+ * starting from _ebase_address for _IMAGE_FLASH_SIZE bytes are erased.
+ *
+ * If _imageFullFlashErase is specified, than the whole flash
+ * as known by the bootloader will be erased. This will erase eeprom as well
+ *
+ * if _imageFullFlashEraseLess4KEEProm is set, all of flash less the last 4K is
+ * erased, this is the old default. This bit could be set to make a program flash bootloader
+ * erasing everything but the old flash. If NOTHING is set, this will be the default as this is the old behavior.
+ *
+ * _JUMP_ADDR
+ *
+ * This is the address that the bootloader will jump to start execution
+ * of the sketch. This is almost always _RESET_ADDR.
+ *
+ * However, you can specify an alternate entry execution point for example
+ * if you have alternate starup code that, say, shared
+ * the runtime with other sketches or needed some kind of specific handling
+ *
+ * Immediately after programming (avrdude upload) the bootloader will typically
+ * jump to the just loaded sketch, no matter where it was loaded in flash.
+ * _imageExecutionJumpToFirstInFlash will tell the bootloader to jump to the first
+ * sketch in flash even if the just loaded one is not at the beginning of flash.
+ * This is useful when programming sketches in slots of flash and then always
+ * jumping to the program-flash loader (vector sketch) as if the board was just reset.
+ * This bit does not effect jumping to a sketch already in flash after reset.
+ * As of today, after reset, the first program in flash will always be jumped to.
+ *
+ *************************************************************************/
+ _IMAGE_TYPE = _imageMPIDE | _imageJustInTimeFlashErase | _imageExecutionJumpAddress;
+ _IMAGE_FLASH_SIZE = LENGTH(exception_mem) + LENGTH(kseg0_program_mem);
+_JUMP_ADDR = _RESET_ADDR;
+
+SECTIONS
+{
+ /* Boot Sections */
+ .reset _RESET_ADDR :
+ {
+ KEEP(*(.reset))
+ } > kseg0_program_mem
+}
+
+/* From here out every linker script is the same, so just include it */
+INCLUDE "./hardware/pic32/cores/pic32/chipKIT-application-COMMON.ld"
View
134 hardware/pic32/cores/pic32/chipKIT-application-32MX440F128.ld
@@ -0,0 +1,134 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-tradlittlemips")
+OUTPUT_ARCH(pic32mx)
+ENTRY(_reset)
+/*
+ * Provide for a minimum stack and heap size
+ * - _min_stack_size - represents the minimum space that must be made
+ * available for the stack. Can be overridden from
+ * the command line using the linker's --defsym option.
+ * - _min_heap_size - represents the minimum space that must be made
+ * available for the heap. Can be overridden from
+ * the command line using the linker's --defsym option.
+ */
+EXTERN (_min_stack_size _min_heap_size)
+PROVIDE(_min_stack_size = 0x800) ;
+PROVIDE(_min_heap_size = 0x800) ;
+
+/*************************************************************************
+ * Processor-specific object file. Contains SFR definitions.
+ *************************************************************************/
+INPUT("processor.o")
+
+/*************************************************************************
+ * Memory Regions
+ *
+ * Memory regions without attributes cannot be used for orphaned sections.
+ * Only sections specifically assigned to these regions can be allocated
+ * into these regions.
+ *************************************************************************/
+MEMORY
+{
+ exception_mem : ORIGIN = 0x9D000000, LENGTH = 0x1000
+ kseg0_program_mem (rx) : ORIGIN = 0x9D001000, LENGTH = 0x1E000
+ kseg0_eeprom_mem : ORIGIN = 0x9D01F000, LENGTH = 0x1000
+ kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0
+ kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
+ debug_exec_mem : ORIGIN = 0xBFC02000, LENGTH = 0
+ config3 : ORIGIN = 0xBFC02FF0, LENGTH = 4
+ config2 : ORIGIN = 0xBFC02FF4, LENGTH = 4
+ config1 : ORIGIN = 0xBFC02FF8, LENGTH = 4
+ config0 : ORIGIN = 0xBFC02FFC, LENGTH = 4
+ kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x8000
+ sfrs : ORIGIN = 0xBF800000, LENGTH = 0x100000
+ configsfrs : ORIGIN = 0xBFC02FF0, LENGTH = 0x10
+}
+
+/*************************************************************************
+ * Memory Address Equates
+ *************************************************************************/
+_ebase_address = ORIGIN(exception_mem);
+_IMAGE_PTR_TABLE = _ebase_address + 0x0F8;
+_IMAGE_HEADER_ADDR = _ebase_address + 0x0FC;
+_GEN_EXCPT_ADDR = _ebase_address + 0x180;
+_RESET_ADDR = ORIGIN(kseg0_program_mem);
+_EEPROM_ADDR = ORIGIN(kseg0_eeprom_mem);
+_BEV_EXCPT_ADDR = 0xBFC00380;
+_DBG_EXCPT_ADDR = 0xBFC00480;
+_DBG_CODE_ADDR = ORIGIN(debug_exec_mem);
+
+/*************************************************************************
+ * Bootloader program directives.
+ *
+ * _IMAGE_TYPE
+ *
+ * image type:
+ */
+
+_imageReserved = 0x00000000 ;
+_imageMPIDE = 0x00000001 ; /* This is a normal MPIDE sketch */
+_imageBootFlashBootloader = 0x00000002 ; /* This is a boot flash bootloader */
+_imageProgramFlashBootloader = 0x00000004 ; /* This is a program flash bootloader */
+_imageSplitFlashBootloader = 0x00000008 ; /* This has bootloader code in both boot and program flash */
+
+ /*
+ * Instructions for the bootloader
+ */
+
+_imageFullFlashEraseLess4KEEProm = 0x00010000 ; /* The original bootloader method of erasing all of program flash except the last 4K reserved for eeprom */
+_imageJustInTimeFlashErase = 0x00020000 ; /* Only flash pages written too needed by the sketch is erased */
+_imageLinkerSpecifiedFlashErase = 0x00040000 ; /* The linker defines the flash range to erase */
+_imageFullFlashErase = 0x00080000 ; /* All of flash is erased */
+_imageExecutionJumpAddress = 0x01000000 ; /* the bootloader will jump to the execution jump address immediately after programming */
+_imageExecutionJumpToFirstInFlash = 0x02000000 ; /* the bootloader will jump to the first sketch loaded in flash ignoring the execution jump address immediately after programming */
+
+/*
+ * _IMAGE_FLASH_SIZE
+ *
+ * Typically _imageJustInTimeFlashErase is selected to just erase the pages
+ * of flash that code is written too; thus leaving all other flash pages untouched.
+ *
+ * If _imageLinkerSpecifiedFlashErase set, then the range
+ * starting from _ebase_address for _IMAGE_FLASH_SIZE bytes are erased.
+ *
+ * If _imageFullFlashErase is specified, than the whole flash
+ * as known by the bootloader will be erased. This will erase eeprom as well
+ *
+ * if _imageFullFlashEraseLess4KEEProm is set, all of flash less the last 4K is
+ * erased, this is the old default. This bit could be set to make a program flash bootloader
+ * erasing everything but the old flash. If NOTHING is set, this will be the default as this is the old behavior.
+ *
+ * _JUMP_ADDR
+ *
+ * This is the address that the bootloader will jump to start execution
+ * of the sketch. This is almost always _RESET_ADDR.
+ *
+ * However, you can specify an alternate entry execution point for example
+ * if you have alternate starup code that, say, shared
+ * the runtime with other sketches or needed some kind of specific handling
+ *
+ * Immediately after programming (avrdude upload) the bootloader will typically
+ * jump to the just loaded sketch, no matter where it was loaded in flash.
+ * _imageExecutionJumpToFirstInFlash will tell the bootloader to jump to the first
+ * sketch in flash even if the just loaded one is not at the beginning of flash.
+ * This is useful when programming sketches in slots of flash and then always
+ * jumping to the program-flash loader (vector sketch) as if the board was just reset.
+ * This bit does not effect jumping to a sketch already in flash after reset.
+ * As of today, after reset, the first program in flash will always be jumped to.
+ *
+ *************************************************************************/
+ _IMAGE_TYPE = _imageMPIDE | _imageJustInTimeFlashErase | _imageExecutionJumpAddress;
+ _IMAGE_FLASH_SIZE = LENGTH(exception_mem) + LENGTH(kseg0_program_mem);
+_JUMP_ADDR = _RESET_ADDR;
+
+SECTIONS
+{
+ /* Boot Sections */
+ .reset _RESET_ADDR :
+ {
+ KEEP(*(.reset))
+ } > kseg0_program_mem
+}
+
+/* From here out every linker script is the same, so just include it */
+INCLUDE "./hardware/pic32/cores/pic32/chipKIT-application-COMMON.ld"
View
134 hardware/pic32/cores/pic32/chipKIT-application-32MX440F256.ld
@@ -0,0 +1,134 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-tradlittlemips")
+OUTPUT_ARCH(pic32mx)
+ENTRY(_reset)
+/*
+ * Provide for a minimum stack and heap size
+ * - _min_stack_size - represents the minimum space that must be made
+ * available for the stack. Can be overridden from
+ * the command line using the linker's --defsym option.
+ * - _min_heap_size - represents the minimum space that must be made
+ * available for the heap. Can be overridden from
+ * the command line using the linker's --defsym option.
+ */
+EXTERN (_min_stack_size _min_heap_size)
+PROVIDE(_min_stack_size = 0x800) ;
+PROVIDE(_min_heap_size = 0x800) ;
+
+/*************************************************************************
+ * Processor-specific object file. Contains SFR definitions.
+ *************************************************************************/
+INPUT("processor.o")
+
+/*************************************************************************
+ * Memory Regions
+ *
+ * Memory regions without attributes cannot be used for orphaned sections.
+ * Only sections specifically assigned to these regions can be allocated
+ * into these regions.
+ *************************************************************************/
+MEMORY
+{
+ exception_mem : ORIGIN = 0x9D000000, LENGTH = 0x1000
+ kseg0_program_mem (rx) : ORIGIN = 0x9D001000, LENGTH = 0x3E000
+ kseg0_eeprom_mem : ORIGIN = 0x9D03F000, LENGTH = 0x1000
+ kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0
+ kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
+ debug_exec_mem : ORIGIN = 0xBFC02000, LENGTH = 0
+ config3 : ORIGIN = 0xBFC02FF0, LENGTH = 4
+ config2 : ORIGIN = 0xBFC02FF4, LENGTH = 4
+ config1 : ORIGIN = 0xBFC02FF8, LENGTH = 4
+ config0 : ORIGIN = 0xBFC02FFC, LENGTH = 4
+ kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x8000
+ sfrs : ORIGIN = 0xBF800000, LENGTH = 0x100000
+ configsfrs : ORIGIN = 0xBFC02FF0, LENGTH = 0x10
+}
+
+/*************************************************************************
+ * Memory Address Equates
+ *************************************************************************/
+_ebase_address = ORIGIN(exception_mem);
+_IMAGE_PTR_TABLE = _ebase_address + 0x0F8;
+_IMAGE_HEADER_ADDR = _ebase_address + 0x0FC;
+_GEN_EXCPT_ADDR = _ebase_address + 0x180;
+_RESET_ADDR = ORIGIN(kseg0_program_mem);
+_EEPROM_ADDR = ORIGIN(kseg0_eeprom_mem);
+_BEV_EXCPT_ADDR = 0xBFC00380;
+_DBG_EXCPT_ADDR = 0xBFC00480;
+_DBG_CODE_ADDR = ORIGIN(debug_exec_mem);
+
+/*************************************************************************
+ * Bootloader program directives.
+ *
+ * _IMAGE_TYPE
+ *
+ * image type:
+ */
+
+_imageReserved = 0x00000000 ;
+_imageMPIDE = 0x00000001 ; /* This is a normal MPIDE sketch */
+_imageBootFlashBootloader = 0x00000002 ; /* This is a boot flash bootloader */
+_imageProgramFlashBootloader = 0x00000004 ; /* This is a program flash bootloader */
+_imageSplitFlashBootloader = 0x00000008 ; /* This has bootloader code in both boot and program flash */
+
+ /*
+ * Instructions for the bootloader
+ */
+
+_imageFullFlashEraseLess4KEEProm = 0x00010000 ; /* The original bootloader method of erasing all of program flash except the last 4K reserved for eeprom */
+_imageJustInTimeFlashErase = 0x00020000 ; /* Only flash pages written too needed by the sketch is erased */
+_imageLinkerSpecifiedFlashErase = 0x00040000 ; /* The linker defines the flash range to erase */
+_imageFullFlashErase = 0x00080000 ; /* All of flash is erased */
+_imageExecutionJumpAddress = 0x01000000 ; /* the bootloader will jump to the execution jump address immediately after programming */
+_imageExecutionJumpToFirstInFlash = 0x02000000 ; /* the bootloader will jump to the first sketch loaded in flash ignoring the execution jump address immediately after programming */
+
+/*
+ * _IMAGE_FLASH_SIZE
+ *
+ * Typically _imageJustInTimeFlashErase is selected to just erase the pages
+ * of flash that code is written too; thus leaving all other flash pages untouched.
+ *
+ * If _imageLinkerSpecifiedFlashErase set, then the range
+ * starting from _ebase_address for _IMAGE_FLASH_SIZE bytes are erased.
+ *
+ * If _imageFullFlashErase is specified, than the whole flash
+ * as known by the bootloader will be erased. This will erase eeprom as well
+ *
+ * if _imageFullFlashEraseLess4KEEProm is set, all of flash less the last 4K is
+ * erased, this is the old default. This bit could be set to make a program flash bootloader
+ * erasing everything but the old flash. If NOTHING is set, this will be the default as this is the old behavior.
+ *
+ * _JUMP_ADDR
+ *
+ * This is the address that the bootloader will jump to start execution
+ * of the sketch. This is almost always _RESET_ADDR.
+ *
+ * However, you can specify an alternate entry execution point for example
+ * if you have alternate starup code that, say, shared
+ * the runtime with other sketches or needed some kind of specific handling
+ *
+ * Immediately after programming (avrdude upload) the bootloader will typically
+ * jump to the just loaded sketch, no matter where it was loaded in flash.
+ * _imageExecutionJumpToFirstInFlash will tell the bootloader to jump to the first
+ * sketch in flash even if the just loaded one is not at the beginning of flash.
+ * This is useful when programming sketches in slots of flash and then always
+ * jumping to the program-flash loader (vector sketch) as if the board was just reset.
+ * This bit does not effect jumping to a sketch already in flash after reset.
+ * As of today, after reset, the first program in flash will always be jumped to.
+ *
+ *************************************************************************/
+ _IMAGE_TYPE = _imageMPIDE | _imageJustInTimeFlashErase | _imageExecutionJumpAddress;
+ _IMAGE_FLASH_SIZE = LENGTH(exception_mem) + LENGTH(kseg0_program_mem);
+_JUMP_ADDR = _RESET_ADDR;
+
+SECTIONS
+{
+ /* Boot Sections */
+ .reset _RESET_ADDR :
+ {
+ KEEP(*(.reset))
+ } > kseg0_program_mem
+}
+
+/* From here out every linker script is the same, so just include it */
+INCLUDE "./hardware/pic32/cores/pic32/chipKIT-application-COMMON.ld"
View
134 hardware/pic32/cores/pic32/chipKIT-application-32MX440F512.ld
@@ -0,0 +1,134 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-tradlittlemips")
+OUTPUT_ARCH(pic32mx)
+ENTRY(_reset)
+/*
+ * Provide for a minimum stack and heap size
+ * - _min_stack_size - represents the minimum space that must be made
+ * available for the stack. Can be overridden from
+ * the command line using the linker's --defsym option.
+ * - _min_heap_size - represents the minimum space that must be made
+ * available for the heap. Can be overridden from
+ * the command line using the linker's --defsym option.
+ */
+EXTERN (_min_stack_size _min_heap_size)
+PROVIDE(_min_stack_size = 0x800) ;
+PROVIDE(_min_heap_size = 0x800) ;
+
+/*************************************************************************
+ * Processor-specific object file. Contains SFR definitions.
+ *************************************************************************/
+INPUT("processor.o")
+
+/*************************************************************************
+ * Memory Regions
+ *
+ * Memory regions without attributes cannot be used for orphaned sections.
+ * Only sections specifically assigned to these regions can be allocated
+ * into these regions.
+ *************************************************************************/
+MEMORY
+{
+ exception_mem : ORIGIN = 0x9D000000, LENGTH = 0x1000
+ kseg0_program_mem (rx) : ORIGIN = 0x9D001000, LENGTH = 0x7E000
+ kseg0_eeprom_mem : ORIGIN = 0x9D07F000, LENGTH = 0x1000
+ kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0
+ kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
+ debug_exec_mem : ORIGIN = 0xBFC02000, LENGTH = 0
+ config3 : ORIGIN = 0xBFC02FF0, LENGTH = 4
+ config2 : ORIGIN = 0xBFC02FF4, LENGTH = 4
+ config1 : ORIGIN = 0xBFC02FF8, LENGTH = 4
+ config0 : ORIGIN = 0xBFC02FFC, LENGTH = 4
+ kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x8000
+ sfrs : ORIGIN = 0xBF800000, LENGTH = 0x100000
+ configsfrs : ORIGIN = 0xBFC02FF0, LENGTH = 0x10
+}
+
+/*************************************************************************
+ * Memory Address Equates
+ *************************************************************************/
+_ebase_address = ORIGIN(exception_mem);
+_IMAGE_PTR_TABLE = _ebase_address + 0x0F8;
+_IMAGE_HEADER_ADDR = _ebase_address + 0x0FC;
+_GEN_EXCPT_ADDR = _ebase_address + 0x180;
+_RESET_ADDR = ORIGIN(kseg0_program_mem);
+_EEPROM_ADDR = ORIGIN(kseg0_eeprom_mem);
+_BEV_EXCPT_ADDR = 0xBFC00380;
+_DBG_EXCPT_ADDR = 0xBFC00480;
+_DBG_CODE_ADDR = ORIGIN(debug_exec_mem);
+
+/*************************************************************************
+ * Bootloader program directives.
+ *
+ * _IMAGE_TYPE
+ *
+ * image type:
+ */
+
+_imageReserved = 0x00000000 ;
+_imageMPIDE = 0x00000001 ; /* This is a normal MPIDE sketch */
+_imageBootFlashBootloader = 0x00000002 ; /* This is a boot flash bootloader */
+_imageProgramFlashBootloader = 0x00000004 ; /* This is a program flash bootloader */
+_imageSplitFlashBootloader = 0x00000008 ; /* This has bootloader code in both boot and program flash */
+
+ /*
+ * Instructions for the bootloader
+ */
+
+_imageFullFlashEraseLess4KEEProm = 0x00010000 ; /* The original bootloader method of erasing all of program flash except the last 4K reserved for eeprom */
+_imageJustInTimeFlashErase = 0x00020000 ; /* Only flash pages written too needed by the sketch is erased */
+_imageLinkerSpecifiedFlashErase = 0x00040000 ; /* The linker defines the flash range to erase */
+_imageFullFlashErase = 0x00080000 ; /* All of flash is erased */
+_imageExecutionJumpAddress = 0x01000000 ; /* the bootloader will jump to the execution jump address immediately after programming */
+_imageExecutionJumpToFirstInFlash = 0x02000000 ; /* the bootloader will jump to the first sketch loaded in flash ignoring the execution jump address immediately after programming */
+
+/*
+ * _IMAGE_FLASH_SIZE
+ *
+ * Typically _imageJustInTimeFlashErase is selected to just erase the pages
+ * of flash that code is written too; thus leaving all other flash pages untouched.
+ *
+ * If _imageLinkerSpecifiedFlashErase set, then the range
+ * starting from _ebase_address for _IMAGE_FLASH_SIZE bytes are erased.
+ *
+ * If _imageFullFlashErase is specified, than the whole flash
+ * as known by the bootloader will be erased. This will erase eeprom as well
+ *
+ * if _imageFullFlashEraseLess4KEEProm is set, all of flash less the last 4K is
+ * erased, this is the old default. This bit could be set to make a program flash bootloader
+ * erasing everything but the old flash. If NOTHING is set, this will be the default as this is the old behavior.
+ *
+ * _JUMP_ADDR
+ *
+ * This is the address that the bootloader will jump to start execution
+ * of the sketch. This is almost always _RESET_ADDR.
+ *
+ * However, you can specify an alternate entry execution point for example
+ * if you have alternate starup code that, say, shared
+ * the runtime with other sketches or needed some kind of specific handling
+ *
+ * Immediately after programming (avrdude upload) the bootloader will typically
+ * jump to the just loaded sketch, no matter where it was loaded in flash.
+ * _imageExecutionJumpToFirstInFlash will tell the bootloader to jump to the first
+ * sketch in flash even if the just loaded one is not at the beginning of flash.
+ * This is useful when programming sketches in slots of flash and then always
+ * jumping to the program-flash loader (vector sketch) as if the board was just reset.
+ * This bit does not effect jumping to a sketch already in flash after reset.
+ * As of today, after reset, the first program in flash will always be jumped to.
+ *
+ *************************************************************************/
+ _IMAGE_TYPE = _imageMPIDE | _imageJustInTimeFlashErase | _imageExecutionJumpAddress;
+ _IMAGE_FLASH_SIZE = LENGTH(exception_mem) + LENGTH(kseg0_program_mem);
+_JUMP_ADDR = _RESET_ADDR;
+
+SECTIONS
+{
+ /* Boot Sections */
+ .reset _RESET_ADDR :
+ {
+ KEEP(*(.reset))
+ } > kseg0_program_mem
+}
+
+/* From here out every linker script is the same, so just include it */
+INCLUDE "./hardware/pic32/cores/pic32/chipKIT-application-COMMON.ld"
View
134 hardware/pic32/cores/pic32/chipKIT-application-32MX460F512.ld
@@ -0,0 +1,134 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-tradlittlemips")
+OUTPUT_ARCH(pic32mx)
+ENTRY(_reset)
+/*
+ * Provide for a minimum stack and heap size
+ * - _min_stack_size - represents the minimum space that must be made
+ * available for the stack. Can be overridden from
+ * the command line using the linker's --defsym option.
+ * - _min_heap_size - represents the minimum space that must be made
+ * available for the heap. Can be overridden from
+ * the command line using the linker's --defsym option.
+ */
+EXTERN (_min_stack_size _min_heap_size)
+PROVIDE(_min_stack_size = 0x800) ;
+PROVIDE(_min_heap_size = 0x800) ;
+
+/*************************************************************************
+ * Processor-specific object file. Contains SFR definitions.
+ *************************************************************************/
+INPUT("processor.o")
+
+/*************************************************************************
+ * Memory Regions
+ *
+ * Memory regions without attributes cannot be used for orphaned sections.
+ * Only sections specifically assigned to these regions can be allocated
+ * into these regions.
+ *************************************************************************/
+MEMORY
+{
+ exception_mem : ORIGIN = 0x9D000000, LENGTH = 0x1000
+ kseg0_program_mem (rx) : ORIGIN = 0x9D001000, LENGTH = 0x7E000
+ kseg0_eeprom_mem : ORIGIN = 0x9D07F000, LENGTH = 0x1000
+ kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0
+ kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
+ debug_exec_mem : ORIGIN = 0xBFC02000, LENGTH = 0
+ config3 : ORIGIN = 0xBFC02FF0, LENGTH = 4
+ config2 : ORIGIN = 0xBFC02FF4, LENGTH = 4
+ config1 : ORIGIN = 0xBFC02FF8, LENGTH = 4
+ config0 : ORIGIN = 0xBFC02FFC, LENGTH = 4
+ kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x8000
+ sfrs : ORIGIN = 0xBF800000, LENGTH = 0x100000
+ configsfrs : ORIGIN = 0xBFC02FF0, LENGTH = 0x10
+}
+
+/*************************************************************************
+ * Memory Address Equates
+ *************************************************************************/
+_ebase_address = ORIGIN(exception_mem);
+_IMAGE_PTR_TABLE = _ebase_address + 0x0F8;
+_IMAGE_HEADER_ADDR = _ebase_address + 0x0FC;
+_GEN_EXCPT_ADDR = _ebase_address + 0x180;
+_RESET_ADDR = ORIGIN(kseg0_program_mem);
+_EEPROM_ADDR = ORIGIN(kseg0_eeprom_mem);
+_BEV_EXCPT_ADDR = 0xBFC00380;
+_DBG_EXCPT_ADDR = 0xBFC00480;
+_DBG_CODE_ADDR = ORIGIN(debug_exec_mem);
+
+/*************************************************************************
+ * Bootloader program directives.
+ *
+ * _IMAGE_TYPE
+ *
+ * image type:
+ */
+
+_imageReserved = 0x00000000 ;
+_imageMPIDE = 0x00000001 ; /* This is a normal MPIDE sketch */
+_imageBootFlashBootloader = 0x00000002 ; /* This is a boot flash bootloader */
+_imageProgramFlashBootloader = 0x00000004 ; /* This is a program flash bootloader */
+_imageSplitFlashBootloader = 0x00000008 ; /* This has bootloader code in both boot and program flash */
+
+ /*
+ * Instructions for the bootloader
+ */
+
+_imageFullFlashEraseLess4KEEProm = 0x00010000 ; /* The original bootloader method of erasing all of program flash except the last 4K reserved for eeprom */
+_imageJustInTimeFlashErase = 0x00020000 ; /* Only flash pages written too needed by the sketch is erased */
+_imageLinkerSpecifiedFlashErase = 0x00040000 ; /* The linker defines the flash range to erase */
+_imageFullFlashErase = 0x00080000 ; /* All of flash is erased */
+_imageExecutionJumpAddress = 0x01000000 ; /* the bootloader will jump to the execution jump address immediately after programming */
+_imageExecutionJumpToFirstInFlash = 0x02000000 ; /* the bootloader will jump to the first sketch loaded in flash ignoring the execution jump address immediately after programming */
+
+/*
+ * _IMAGE_FLASH_SIZE
+ *
+ * Typically _imageJustInTimeFlashErase is selected to just erase the pages
+ * of flash that code is written too; thus leaving all other flash pages untouched.
+ *
+ * If _imageLinkerSpecifiedFlashErase set, then the range
+ * starting from _ebase_address for _IMAGE_FLASH_SIZE bytes are erased.
+ *
+ * If _imageFullFlashErase is specified, than the whole flash
+ * as known by the bootloader will be erased. This will erase eeprom as well
+ *
+ * if _imageFullFlashEraseLess4KEEProm is set, all of flash less the last 4K is
+ * erased, this is the old default. This bit could be set to make a program flash bootloader
+ * erasing everything but the old flash. If NOTHING is set, this will be the default as this is the old behavior.
+ *
+ * _JUMP_ADDR
+ *
+ * This is the address that the bootloader will jump to start execution
+ * of the sketch. This is almost always _RESET_ADDR.
+ *
+ * However, you can specify an alternate entry execution point for example
+ * if you have alternate starup code that, say, shared
+ * the runtime with other sketches or needed some kind of specific handling
+ *
+ * Immediately after programming (avrdude upload) the bootloader will typically
+ * jump to the just loaded sketch, no matter where it was loaded in flash.
+ * _imageExecutionJumpToFirstInFlash will tell the bootloader to jump to the first
+ * sketch in flash even if the just loaded one is not at the beginning of flash.
+ * This is useful when programming sketches in slots of flash and then always
+ * jumping to the program-flash loader (vector sketch) as if the board was just reset.
+ * This bit does not effect jumping to a sketch already in flash after reset.
+ * As of today, after reset, the first program in flash will always be jumped to.
+ *
+ *************************************************************************/
+ _IMAGE_TYPE = _imageMPIDE | _imageJustInTimeFlashErase | _imageExecutionJumpAddress;
+ _IMAGE_FLASH_SIZE = LENGTH(exception_mem) + LENGTH(kseg0_program_mem);
+_JUMP_ADDR = _RESET_ADDR;
+
+SECTIONS
+{
+ /* Boot Sections */
+ .reset _RESET_ADDR :
+ {
+ KEEP(*(.reset))
+ } > kseg0_program_mem
+}
+
+/* From here out every linker script is the same, so just include it */
+INCLUDE "./hardware/pic32/cores/pic32/chipKIT-application-COMMON.ld"
View
135 hardware/pic32/cores/pic32/chipKIT-application-32MX795F512.ld
@@ -0,0 +1,135 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-tradlittlemips")
+OUTPUT_ARCH(pic32mx)
+ENTRY(_reset)
+/*
+ * Provide for a minimum stack and heap size
+ * - _min_stack_size - represents the minimum space that must be made
+ * available for the stack. Can be overridden from
+ * the command line using the linker's --defsym option.
+ * - _min_heap_size - represents the minimum space that must be made
+ * available for the heap. Can be overridden from
+ * the command line using the linker's --defsym option.
+ */
+EXTERN (_min_stack_size _min_heap_size)
+PROVIDE(_min_stack_size = 0x800) ;
+PROVIDE(_min_heap_size = 0x800) ;
+
+/*************************************************************************
+ * Processor-specific object file. Contains SFR definitions.
+ *************************************************************************/
+INPUT("processor.o")
+
+/*************************************************************************
+ * Memory Regions
+ *
+ * Memory regions without attributes cannot be used for orphaned sections.
+ * Only sections specifically assigned to these regions can be allocated
+ * into these regions.
+ *************************************************************************/
+MEMORY
+{
+ exception_mem : ORIGIN = 0x9D000000, LENGTH = 0x1000
+ kseg0_program_mem (rx) : ORIGIN = 0x9D001000, LENGTH = 0x7E000
+ kseg0_eeprom_mem : ORIGIN = 0x9D07F000, LENGTH = 0x1000
+ kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0
+ kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
+ debug_exec_mem : ORIGIN = 0xBFC02000, LENGTH = 0
+ config3 : ORIGIN = 0xBFC02FF0, LENGTH = 4
+ config2 : ORIGIN = 0xBFC02FF4, LENGTH = 4
+ config1 : ORIGIN = 0xBFC02FF8, LENGTH = 4
+ config0 : ORIGIN = 0xBFC02FFC, LENGTH = 4
+ kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
+ sfrs : ORIGIN = 0xBF800000, LENGTH = 0x100000
+ configsfrs : ORIGIN = 0xBFC02FF0, LENGTH = 0x10
+}
+
+/*************************************************************************
+ * Memory Address Equates
+ *************************************************************************/
+_ebase_address = ORIGIN(exception_mem);
+_IMAGE_PTR_TABLE = _ebase_address + 0x0F8;
+_IMAGE_HEADER_ADDR = _ebase_address + 0x0FC;
+_GEN_EXCPT_ADDR = _ebase_address + 0x180;
+_RESET_ADDR = ORIGIN(kseg0_program_mem);
+_EEPROM_ADDR = ORIGIN(kseg0_eeprom_mem);
+_BEV_EXCPT_ADDR = 0xBFC00380;
+_DBG_EXCPT_ADDR = 0xBFC00480;
+_DBG_CODE_ADDR = ORIGIN(debug_exec_mem);
+
+/*************************************************************************
+ * Bootloader program directives.
+ *
+ * _IMAGE_TYPE
+ *
+ * image type:
+ */
+
+_imageReserved = 0x00000000 ;
+_imageMPIDE = 0x00000001 ; /* This is a normal MPIDE sketch */
+_imageBootFlashBootloader = 0x00000002 ; /* This is a boot flash bootloader */
+_imageProgramFlashBootloader = 0x00000004 ; /* This is a program flash bootloader */
+_imageSplitFlashBootloader = 0x00000008 ; /* This has bootloader code in both boot and program flash */
+
+ /*
+ * Instructions for the bootloader
+ */
+
+_imageFullFlashEraseLess4KEEProm = 0x00010000 ; /* The original bootloader method of erasing all of program flash except the last 4K reserved for eeprom */
+_imageJustInTimeFlashErase = 0x00020000 ; /* Only flash pages written too needed by the sketch is erased */
+_imageLinkerSpecifiedFlashErase = 0x00040000 ; /* The linker defines the flash range to erase */
+_imageFullFlashErase = 0x00080000 ; /* All of flash is erased */
+_imageExecutionJumpAddress = 0x01000000 ; /* the bootloader will jump to the execution jump address immediately after programming */
+_imageExecutionJumpToFirstInFlash = 0x02000000 ; /* the bootloader will jump to the first sketch loaded in flash ignoring the execution jump address immediately after programming */
+
+/*
+ * _IMAGE_FLASH_SIZE
+ *
+ * Typically _imageJustInTimeFlashErase is selected to just erase the pages
+ * of flash that code is written too; thus leaving all other flash pages untouched.
+ *
+ * If _imageLinkerSpecifiedFlashErase set, then the range
+ * starting from _ebase_address for _IMAGE_FLASH_SIZE bytes are erased.
+ *
+ * If _imageFullFlashErase is specified, than the whole flash
+ * as known by the bootloader will be erased. This will erase eeprom as well
+ *
+ * if _imageFullFlashEraseLess4KEEProm is set, all of flash less the last 4K is
+ * erased, this is the old default. This bit could be set to make a program flash bootloader
+ * erasing everything but the old flash. If NOTHING is set, this will be the default as this is the old behavior.
+ *
+ * _JUMP_ADDR
+ *
+ * This is the address that the bootloader will jump to start execution
+ * of the sketch. This is almost always _RESET_ADDR.
+ *
+ * However, you can specify an alternate entry execution point for example
+ * if you have alternate starup code that, say, shared
+ * the runtime with other sketches or needed some kind of specific handling
+ *
+ * Immediately after programming (avrdude upload) the bootloader will typically
+ * jump to the just loaded sketch, no matter where it was loaded in flash.
+ * _imageExecutionJumpToFirstInFlash will tell the bootloader to jump to the first
+ * sketch in flash even if the just loaded one is not at the beginning of flash.
+ * This is useful when programming sketches in slots of flash and then always
+ * jumping to the program-flash loader (vector sketch) as if the board was just reset.
+ * This bit does not effect jumping to a sketch already in flash after reset.
+ * As of today, after reset, the first program in flash will always be jumped to.
+ *
+ *************************************************************************/
+ _IMAGE_TYPE = _imageMPIDE | _imageJustInTimeFlashErase | _imageExecutionJumpAddress;
+ _IMAGE_FLASH_SIZE = LENGTH(exception_mem) + LENGTH(kseg0_program_mem);
+ _JUMP_ADDR = _RESET_ADDR;
+
+SECTIONS
+{
+ /* Boot Sections */
+ .reset _RESET_ADDR :
+ {
+ KEEP(*(.reset))
+ } > kseg0_program_mem
+}
+
+/* From here out every linker script is the same, so just include it */
+INCLUDE "./hardware/pic32/cores/pic32/chipKIT-application-COMMON.ld"
+
View
733 hardware/pic32/cores/pic32/chipKIT-application-COMMON.ld
@@ -0,0 +1,733 @@
+/************************************************************************
+ * chipKIT-applicaiton-COMMON.ld
+ *
+ * This is the common part of the linker script shared
+ * across all chipKIT PIC32 processors / boards.
+ *
+ ************************************************************************
+ * this code is based on code Copyright (c) 2005-2006 David A. Mellis
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.//* See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General
+ * Public License along with this library; if not, write to the
+ * Free Software Foundation, Inc., 59 Temple Place, Suite 330,
+ * Boston, MA 02111-1307 USA
+ *
+ *
+ ************************************************************************
+ * Edit History
+ ************************************************************************
+ * Jun 30 2012 <Keith Vogel, Digilent> Extracted the common section of the linker script
+ * Jun 30 2012 <Keith Vogel, Digilent> Created a flash header section
+ * Jun 30 2012 <Keith Vogel, Digilent> Created a RAM header section
+ ************************************************************************
+ */
+
+/*************************************************************************
+ * For interrupt vector handling
+ *************************************************************************/
+PROVIDE(_vector_spacing = 0x00000001);
+
+/*************************************************************************
+ * Start the layout of memory, the sections...
+ *************************************************************************/
+SECTIONS
+{
+ .eeprom_pic32 _EEPROM_ADDR (NOLOAD):
+ {
+ KEEP(*(.eeprom_pic32 .eeprom_pic32.*))
+ } > kseg0_eeprom_mem
+
+ /DISCARD/ : { *(.bev_handler) }
+
+ .image_ptr_table _IMAGE_PTR_TABLE :
+ {
+ LONG(_ebase_address)
+ LONG(_image_header_info)
+ } > exception_mem
+
+ .app_excpt _GEN_EXCPT_ADDR :
+ {
+ KEEP(*(.gen_handler))
+ } > exception_mem
+
+ .vector_0 _ebase_address + 0x200 :
+ {
+ KEEP(*(.vector_0))
+ } > exception_mem
+ ASSERT (_vector_spacing == 0 || SIZEOF(.vector_0) <= (_vector_spacing << 5), "function at exception vector 0 too large")
+ .vector_1 _ebase_address + 0x200 + (_vector_spacing << 5) * 1 :
+ {
+ KEEP(*(.vector_1))
+ } > exception_mem
+ ASSERT (_vector_spacing == 0 || SIZEOF(.vector_1) <= (_vector_spacing << 5), "function at exception vector 1 too large")
+ .vector_2 _ebase_address + 0x200 + (_vector_spacing << 5) * 2 :
+ {
+ KEEP(*(.vector_2))
+ } > exception_mem
+ ASSERT (_vector_spacing == 0 || SIZEOF(.vector_2) <= (_vector_spacing << 5), "function at exception vector 2 too large")
+ .vector_3 _ebase_address + 0x200 + (_vector_spacing << 5) * 3 :
+ {
+ KEEP(*(.vector_3))
+ } > exception_mem
+ ASSERT (_vector_spacing == 0 || SIZEOF(.vector_3) <= (_vector_spacing << 5), "function at exception vector 3 too large")
+ .vector_4 _ebase_address + 0x200 + (_vector_spacing << 5) * 4 :
+ {