OUTPUT_ARCH( "riscv" )
ENTRY(_start)

MEMORY
{
    rom  (rx) : org = 0x80000000, len = 8K
    iccm (rx) : org = 0x00100000, len = 512K
    dccm (rw) : org = 0x00200000, len = 512K
}

SECTIONS
{
  PROVIDE(__stack_top = ORIGIN(dccm) + LENGTH(dccm));
    . = 0;
    .init : {  *(.init) } > rom
    .text : {  *(.text*) } > iccm
}