From 9f0eeffc8d16e12ab2d150a3cba3850a4c2835b9 Mon Sep 17 00:00:00 2001 From: Yangyu Chen Date: Tue, 25 Apr 2023 00:30:34 +0800 Subject: [PATCH 1/2] config: add WithBootFreq configuration The rocket-chip will set clock-frequency to 0 in the CPU fields of the device tree. And the value is taken from bootFreqHz in the RocketCoreParams which is zero by default. Some devices will use this property to calculate the clock divider ratio, but a zero value will cause division overflow. This patch allows setting the value by simply adding WithBootFreq to the configuration, so we will have the correct clock-frequency in the dts. Signed-off-by: Yangyu Chen --- src/main/scala/subsystem/Configs.scala | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/main/scala/subsystem/Configs.scala b/src/main/scala/subsystem/Configs.scala index 215ae26b0a6..5ab635eade2 100644 --- a/src/main/scala/subsystem/Configs.scala +++ b/src/main/scala/subsystem/Configs.scala @@ -514,6 +514,14 @@ class WithTimebase(hertz: BigInt) extends Config((site, here, up) => { case DTSTimebase => hertz }) +class WithBootFreq(hertz: BigInt) extends Config((site, here, up) => { + case TilesLocated(InSubsystem) => up(TilesLocated(InSubsystem), site) map { + case tp: RocketTileAttachParams => tp.copy(tileParams = tp.tileParams.copy( + core = tp.tileParams.core.copy(bootFreqHz = hertz))) + case t => t + } +}) + class WithDefaultMemPort extends Config((site, here, up) => { case ExtMem => Some(MemoryPortParams(MasterPortParams( base = x"8000_0000", From 4346aa0c7e4111702cea47d17a8fafc2215c9f36 Mon Sep 17 00:00:00 2001 From: Yangyu Chen Date: Tue, 25 Apr 2023 00:54:40 +0800 Subject: [PATCH 2/2] rename WithBootFreq to WithRocketTileBootFreq --- src/main/scala/subsystem/Configs.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/main/scala/subsystem/Configs.scala b/src/main/scala/subsystem/Configs.scala index 5ab635eade2..353a77df2cd 100644 --- a/src/main/scala/subsystem/Configs.scala +++ b/src/main/scala/subsystem/Configs.scala @@ -514,7 +514,7 @@ class WithTimebase(hertz: BigInt) extends Config((site, here, up) => { case DTSTimebase => hertz }) -class WithBootFreq(hertz: BigInt) extends Config((site, here, up) => { +class WithRocketTileBootFreq(hertz: BigInt) extends Config((site, here, up) => { case TilesLocated(InSubsystem) => up(TilesLocated(InSubsystem), site) map { case tp: RocketTileAttachParams => tp.copy(tileParams = tp.tileParams.copy( core = tp.tileParams.core.copy(bootFreqHz = hertz)))