{"payload":{"feedbackUrl":"https://github.com/orgs/community/discussions/53140","repo":{"id":539143665,"defaultBranch":"main","name":"ChipsecExperimental","ownerLogin":"chipsec","currentUserCanPush":false,"isFork":false,"isEmpty":false,"createdAt":"2022-09-20T18:48:25.000Z","ownerAvatar":"https://avatars.githubusercontent.com/u/6620051?v=4","public":true,"private":false,"isOrgOwned":true},"refInfo":{"name":"","listCacheKey":"v0:1681944749.0","currentOid":""},"activityList":{"items":[{"before":"ef9a17ebdb5bcea62ba541203d0d00c7c074f273","after":"07f615087b2ac0428286fb41c481d07e207e9e96","ref":"refs/heads/main","pushedAt":"2024-06-03T21:26:10.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"npmitche","name":"Nathaniel Mitchell","path":"/npmitche","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/40474174?s=80&v=4"},"commit":{"message":"Update readme to point to discord/discussions\n\nSigned-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>","shortMessageHtmlLink":"Update readme to point to discord/discussions"}},{"before":"f1387c522ec267e165805e986d1875f2c605ccef","after":"2be13e8b4c990474eb9b3fd355919467812aec51","ref":"refs/heads/ReturnCodes","pushedAt":"2023-06-08T18:50:40.148Z","pushType":"push","commitsCount":1,"pusher":{"login":"Sae86","name":null,"path":"/Sae86","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7750756?s=80&v=4"},"commit":{"message":"Changes to chipset and module_common\n\nSigned-off-by: Sara Batllori <sara.batllori@intel.com>","shortMessageHtmlLink":"Changes to chipset and module_common"}},{"before":"73d5b520b07e4d61d42469d2a8915e3fc60c5fa7","after":"f1387c522ec267e165805e986d1875f2c605ccef","ref":"refs/heads/ReturnCodes","pushedAt":"2023-06-07T23:07:47.023Z","pushType":"push","commitsCount":1,"pusher":{"login":"Sae86","name":null,"path":"/Sae86","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7750756?s=80&v=4"},"commit":{"message":"Sync missing files (1.11.0) and update chipsec_main\n\nSigned-off-by: Sara Batllori <sara.batllori@intel.com>","shortMessageHtmlLink":"Sync missing files (1.11.0) and update chipsec_main"}},{"before":"1e2b8674c426c1b4cb4d8d26e70b0af48044a7b5","after":"73d5b520b07e4d61d42469d2a8915e3fc60c5fa7","ref":"refs/heads/ReturnCodes","pushedAt":"2023-06-07T22:57:01.669Z","pushType":"push","commitsCount":1,"pusher":{"login":"Sae86","name":null,"path":"/Sae86","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7750756?s=80&v=4"},"commit":{"message":"Sync with 1.11.0\n\nSigned-off-by: Sara Batllori <sara.batllori@intel.com>","shortMessageHtmlLink":"Sync with 1.11.0"}},{"before":"64c6e5b75ce396b8e1e979aa80c3421729213db2","after":"1e2b8674c426c1b4cb4d8d26e70b0af48044a7b5","ref":"refs/heads/ReturnCodes","pushedAt":"2023-05-02T23:40:31.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"Sae86","name":null,"path":"/Sae86","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7750756?s=80&v=4"},"commit":{"message":"First changes to logger\n\nSigned-off-by: Sara Batllori <sara.batllori@intel.com>","shortMessageHtmlLink":"First changes to logger"}},{"before":"ef9a17ebdb5bcea62ba541203d0d00c7c074f273","after":"64c6e5b75ce396b8e1e979aa80c3421729213db2","ref":"refs/heads/ReturnCodes","pushedAt":"2023-04-19T22:53:19.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"Sae86","name":null,"path":"/Sae86","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7750756?s=80&v=4"},"commit":{"message":"Sync with chipsec repo\n\nSigned-off-by: Sara Batllori <sara.batllori@intel.com>","shortMessageHtmlLink":"Sync with chipsec repo"}},{"before":null,"after":"ef9a17ebdb5bcea62ba541203d0d00c7c074f273","ref":"refs/heads/ReturnCodes","pushedAt":"2023-04-19T22:52:29.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"Sae86","name":null,"path":"/Sae86","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/7750756?s=80&v=4"},"commit":{"message":"Create README.md","shortMessageHtmlLink":"Create README.md"}}],"hasNextPage":false,"hasPreviousPage":false,"activityType":"all","actor":null,"timePeriod":"all","sort":"DESC","perPage":30,"cursor":"djE6ks8AAAAEW2OViAA","startCursor":null,"endCursor":null}},"title":"Activity · chipsec/ChipsecExperimental"}