From 68f36e82fe6bd0f17953a8e31e012ada5b893607 Mon Sep 17 00:00:00 2001 From: Sasha Lopoukhine Date: Thu, 8 Jun 2023 10:36:56 +0100 Subject: [PATCH] tests: don't fail if can't run riscemu (#1099) --- tests/filecheck/with-riscemu/lit.local.cfg | 5 +++++ .../{dialects/riscv => with-riscemu}/riscv_emulation.mlir | 0 tests/interpreters/test_riscv_emulator.py | 3 +++ 3 files changed, 8 insertions(+) create mode 100644 tests/filecheck/with-riscemu/lit.local.cfg rename tests/filecheck/{dialects/riscv => with-riscemu}/riscv_emulation.mlir (100%) diff --git a/tests/filecheck/with-riscemu/lit.local.cfg b/tests/filecheck/with-riscemu/lit.local.cfg new file mode 100644 index 0000000000..d27c92c012 --- /dev/null +++ b/tests/filecheck/with-riscemu/lit.local.cfg @@ -0,0 +1,5 @@ + +try: + import riscemu +except ImportError: + config.unsupported = True diff --git a/tests/filecheck/dialects/riscv/riscv_emulation.mlir b/tests/filecheck/with-riscemu/riscv_emulation.mlir similarity index 100% rename from tests/filecheck/dialects/riscv/riscv_emulation.mlir rename to tests/filecheck/with-riscemu/riscv_emulation.mlir diff --git a/tests/interpreters/test_riscv_emulator.py b/tests/interpreters/test_riscv_emulator.py index 9a5fb7ba35..ac2f8a56ea 100644 --- a/tests/interpreters/test_riscv_emulator.py +++ b/tests/interpreters/test_riscv_emulator.py @@ -6,6 +6,9 @@ from xdsl.ir import MLContext from xdsl.transforms.riscv_register_allocation import RISCVRegisterAllocation +import pytest + +pytest.importorskip("riscemu", reason="riscemu is an optional dependency") from xdsl.interpreters.riscv_emulator import RV_Debug, run_riscv