From 35c5b0bae6282c4da6d383d55cc5341905b3bf1f Mon Sep 17 00:00:00 2001 From: Ian Rogers Date: Tue, 30 Jun 2009 15:06:32 -0700 Subject: [PATCH] Merge commutative and non-commutative (LONG_NEG) long emits. Introduce LONG_SUB memops and peephole optimizations. --- .../opt-burs/ia32/IA32-LongAdd-32.rules | 28 +- .../opt-burs/ia32/IA32-LongAnd-32.rules | 30 +-- .../opt-burs/ia32/IA32-LongNeg-32.rules | 2 +- .../opt-burs/ia32/IA32-LongOr-32.rules | 28 +- .../opt-burs/ia32/IA32-LongSub-32.rules | 23 +- .../opt-burs/ia32/IA32-LongXor-32.rules | 28 +- .../opt/lir2mir/ia32/BURS_Helpers.java | 242 +++--------------- 7 files changed, 122 insertions(+), 259 deletions(-) diff --git a/rvm/src-generated/opt-burs/ia32/IA32-LongAdd-32.rules b/rvm/src-generated/opt-burs/ia32/IA32-LongAdd-32.rules index 1829fc382..c3e3f7649 100644 --- a/rvm/src-generated/opt-burs/ia32/IA32-LongAdd-32.rules +++ b/rvm/src-generated/opt-burs/ia32/IA32-LongAdd-32.rules @@ -4,36 +4,36 @@ r: LONG_ADD(r, rlv) 26 EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_ADD, IA32_ADC, P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), Binary.getVal2(P(p))); +EMIT_LongBinary(IA32_ADD, IA32_ADC, P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), Binary.getVal2(P(p)), true); ### Memory operands ### -r: LONG_ADD(rlv, load64) +r: LONG_ADD(r, load64) 30 EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_ADD, IA32_ADC, P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), consumeMO()); +EMIT_LongBinary(IA32_ADD, IA32_ADC, P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), consumeMO(), true); r: LONG_ADD(load64, rlv) 30 EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_ADD, IA32_ADC, P(p), Binary.getResult(P(p)), Binary.getVal2(P(p)), consumeMO()); +EMIT_LongBinary(IA32_ADD, IA32_ADC, P(p), Binary.getResult(P(p)), Binary.getVal2(P(p)), consumeMO(), true); stm: LONG_STORE(LONG_ADD(LONG_LOAD(rlv,rlv),rlv),OTHER_OPERAND(rlv, rlv)) -ADDRESS_EQUAL(P(p), PLL(p), 30) +ADDRESS_EQUAL(P(p), PLL(p), 34) EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_ADD, IA32_ADC, P(p), MO_S(P(p), QW), MO_S(P(p), QW), Binary.getVal2(PL(p))); +EMIT_LongBinary(IA32_ADD, IA32_ADC, P(p), MO_S(P(p), QW), MO_S(P(p), QW), Binary.getVal2(PL(p)), true); -stm: LONG_STORE(LONG_ADD(rlv,LONG_LOAD(rlv,rlv)),OTHER_OPERAND(rlv, rlv)) -ADDRESS_EQUAL(P(p), PLR(p), 17) +stm: LONG_STORE(LONG_ADD(r,LONG_LOAD(rlv,rlv)),OTHER_OPERAND(rlv, rlv)) +ADDRESS_EQUAL(P(p), PLR(p), 34) EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_ADD, IA32_ADC, P(p), MO_S(P(p), QW), MO_S(P(p), QW), Binary.getVal1(PL(p))); +EMIT_LongBinary(IA32_ADD, IA32_ADC, P(p), MO_S(P(p), QW), MO_S(P(p), QW), Binary.getVal1(PL(p)), true); stm: LONG_ASTORE(LONG_ADD(LONG_ALOAD(rlv,rlv),rlv),OTHER_OPERAND(rlv, rlv)) -ARRAY_ADDRESS_EQUAL(P(p), PLL(p), 17) +ARRAY_ADDRESS_EQUAL(P(p), PLL(p), 34) EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_ADD, IA32_ADC, P(p), MO_AS(P(p), QW_S, QW), MO_AS(P(p), QW_S, QW), Binary.getVal2(PL(p))); +EMIT_LongBinary(IA32_ADD, IA32_ADC, P(p), MO_AS(P(p), QW_S, QW), MO_AS(P(p), QW_S, QW), Binary.getVal2(PL(p)), true); -stm: LONG_ASTORE(LONG_ADD(rlv,LONG_ALOAD(rlv,rlv)),OTHER_OPERAND(rlv, rlv)) -ARRAY_ADDRESS_EQUAL(P(p), PLR(p), 17) +stm: LONG_ASTORE(LONG_ADD(r,LONG_ALOAD(rlv,rlv)),OTHER_OPERAND(rlv, rlv)) +ARRAY_ADDRESS_EQUAL(P(p), PLR(p), 34) EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_ADD, IA32_ADC, P(p), MO_AS(P(p), QW_S, QW), MO_AS(P(p), QW_S, QW), Binary.getVal1(PL(p))); +EMIT_LongBinary(IA32_ADD, IA32_ADC, P(p), MO_AS(P(p), QW_S, QW), MO_AS(P(p), QW_S, QW), Binary.getVal1(PL(p)), true); diff --git a/rvm/src-generated/opt-burs/ia32/IA32-LongAnd-32.rules b/rvm/src-generated/opt-burs/ia32/IA32-LongAnd-32.rules index 2eab306f5..9f55af07a 100644 --- a/rvm/src-generated/opt-burs/ia32/IA32-LongAnd-32.rules +++ b/rvm/src-generated/opt-burs/ia32/IA32-LongAnd-32.rules @@ -2,38 +2,38 @@ # LONG_AND ##### r: LONG_AND(r, rlv) -13 +26 EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_AND, IA32_AND, P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), Binary.getVal2(P(p))); +EMIT_LongBinary(IA32_AND, IA32_AND, P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), Binary.getVal2(P(p)), true); ### Memory operands ### -r: LONG_AND(rlv, load64) -15 +r: LONG_AND(r, load64) +30 EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_AND, IA32_AND, P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), consumeMO()); +EMIT_LongBinary(IA32_AND, IA32_AND, P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), consumeMO(), true); r: LONG_AND(load64, rlv) -15 +30 EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_AND, IA32_AND, P(p), Binary.getResult(P(p)), Binary.getVal2(P(p)), consumeMO()); +EMIT_LongBinary(IA32_AND, IA32_AND, P(p), Binary.getResult(P(p)), Binary.getVal2(P(p)), consumeMO(), true); stm: LONG_STORE(LONG_AND(LONG_LOAD(rlv,rlv),rlv),OTHER_OPERAND(rlv, rlv)) -ADDRESS_EQUAL(P(p), PLL(p), 17) +ADDRESS_EQUAL(P(p), PLL(p), 34) EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_AND, IA32_AND, P(p), MO_S(P(p), QW), MO_S(P(p), QW), Binary.getVal2(PL(p)) ); +EMIT_LongBinary(IA32_AND, IA32_AND, P(p), MO_S(P(p), QW), MO_S(P(p), QW), Binary.getVal2(PL(p)), true); stm: LONG_STORE(LONG_AND(r,LONG_LOAD(rlv,rlv)),OTHER_OPERAND(rlv, rlv)) -ADDRESS_EQUAL(P(p), PLR(p), 17) +ADDRESS_EQUAL(P(p), PLR(p), 34) EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_AND, IA32_AND, P(p), MO_S(P(p), QW), MO_S(P(p), QW), Binary.getVal1(PL(p)) ); +EMIT_LongBinary(IA32_AND, IA32_AND, P(p), MO_S(P(p), QW), MO_S(P(p), QW), Binary.getVal1(PL(p)), true); stm: LONG_ASTORE(LONG_AND(LONG_ALOAD(rlv,rlv),rlv),OTHER_OPERAND(rlv, rlv)) -ARRAY_ADDRESS_EQUAL(P(p), PLL(p), 17) +ARRAY_ADDRESS_EQUAL(P(p), PLL(p), 34) EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_AND, IA32_AND, P(p), MO_AS(P(p), QW_S, QW), MO_AS(P(p), QW_S, QW), Binary.getVal2(PL(p)) ); +EMIT_LongBinary(IA32_AND, IA32_AND, P(p), MO_AS(P(p), QW_S, QW), MO_AS(P(p), QW_S, QW), Binary.getVal2(PL(p)), true); stm: LONG_ASTORE(LONG_AND(r,LONG_ALOAD(rlv,rlv)),OTHER_OPERAND(rlv, rlv)) -ARRAY_ADDRESS_EQUAL(P(p), PLR(p), 17) +ARRAY_ADDRESS_EQUAL(P(p), PLR(p), 34) EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_AND, IA32_AND, P(p), MO_AS(P(p), QW_S, QW), MO_AS(P(p), QW_S, QW), Binary.getVal1(PL(p)) ); +EMIT_LongBinary(IA32_AND, IA32_AND, P(p), MO_AS(P(p), QW_S, QW), MO_AS(P(p), QW_S, QW), Binary.getVal1(PL(p)), true); diff --git a/rvm/src-generated/opt-burs/ia32/IA32-LongNeg-32.rules b/rvm/src-generated/opt-burs/ia32/IA32-LongNeg-32.rules index 358dfebe3..9157f4cc1 100644 --- a/rvm/src-generated/opt-burs/ia32/IA32-LongNeg-32.rules +++ b/rvm/src-generated/opt-burs/ia32/IA32-LongNeg-32.rules @@ -2,7 +2,7 @@ # LONG_NEG ##### r: LONG_NEG(r) -23 +26 EMIT_INSTRUCTION EMIT_LongUnary(P(p), Unary.getResult(P(p)), Unary.getVal(P(p)), true); diff --git a/rvm/src-generated/opt-burs/ia32/IA32-LongOr-32.rules b/rvm/src-generated/opt-burs/ia32/IA32-LongOr-32.rules index c895df21f..fddee27d2 100644 --- a/rvm/src-generated/opt-burs/ia32/IA32-LongOr-32.rules +++ b/rvm/src-generated/opt-burs/ia32/IA32-LongOr-32.rules @@ -2,38 +2,38 @@ # LONG_OR ##### r: LONG_OR(r, rlv) -13 +26 EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_OR, IA32_OR, P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), Binary.getVal2(P(p))); +EMIT_LongBinary(IA32_OR, IA32_OR, P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), Binary.getVal2(P(p)), true); ### Memory operands ### r: LONG_OR(r, load64) -15 +30 EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_OR, IA32_OR, P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), consumeMO()); +EMIT_LongBinary(IA32_OR, IA32_OR, P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), consumeMO(), true); r: LONG_OR(load64, rlv) -15 +30 EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_OR, IA32_OR, P(p), Binary.getResult(P(p)), Binary.getVal2(P(p)), consumeMO()); +EMIT_LongBinary(IA32_OR, IA32_OR, P(p), Binary.getResult(P(p)), Binary.getVal2(P(p)), consumeMO(), true); stm: LONG_STORE(LONG_OR(LONG_LOAD(rlv,rlv),rlv),OTHER_OPERAND(rlv, rlv)) -ADDRESS_EQUAL(P(p), PLL(p), 17) +ADDRESS_EQUAL(P(p), PLL(p), 34) EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_OR, IA32_OR, P(p), MO_S(P(p), QW), MO_S(P(p), QW), Binary.getVal2(PL(p)) ); +EMIT_LongBinary(IA32_OR, IA32_OR, P(p), MO_S(P(p), QW), MO_S(P(p), QW), Binary.getVal2(PL(p)), true); stm: LONG_STORE(LONG_OR(r,LONG_LOAD(rlv,rlv)),OTHER_OPERAND(rlv, rlv)) -ADDRESS_EQUAL(P(p), PLR(p), 17) +ADDRESS_EQUAL(P(p), PLR(p), 34) EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_OR, IA32_OR, P(p), MO_S(P(p), QW), MO_S(P(p), QW), Binary.getVal1(PL(p)) ); +EMIT_LongBinary(IA32_OR, IA32_OR, P(p), MO_S(P(p), QW), MO_S(P(p), QW), Binary.getVal1(PL(p)), true); stm: LONG_ASTORE(LONG_OR(LONG_ALOAD(rlv,rlv),rlv),OTHER_OPERAND(rlv, rlv)) -ARRAY_ADDRESS_EQUAL(P(p), PLL(p), 17) +ARRAY_ADDRESS_EQUAL(P(p), PLL(p), 34) EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_OR, IA32_OR, P(p), MO_AS(P(p), QW_S, QW), MO_AS(P(p), QW_S, QW), Binary.getVal2(PL(p)) ); +EMIT_LongBinary(IA32_OR, IA32_OR, P(p), MO_AS(P(p), QW_S, QW), MO_AS(P(p), QW_S, QW), Binary.getVal2(PL(p)), true); stm: LONG_ASTORE(LONG_OR(r,LONG_ALOAD(rlv,rlv)),OTHER_OPERAND(rlv, rlv)) -ARRAY_ADDRESS_EQUAL(P(p), PLR(p), 17) +ARRAY_ADDRESS_EQUAL(P(p), PLR(p), 34) EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_OR, IA32_OR, P(p), MO_AS(P(p), QW_S, QW), MO_AS(P(p), QW_S, QW), Binary.getVal1(PL(p)) ); +EMIT_LongBinary(IA32_OR, IA32_OR, P(p), MO_AS(P(p), QW_S, QW), MO_AS(P(p), QW_S, QW), Binary.getVal1(PL(p)), true); diff --git a/rvm/src-generated/opt-burs/ia32/IA32-LongSub-32.rules b/rvm/src-generated/opt-burs/ia32/IA32-LongSub-32.rules index 9e82241f8..5b7de18a0 100644 --- a/rvm/src-generated/opt-burs/ia32/IA32-LongSub-32.rules +++ b/rvm/src-generated/opt-burs/ia32/IA32-LongSub-32.rules @@ -4,5 +4,26 @@ r: LONG_SUB(rlv, rlv) 23 EMIT_INSTRUCTION -LONG_SUB(P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), Binary.getVal2(P(p))); +EMIT_LongBinary(IA32_SUB, IA32_SBB, P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), Binary.getVal2(P(p)), false); + +### Memory operands ### +r: LONG_SUB(rlv, load64) +30 +EMIT_INSTRUCTION +EMIT_LongBinary(IA32_SUB, IA32_SBB, P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), consumeMO(), false); + +r: LONG_SUB(load64, rlv) +30 +EMIT_INSTRUCTION +EMIT_LongBinary(IA32_SUB, IA32_SBB, P(p), Binary.getResult(P(p)), consumeMO(), Binary.getVal2(P(p)), false); + +stm: LONG_STORE(LONG_SUB(LONG_LOAD(rlv,rlv),rlv),OTHER_OPERAND(rlv, rlv)) +ADDRESS_EQUAL(P(p), PLL(p), 34) +EMIT_INSTRUCTION +EMIT_LongBinary(IA32_SUB, IA32_SBB, P(p), MO_S(P(p), QW), MO_S(P(p), QW), Binary.getVal2(PL(p)), false); + +stm: LONG_ASTORE(LONG_SUB(LONG_ALOAD(rlv,rlv),rlv),OTHER_OPERAND(rlv, rlv)) +ARRAY_ADDRESS_EQUAL(P(p), PLL(p), 34) +EMIT_INSTRUCTION +EMIT_LongBinary(IA32_SUB, IA32_SBB, P(p), MO_AS(P(p), QW_S, QW), MO_AS(P(p), QW_S, QW), Binary.getVal2(PL(p)), false); diff --git a/rvm/src-generated/opt-burs/ia32/IA32-LongXor-32.rules b/rvm/src-generated/opt-burs/ia32/IA32-LongXor-32.rules index 0b603382a..b79e51e31 100644 --- a/rvm/src-generated/opt-burs/ia32/IA32-LongXor-32.rules +++ b/rvm/src-generated/opt-burs/ia32/IA32-LongXor-32.rules @@ -2,38 +2,38 @@ # LONG_XOR ##### r: LONG_XOR(r, rlv) -13 +26 EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_XOR, IA32_XOR, P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), Binary.getVal2(P(p))); +EMIT_LongBinary(IA32_XOR, IA32_XOR, P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), Binary.getVal2(P(p)), true); ### Memory operands ### r: LONG_XOR(r, load64) -15 +30 EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_XOR, IA32_XOR, P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), consumeMO()); +EMIT_LongBinary(IA32_XOR, IA32_XOR, P(p), Binary.getResult(P(p)), Binary.getVal1(P(p)), consumeMO(), true); r: LONG_XOR(load64, rlv) -15 +30 EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_XOR, IA32_XOR, P(p), Binary.getResult(P(p)), Binary.getVal2(P(p)), consumeMO()); +EMIT_LongBinary(IA32_XOR, IA32_XOR, P(p), Binary.getResult(P(p)), Binary.getVal2(P(p)), consumeMO(), true); stm: LONG_STORE(LONG_XOR(LONG_LOAD(rlv,rlv),rlv),OTHER_OPERAND(rlv, rlv)) -ADDRESS_EQUAL(P(p), PLL(p), 17) +ADDRESS_EQUAL(P(p), PLL(p), 34) EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_XOR, IA32_XOR, P(p), MO_S(P(p), QW), MO_S(P(p), QW), Binary.getVal2(PL(p)) ); +EMIT_LongBinary(IA32_XOR, IA32_XOR, P(p), MO_S(P(p), QW), MO_S(P(p), QW), Binary.getVal2(PL(p)), true); stm: LONG_STORE(LONG_XOR(r,LONG_LOAD(rlv,rlv)),OTHER_OPERAND(rlv, rlv)) -ADDRESS_EQUAL(P(p), PLR(p), 17) +ADDRESS_EQUAL(P(p), PLR(p), 34) EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_XOR, IA32_XOR, P(p), MO_S(P(p), QW), MO_S(P(p), QW), Binary.getVal1(PL(p)) ); +EMIT_LongBinary(IA32_XOR, IA32_XOR, P(p), MO_S(P(p), QW), MO_S(P(p), QW), Binary.getVal1(PL(p)), true); stm: LONG_ASTORE(LONG_XOR(LONG_ALOAD(rlv,rlv),rlv),OTHER_OPERAND(rlv, rlv)) -ARRAY_ADDRESS_EQUAL(P(p), PLL(p), 17) +ARRAY_ADDRESS_EQUAL(P(p), PLL(p), 34) EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_XOR, IA32_XOR, P(p), MO_AS(P(p), QW_S, QW), MO_AS(P(p), QW_S, QW), Binary.getVal2(PL(p)) ); +EMIT_LongBinary(IA32_XOR, IA32_XOR, P(p), MO_AS(P(p), QW_S, QW), MO_AS(P(p), QW_S, QW), Binary.getVal2(PL(p)), true); stm: LONG_ASTORE(LONG_XOR(r,LONG_ALOAD(rlv,rlv)),OTHER_OPERAND(rlv, rlv)) -ARRAY_ADDRESS_EQUAL(P(p), PLR(p), 17) +ARRAY_ADDRESS_EQUAL(P(p), PLR(p), 34) EMIT_INSTRUCTION -EMIT_LongCommutative(IA32_XOR, IA32_XOR, P(p), MO_AS(P(p), QW_S, QW), MO_AS(P(p), QW_S, QW), Binary.getVal1(PL(p)) ); +EMIT_LongBinary(IA32_XOR, IA32_XOR, P(p), MO_AS(P(p), QW_S, QW), MO_AS(P(p), QW_S, QW), Binary.getVal1(PL(p)), true); diff --git a/rvm/src/org/jikesrvm/compilers/opt/lir2mir/ia32/BURS_Helpers.java b/rvm/src/org/jikesrvm/compilers/opt/lir2mir/ia32/BURS_Helpers.java index 369f56446..0d4e62cbe 100644 --- a/rvm/src/org/jikesrvm/compilers/opt/lir2mir/ia32/BURS_Helpers.java +++ b/rvm/src/org/jikesrvm/compilers/opt/lir2mir/ia32/BURS_Helpers.java @@ -1264,24 +1264,29 @@ protected final void INT_DIVIDES(Instruction s, RegisterOperand result, Operand * @param result the destination register/memory * @param val1 the first operand * @param val2 the second operand - */ - protected final void EMIT_LongCommutative(Operator operator1, Operator operator2, - Instruction s, Operand result, - Operand value1, Operand value2) { - // The value of value1 should be identical to result, to avoid moves, and a - // register in the case of addition with a constant - if ((value2.similar(result)) || value1.isLongConstant()) { + * @param commutative is the operation commutative? + */ + protected final void EMIT_LongBinary(Operator operator1, Operator operator2, + Instruction s, Operand result, + Operand value1, Operand value2, + boolean commutative) { + // Save moves by swapping operands for commutative operations + if (commutative && value2.similar(result)) { Operand temp = value1; value1 = value2; value2 = temp; } - // combinations are: + // commutative combinations are: // reg, reg, reg // reg, reg, mem // reg, reg, constant // reg, mem, constant // mem, mem, reg - where the 2 mems are identical // mem, mem, constant - where the 2 mems are identical + // non-commutative combinations are also: + // reg, constant, reg + // reg, constant, mem + // mem, constant, mem // Break apart result @@ -1307,12 +1312,15 @@ protected final void EMIT_LongCommutative(Operator operator1, Operator operator2 Register lowrhs1Reg = regpool.getSecondReg(rhs1Reg); lowrhs1 = new RegisterOperand(lowrhs1Reg, TypeReference.Int); rhs1 = new RegisterOperand(rhs1Reg, TypeReference.Int); - } else { - // Memory operand - if (VM.VerifyAssertions) opt_assert(value1.isMemory()); + } else if (value1.isMemory()) { lowrhs1 = setSize(value1.asMemory(),DW); rhs1 = lowrhs1.copy(); rhs1.asMemory().disp = rhs1.asMemory().disp.plus(4); + } else { + // Long constant operand + if (VM.VerifyAssertions) opt_assert(value1.isLongConstant()); + rhs1 = IC(value1.asLongConstant().upper32()); + lowrhs1 = IC(value1.asLongConstant().lower32()); } EMIT(CPOS(s, MIR_Move.create(IA32_MOV, lowlhs.copy(), lowrhs1))); EMIT(CPOS(s, MIR_Move.create(IA32_MOV, lhs.copy(), rhs1))); @@ -1341,16 +1349,31 @@ protected final void EMIT_LongCommutative(Operator operator1, Operator operator2 // operation has no effect operator1 = null; operator2 = IA32_ADD; + } else if ((operator1 == IA32_SUB) && + lowrhs2.isIntConstant() && + (lowrhs2.asIntConstant().value == 0) + ) { + // operation has no effect + operator1 = null; + operator2 = IA32_SUB; } else if (operator1 == IA32_OR) { - if (lowrhs2.isIntConstant() && - (lowrhs2.asIntConstant().value == 0)) { - // operation has no effect - operator1 = null; + if (lowrhs2.isIntConstant()) { + if (lowrhs2.asIntConstant().value == 0) { + // operation has no effect + operator1 = null; + } else if (lowrhs2.asIntConstant().value == -1) { + // move 0 + operator1 = IA32_MOV; + } } - if (rhs2.isIntConstant() && - (rhs2.asIntConstant().value == 0)) { - // operation has no effect - operator2 = null; + if (rhs2.isIntConstant()) { + if (rhs2.asIntConstant().value == 0) { + // operation has no effect + operator2 = null; + } else if (rhs2.asIntConstant().value == -1) { + // move 0 + operator2 = IA32_MOV; + } } } else if (operator1 == IA32_AND) { if (lowrhs2.isIntConstant()) { @@ -1371,16 +1394,6 @@ protected final void EMIT_LongCommutative(Operator operator1, Operator operator2 operator2 = IA32_MOV; } } - if (lowrhs2.isIntConstant() && - (lowrhs2.asIntConstant().value == -1)) { - // operation has no effect - operator1 = null; - } - if (rhs2.isIntConstant() && - (rhs2.asIntConstant().value == -1)) { - // operation has no effect - operator2 = null; - } } else if (operator1 == IA32_XOR) { if (lowrhs2.isIntConstant()) { if (lowrhs2.asIntConstant().value == 0) { @@ -1429,177 +1442,6 @@ protected final void EMIT_LongCommutative(Operator operator1, Operator operator2 } } - /** - * Expansion of LONG_SUB (the only non-commutative long operation - * excluding muls and divides which are special) - * - * @param s the instruction to expand - * @param result the result operand - * @param val1 the first operand - * @param val2 the second operand - */ - protected final void LONG_SUB(Instruction s, Operand result, Operand val1, Operand val2) { - - if (result.similar(val1)) { - // Straight forward case where instruction is already in accumulate form - if (result.isRegister()) { - Register lhsReg = result.asRegister().getRegister(); - Register lowlhsReg = regpool.getSecondReg(lhsReg); - if (val2.isRegister()) { - Register rhsReg2 = val2.asRegister().getRegister(); - Register lowrhsReg2 = regpool.getSecondReg(rhsReg2); - EMIT(CPOS(s, MIR_BinaryAcc.create(IA32_SUB, - new RegisterOperand(lowlhsReg, TypeReference.Int), - new RegisterOperand(lowrhsReg2, TypeReference.Int)))); - EMIT(CPOS(s, MIR_BinaryAcc.mutate(s, IA32_SBB, - new RegisterOperand(lhsReg, TypeReference.Int), - new RegisterOperand(rhsReg2, TypeReference.Int)))); - } else if (val2.isLongConstant()) { - LongConstantOperand rhs2 = val2.asLongConstant(); - int low = rhs2.lower32(); - int high = rhs2.upper32(); - EMIT(CPOS(s, MIR_BinaryAcc.create(IA32_SUB, - new RegisterOperand(lowlhsReg, TypeReference.Int), - IC(low)))); - EMIT(CPOS(s, MIR_BinaryAcc.mutate(s, IA32_SBB, - new RegisterOperand(lhsReg, TypeReference.Int), - IC(high)))); - } else { - throw new OptimizingCompilerException("BURS_Helpers", - "unexpected parameters: " + result + "=" + val1 + "-" + val2); - } - } else { - throw new OptimizingCompilerException("BURS_Helpers", - "unexpected parameters: " + result + "=" + val1 + "-" + val2); - } - } else if (!result.similar(val2)) { - // Move first operand to result and perform operator on result, if - // possible redundant moves should be remove by register allocator - if (result.isRegister()) { - Register lhsReg = result.asRegister().getRegister(); - Register lowlhsReg = regpool.getSecondReg(lhsReg); - // Move val1 into result - if (val1.isRegister()) { - Register rhsReg1 = val1.asRegister().getRegister(); - Register lowrhsReg1 = regpool.getSecondReg(rhsReg1); - EMIT(CPOS(s, MIR_Move.create(IA32_MOV, - new RegisterOperand(lowlhsReg, TypeReference.Int), - new RegisterOperand(lowrhsReg1, TypeReference.Int)))); - EMIT(CPOS(s, MIR_Move.create(IA32_MOV, - new RegisterOperand(lhsReg, TypeReference.Int), - new RegisterOperand(rhsReg1, TypeReference.Int)))); - } else if (val1.isLongConstant()) { - LongConstantOperand rhs1 = val1.asLongConstant(); - int low = rhs1.lower32(); - int high = rhs1.upper32(); - EMIT(CPOS(s, MIR_Move.create(IA32_MOV, - new RegisterOperand(lowlhsReg, TypeReference.Int), - IC(low)))); - EMIT(CPOS(s, MIR_Move.create(IA32_MOV, - new RegisterOperand(lhsReg, TypeReference.Int), - IC(high)))); - } else { - throw new OptimizingCompilerException("BURS_Helpers", - "unexpected parameters: " + result + "=" + val1 + "-" + val2); - } - // Perform subtract - if (val2.isRegister()) { - Register rhsReg2 = val2.asRegister().getRegister(); - Register lowrhsReg2 = regpool.getSecondReg(rhsReg2); - EMIT(CPOS(s, MIR_BinaryAcc.create(IA32_SUB, - new RegisterOperand(lowlhsReg, TypeReference.Int), - new RegisterOperand(lowrhsReg2, TypeReference.Int)))); - EMIT(CPOS(s, MIR_BinaryAcc.mutate(s, IA32_SBB, - new RegisterOperand(lhsReg, TypeReference.Int), - new RegisterOperand(rhsReg2, TypeReference.Int)))); - } else if (val2.isLongConstant()) { - LongConstantOperand rhs2 = val2.asLongConstant(); - int low = rhs2.lower32(); - int high = rhs2.upper32(); - EMIT(CPOS(s, MIR_BinaryAcc.create(IA32_SUB, - new RegisterOperand(lowlhsReg, TypeReference.Int), - IC(low)))); - EMIT(CPOS(s, MIR_BinaryAcc.mutate(s, IA32_SBB, - new RegisterOperand(lhsReg, TypeReference.Int), - IC(high)))); - } else { - throw new OptimizingCompilerException("BURS_Helpers", - "unexpected parameters: " + result + "=" + val1 + "-" + val2); - } - } else { - throw new OptimizingCompilerException("BURS_Helpers", - "unexpected parameters: " + result + "=" + val1 + "-" + val2); - } - } else { - // Potential to clobber second operand during move to result. Use a - // temporary register to perform the operation and rely on register - // allocator to remove redundant moves - RegisterOperand temp1 = regpool.makeTempInt(); - RegisterOperand temp2 = regpool.makeTempInt(); - // Move val1 into temp - if (val1.isRegister()) { - Register rhsReg1 = val1.asRegister().getRegister(); - Register lowrhsReg1 = regpool.getSecondReg(rhsReg1); - EMIT(CPOS(s, MIR_Move.create(IA32_MOV, - temp1, - new RegisterOperand(lowrhsReg1, TypeReference.Int)))); - EMIT(CPOS(s, MIR_Move.create(IA32_MOV, - temp2, - new RegisterOperand(rhsReg1, TypeReference.Int)))); - } else if (val1.isLongConstant()) { - LongConstantOperand rhs1 = val1.asLongConstant(); - int low = rhs1.lower32(); - int high = rhs1.upper32(); - EMIT(CPOS(s, MIR_Move.create(IA32_MOV, - temp1, - IC(low)))); - EMIT(CPOS(s, MIR_Move.create(IA32_MOV, - temp2, - IC(high)))); - } else { - throw new OptimizingCompilerException("BURS_Helpers", - "unexpected parameters: " + result + "=" + val1 + "-" + val2); - } - // Perform subtract - if (val2.isRegister()) { - Register rhsReg2 = val2.asRegister().getRegister(); - Register lowrhsReg2 = regpool.getSecondReg(rhsReg2); - EMIT(CPOS(s, MIR_BinaryAcc.create(IA32_SUB, - temp1.copyRO(), - new RegisterOperand(lowrhsReg2, TypeReference.Int)))); - EMIT(CPOS(s, MIR_BinaryAcc.mutate(s, IA32_SBB, - temp2.copyRO(), - new RegisterOperand(rhsReg2, TypeReference.Int)))); - } else if (val2.isLongConstant()) { - LongConstantOperand rhs2 = val2.asLongConstant(); - int low = rhs2.lower32(); - int high = rhs2.upper32(); - EMIT(CPOS(s, MIR_BinaryAcc.create(IA32_SUB, - temp1.copyRO(), - IC(low)))); - EMIT(CPOS(s, MIR_BinaryAcc.mutate(s, IA32_SBB, - temp2.copyRO(), - IC(high)))); - } else { - throw new OptimizingCompilerException("BURS_Helpers", - "unexpected parameters: " + result + "=" + val1 + "-" + val2); - } - // Move result back - if (result.isRegister()) { - Register lhsReg = result.asRegister().getRegister(); - Register lowlhsReg = regpool.getSecondReg(lhsReg); - EMIT(CPOS(s, MIR_Move.create(IA32_MOV, - new RegisterOperand(lowlhsReg, TypeReference.Int), - temp1.copyRO()))); - EMIT(CPOS(s, MIR_Move.create(IA32_MOV, - new RegisterOperand(lhsReg, TypeReference.Int), - temp2.copyRO()))); - } else { - throw new OptimizingCompilerException("BURS_Helpers", - "unexpected parameters: " + result + "=" + val1 + "-" + val2); - } - } - } /** * Expansion of LONG_MUL