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CSE461 Lab Assignment
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_ngo
_xmsgs
iseconfig
src
ucf
xlnx_auto_0_xdb
xst/work
MimasV2TopModuleLX9.bld
MimasV2TopModuleLX9.cmd_log
MimasV2TopModuleLX9.lso
MimasV2TopModuleLX9.ncd
MimasV2TopModuleLX9.ngc
MimasV2TopModuleLX9.ngd
MimasV2TopModuleLX9.ngr
MimasV2TopModuleLX9.pad
MimasV2TopModuleLX9.par
MimasV2TopModuleLX9.pcf
MimasV2TopModuleLX9.prj
MimasV2TopModuleLX9.ptwx
MimasV2TopModuleLX9.stx
MimasV2TopModuleLX9.syr
MimasV2TopModuleLX9.twr
MimasV2TopModuleLX9.twx
MimasV2TopModuleLX9.unroutes
MimasV2TopModuleLX9.ut
MimasV2TopModuleLX9.xpi
MimasV2TopModuleLX9.xst
MimasV2TopModuleLX9_bitgen.xwbt
MimasV2TopModuleLX9_envsettings.html
MimasV2TopModuleLX9_guide.ncd
MimasV2TopModuleLX9_map.map
MimasV2TopModuleLX9_map.mrp
MimasV2TopModuleLX9_map.ncd
MimasV2TopModuleLX9_map.ngm
MimasV2TopModuleLX9_map.xrpt
MimasV2TopModuleLX9_ngdbuild.xrpt
MimasV2TopModuleLX9_pad.csv
MimasV2TopModuleLX9_pad.txt
MimasV2TopModuleLX9_par.xrpt
MimasV2TopModuleLX9_summary.html
MimasV2TopModuleLX9_summary.xml
MimasV2TopModuleLX9_usage.xml
MimasV2TopModuleLX9_xst.xrpt
README.md
mimas2_7seg_counter.gise
mimas2_7seg_counter.xise
mimasv2topmodulelx9.bgn
mimasv2topmodulelx9.bin
mimasv2topmodulelx9.bit
mimasv2topmodulelx9.drc
par_usage_statistics.html
usage_statistics_webtalk.html
webtalk.log
webtalk_pn.xml

README.md

3-7Seg-Adder

CSE461 Lab Assignment

This repo contains code to the solution for the following problem:

" Write VHDL code for a people Counter then demonstrate.

  1. At the beginning, LED1-LED8 is turned OFF.
  2. The 3 Seven Segments displaying 000
  3. The DIP Switch defines the increment value.
  4. If you change the DIP switch, the corresponding LED turns on/off
  5. When you push SW1, the 7 segment increments by the number represented by DIP switch. If DPSwitch(0) is '1', then SW1 will increment by 1 If DPSwitch = '00000010', the value increment by 2. if DPSwitch = '00001000', the SW1 press will increment by 8.
  6. SW2 will reset the 7 Segment to 000. "

Xilinx ISE 14.6 is used for the project. It supports Mimas V2 (Spartan 6) FPGA, Speed: -2. Please regenerate the .BIN file before reprogramming FPGA.

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