Fix the uart0 flow control register P0SEL setting in cpu cc253x

contiki-os · Jan 25, 2015 · cd4322c · cd4322c
1 parent 6fb7dd2
commit cd4322c
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/cpu/cc253x/dev/uart0.c b/cpu/cc253x/dev/uart0.c
@@ -39,7 +39,7 @@ uart0_init()
 #else
   PERCFG &= ~PERCFG_U0CFG; /* alternative port 1 = P0.5-2 */
 #ifdef UART0_RTSCTS
-  P0SEL |= 0x20 | 0x10;    /* peripheral select for TX and RX */
+  P0SEL |= 0x3C;    /* peripheral select for RTS and CTS, TX, RX */
 #else
   P0SEL |= 0x0C;    /* peripheral select for TX and RX */
   P0 &= ~0x20;    /* RTS down */