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Asus Z10PE-D8 WS (motherboard); no FTPR modules except BUP? #71
Thanks for making this tool available!
On the two laptop systems,
root@pi64 ~ # python me_cleaner/me_cleaner.py -S original6.rom -O modified6.rom Full image detected The ME/TXE region goes from 0x1000 to 0x800000 Found FPT header at 0x1010 Found 6 partition(s) Found FTPR header: FTPR partition spans from 0x22000 to 0x42000 ME/TXE firmware version 18.104.22.168 Removing extra partitions... Removing extra partition entries in FPT... Removing EFFS presence flag... Correcting checksum (0x4b)... Reading FTPR modules list... BUP (uncomp., 0x02235c - 0x03935c): NOT removed, essential The ME minimum size should be 249856 bytes (0x3d000 bytes) The ME region can be reduced up to: 00001000:0003dfff me Setting the AltMeDisable bit in PCHSTRP10 to disable Intel ME... Checking the FTPR RSA signature... VALID Done! Good luck! root@pi64 ~ # cmp -l original6.rom modified6.rom | wc -l 1048321
Is that what would be expected given this is a server rather than a consumer machine BIOS? At any event the ME appears to have been disabled (see report), and
PS the BIOS image is available for download from Asus' site here. This is a
user@pc $ dd if=Z10PE-D8-WS-ASUS-3304.CAP of=Z10PE-D8-WS-ASUS-3304.rom bs=1024 skip=2
to get the raw
you're trying to disable a SPS firmware, which is officially not supported (yet). Seems to work well in your case though.
Thanks for providing me the link and commands needed to get the rom file (instead of sending me the extracted file, which is not allowed).
From the log I see that the FTPR partition contains only a partition (not removed), however there were 6 partitions, 5 of which have been removed. The ME region is huge (8 MB) however the SPS firmware occupies only the first 1.5 MB, which is not much compared to the other Intel firmware, so I suppose this one is a minimal firmware and it seems resonable that the FTPR partition contains only the BUP module. @platomav is probably more informed than me.
Also consider that me_cleaner removed most of the code, from ~1.5 MB to ~90 kB (but it didn't show it, as it wasn't in the FTPR partition).
Can you try again without the
SPS is built from two modules: Recovery (FTPR) and Operational (OPR). Everything else is generated automatically by Intel's Flash Image Tool. For redundancy, SPS can have Backup regions which are usually copies of the original (MFS & MFSB, OPR1 & OPR2). Little is known about SPS and even less people have systems to test but the general idea is that OPR loads first, if it fails it goes to backup and if that fails, it loads FTPR. OPR can be configured to work either as a simple platform configurator (Silicon Enabling mode) or with Node Manager application (Node Manager mode).
For SPS 3 only, the $FPT has a 2-byte checksum field at the end of its entries which me_cleaner does not adjust currently.
Also, the total Engine region size does not matter because, by default, FIT appends all remaining SPI image padding to the Engine region.
So, other than the SPS3-specific checksum, I don't see anything wrong with me_cleaner's actions.
OK just retried without
Here is the
Here is the
Does that mean the AltMeDisable bit is being ignored on SPS firmware?