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mqnic tx packet loss when using iperf3, 16Gbit test speed with 25Gbps line rate

Status: Open.

#254 In corundum/corundum;

· becauseof86 opened on Feb 6, 2026

How to apply this project to the U45N or SN1000 accelerator card

Status: Open.

#253 In corundum/corundum;

· irven-yin opened on Feb 2, 2026

Is it possible to insert flow steering rules directly into the hardware (NIC), via the mqnic driver

Status: Open.

#252 In corundum/corundum;

· lizajoseph opened on Feb 2, 2026

cmac_usplus IP(s) require licenses greater than a Design Linking license to generate bitstream

Status: Open.

#251 In corundum/corundum;

· irven-yin opened on Jan 21, 2026

TX data can't arrive to FPGA side

Status: Open.

#249 In corundum/corundum;

· wangzhl-code opened on Dec 17, 2025

starting address for the bitstream for u200

Status: Open.

#248 In corundum/corundum;

· yswntht opened on Nov 28, 2025

parameter optimization in terms of AXI ADDR WIDTH

Status: Open.

#247 In corundum/corundum;

· Zyy439 opened on Nov 19, 2025

How to plugin verilog-ethernet in corundum design ?

Status: Open.

#246 In corundum/corundum;

· lizajoseph opened on Nov 13, 2025

kernel panic on mqnic_process_rx_cq

Status: Open.

#245 In corundum/corundum;

· GbGp opened on Oct 14, 2025

How to effectively change the num of TX queues to 8K as suggested? any constraints on FPGA boards?

Status: Open.

#244 In corundum/corundum;

· Winters123 opened on Jun 26, 2025

Alveo U280 network bandwidth

Status: Open.

#243 In corundum/corundum;

· lifeis-hard opened on Jun 19, 2025

In some cases, when PCIE performs Non-Posted Request, CplH exceeds the limit and cannot be recovered.

Status: Open.

#242 In corundum/corundum;

· chen0228 opened on Jun 17, 2025