Skip to content
Magneto was right, side channel is fun.
Python C Makefile Verilog C++ Java Shell
Branch: master
Clone or download
Fetching latest commit…
Cannot retrieve the latest commit at this time.
Type Name Latest commit message Commit time
Failed to load latest commit information.

Side Channels 'n' Stuff

Just for fun

The fuckshitfuck toolkit is a repository of code used for side channel acquisition, preprocessing and analysis, similar to the ChipWhisperer, but written ground-up as an (extremely successful) learning exercise.

Check the acquisition settings, including coupling type and ranges, before you begin capture.

This toolkit comprises:

  • Normal Side Channels:
    • Acquisition:
      • ./, for acquisition from picoscope scopes
      • ./, for acquisition from rigol scopes
      • ./, for pcsc+picoscope acquisition from smartcards
      • ./x/, for chipwhisperer synchronous sampling (broken, PLL input too slow)
    • Preprocessing:
      • ./, for temporal alignment of traces
    • Analysis:
      • ./, a multi-model tool for correlation analysis
      • ./, a multi-model tool for differential analysis
      • ./, a simple matplotlib-based tool to view sets of traces
      • ./, an implementation of non-specific welch's t-test leak detector
  • Keyboards:
    • ./keyboards-em/, an EM leakage capture tool
    • ./, which forms a training npy out of captured samples
    • ./, which matches training data against an input sample
    • ./, a tool for plotting a single trace
    • ./, a tool for plotting multiple overlaid traces

Note the correlation and differential analysis front-ends are now decoupled from the leakage modelling back-ends - models can be found in support/ and typically do not need to be changed to analyze traces using different leakage hypotheses.

Some test targets are provided in target/ and pictarget-3.X/

The code is provided as-is, pull requests and feature requests are welcome.

You can’t perform that action at this time.