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use existing clock delta when coming out of reset

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csboling committed Aug 8, 2019
1 parent d1b2017 commit a108fad485390cd0966d65a47e673a23394b8b71
Showing with 2 additions and 1 deletion.
  1. +2 −1 src/ansible_grid.c
@@ -848,17 +848,18 @@ void clock_kria(uint8_t phase) {

if(pos_reset) {
clock_count = 0;
u64 current_tick = get_ticks();
for(int i1=0;i1<KRIA_NUM_TRACKS;i1++)
for(int i2=0;i2<KRIA_NUM_PARAMS;i2++) {
pos[i1][i2] = k.p[k.pattern].t[i1].lend[i2];
pos_mul[i1][i2] = k.p[k.pattern].t[i1].tmul[i2];
last_ticks[i1] = current_tick - clock_deltas[i1];
}
cue_count = 0;
cue_sub_count = 0;
pos_reset = false;
}


for ( uint8_t i=0; i<KRIA_NUM_TRACKS; i++ )
{
if ( !k.p[k.pattern].t[i].tt_clocked )

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