From 5a7e2151772eda824d5e3388d0960cef541feb9a Mon Sep 17 00:00:00 2001 From: xqyjlj Date: Mon, 17 Nov 2025 11:29:57 +0800 Subject: [PATCH 1/4] =?UTF-8?q?=F0=9F=93=83=20docs:=20=E6=9B=B4=E6=96=B0?= =?UTF-8?q?=20logo=20url?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: xqyjlj --- README-zh_CN.md | 2 +- README.md | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/README-zh_CN.md b/README-zh_CN.md index 35201ae..073d34d 100644 --- a/README-zh_CN.md +++ b/README-zh_CN.md @@ -1,6 +1,6 @@
- logo + logo

CSP HAL APM32F1

diff --git a/README.md b/README.md index 3e81c3c..6d42e50 100644 --- a/README.md +++ b/README.md @@ -1,6 +1,6 @@
- logo + logo

CSP HAL APM32F1

From c0feaf655d2593b7cfc7ca4b07e05364ecfe62a0 Mon Sep 17 00:00:00 2001 From: xqyjlj Date: Tue, 18 Nov 2025 16:30:38 +0800 Subject: [PATCH 2/4] =?UTF-8?q?=E2=9C=A8=20feat:=20=E9=80=82=E9=85=8D?= =?UTF-8?q?=E8=87=B3csp=20v0.1.1?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: xqyjlj --- README-zh_CN.md => README-zh-cn.md | 0 README.md | 2 +- csp_hal_apm32f1.csppdsc | 8 +- tools/deploy.sh | 38 - tools/generator/filters/builder.py | 39 +- tools/generator/filters/chip.py | 31 +- tools/generator/filters/crc.py | 48 + tools/generator/filters/gpio.py | 496 +++++++--- tools/generator/filters/iwdt.py | 87 ++ tools/generator/filters/rcm.py | 868 +++++++++++++----- tools/generator/filters/sys.py | 171 ++++ tools/generator/filters/uart.py | 284 ++++++ tools/generator/filters/usart.py | 433 +++++++++ tools/generator/filters/wwdt.py | 103 +++ tools/generator/generator.py | 151 ++- tools/generator/resource/chip_info.yaml | 35 - tools/generator/resource/template.uvprojx | 383 ++++++++ tools/generator/templates/.gitignore.j2 | 72 ++ tools/generator/templates/CMakeLists.txt.j2 | 151 ++- .../{startup_armcc.s.j2 => crc.c.j2} | 21 +- tools/generator/templates/crc.h.j2 | 38 + tools/generator/templates/gpio.c.j2 | 93 +- tools/generator/templates/gpio.h.j2 | 21 +- tools/generator/templates/isr.c.j2 | 36 + tools/generator/templates/isr_vector.c.j2 | 706 -------------- tools/generator/templates/iwdt.c.j2 | 46 + tools/generator/templates/iwdt.h.j2 | 38 + .../generator/templates/linker_script.lds.j2 | 28 +- tools/generator/templates/main.c.j2 | 37 +- tools/generator/templates/main.h.j2 | 6 +- tools/generator/templates/rcm.c.j2 | 88 +- tools/generator/templates/rcm.h.j2 | 11 +- tools/generator/templates/startup_arm.s.j2 | 690 ++++++++++++++ tools/generator/templates/startup_gcc.S.j2 | 793 +++++++++++++++- tools/generator/templates/startup_iar.s.j2 | 4 +- tools/generator/templates/sys.c.j2 | 43 + tools/generator/templates/sys.h.j2 | 38 + .../generator/templates/system_apm32f10x.c.j2 | 13 +- tools/generator/templates/uart.c.j2 | 118 +++ tools/generator/templates/uart.h.j2 | 59 ++ tools/generator/templates/usart.c.j2 | 155 ++++ tools/generator/templates/usart.h.j2 | 60 ++ tools/generator/templates/wwdt.c.j2 | 46 + tools/generator/templates/wwdt.h.j2 | 39 + tools/generator/templates/xmake.lua.j2 | 63 +- 45 files changed, 5272 insertions(+), 1418 deletions(-) rename README-zh_CN.md => README-zh-cn.md (100%) delete mode 100755 tools/deploy.sh create mode 100644 tools/generator/filters/crc.py create mode 100644 tools/generator/filters/iwdt.py create mode 100644 tools/generator/filters/sys.py create mode 100644 tools/generator/filters/uart.py create mode 100644 tools/generator/filters/usart.py create mode 100644 tools/generator/filters/wwdt.py delete mode 100644 tools/generator/resource/chip_info.yaml create mode 100644 tools/generator/resource/template.uvprojx create mode 100644 tools/generator/templates/.gitignore.j2 rename tools/generator/templates/{startup_armcc.s.j2 => crc.c.j2} (55%) create mode 100644 tools/generator/templates/crc.h.j2 create mode 100644 tools/generator/templates/isr.c.j2 delete mode 100644 tools/generator/templates/isr_vector.c.j2 create mode 100644 tools/generator/templates/iwdt.c.j2 create mode 100644 tools/generator/templates/iwdt.h.j2 create mode 100644 tools/generator/templates/startup_arm.s.j2 create mode 100644 tools/generator/templates/sys.c.j2 create mode 100644 tools/generator/templates/sys.h.j2 create mode 100644 tools/generator/templates/uart.c.j2 create mode 100644 tools/generator/templates/uart.h.j2 create mode 100644 tools/generator/templates/usart.c.j2 create mode 100644 tools/generator/templates/usart.h.j2 create mode 100644 tools/generator/templates/wwdt.c.j2 create mode 100644 tools/generator/templates/wwdt.h.j2 diff --git a/README-zh_CN.md b/README-zh-cn.md similarity index 100% rename from README-zh_CN.md rename to README-zh-cn.md diff --git a/README.md b/README.md index 6d42e50..a9b3451 100644 --- a/README.md +++ b/README.md @@ -43,7 +43,7 @@ Chip Support Package for APM32F1 Series.
-**English** | [中文](README-zh_CN.md) +**English** | [中文](README-zh-cn.md) ## ✨ Features diff --git a/csp_hal_apm32f1.csppdsc b/csp_hal_apm32f1.csppdsc index e09bdfb..7033ebb 100644 --- a/csp_hal_apm32f1.csppdsc +++ b/csp_hal_apm32f1.csppdsc @@ -11,11 +11,11 @@ type: hal vendor: Geehy vendorUrl: en: https://geehy.com - zh_CN: https://geehy.com + zh-cn: https://geehy.com description: en: Chip Support Package for APM32F1 for CSP Software - zh_CN: Chip Support Package for APM32F1 for CSP Software + zh-cn: APM32F1芯片支持包 url: - en: https://geehy.com - zh_CN: https://geehy.com + en: https://github.com/csplink/csp_hal_apm32f1 + zh-cn: https://github.com/csplink/csp_hal_apm32f1 support: xqyjlj@126.com diff --git a/tools/deploy.sh b/tools/deploy.sh deleted file mode 100755 index e071f5e..0000000 --- a/tools/deploy.sh +++ /dev/null @@ -1,38 +0,0 @@ -#!/bin/bash - -# Licensed under the GNU General Public License v. 3 (the "License") -# You may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# https://www.gnu.org/licenses/gpl-3.0.html -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -# Copyright (C) 2025-2025 xqyjlj -# -# @author xqyjlj -# @file deploy.sh -# -# Change Logs: -# Date Author Notes -# ------------ ---------- ----------------------------------------------- -# 2025-01-19 xqyjlj initial version -# - -script_dir="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)" - -function deploy { - path=${1} - - pushd "${script_dir}"/.. - - rm -rfv ${path} - mkdir -pv ${path} - rsync -av --exclude='.git' --exclude=${path} . ${path}/ - - popd -} diff --git a/tools/generator/filters/builder.py b/tools/generator/filters/builder.py index 6519074..c389e79 100644 --- a/tools/generator/filters/builder.py +++ b/tools/generator/filters/builder.py @@ -1,11 +1,11 @@ #!/usr/bin/env python3 # -*- coding:utf-8 -*- -# Licensed under the GNU General Public License v. 3 (the "License") +# Licensed under the Apache License v. 2 (the "License") # You may not use this file except in compliance with the License. # You may obtain a copy of the License at # -# https://www.gnu.org/licenses/gpl-3.0.html +# https://www.apache.org/licenses/LICENSE-2.0.html # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, @@ -13,7 +13,7 @@ # See the License for the specific language governing permissions and # limitations under the License. # -# Copyright (C) 2024-2024 xqyjlj +# Copyright (C) 2025-2025 xqyjlj # # @author xqyjlj # @file builder.py @@ -26,7 +26,8 @@ import copy -import chip +from csp.project import Project +import filters.chip as chip inc_dirs = [ "core/inc", @@ -36,8 +37,9 @@ ] src_files_group = { - "application/user/core": [ + "application/core": [ "core/src/main.c", + "core/src/isr.c", ], "std_drivers/hal": [ "hal/libraries/std_drivers/src/apm32f10x_adc.c", @@ -77,21 +79,29 @@ } -def builder_defines(project: dict) -> list[str]: +def builder_defines(project: Project) -> list[str]: cl = chip.chip_info(project) li = [cl["class"]] return li -def builder_inc_dirs(project: dict) -> list: +def builder_inc_dirs(project: Project) -> list: return inc_dirs -def builder_src_files_group(project: dict) -> dict: +def builder_src_files_group(project: Project) -> dict: group = copy.deepcopy(src_files_group) - for module in project["modules"]: - group["application/user/core"].append(f"core/src/{module.lower()}.c") + builder = project.gen.builder + toolchains = project.gen.toolchains + + if builder == "MDK-Arm": + group["application/core"].append("startup_arm.s") + elif toolchains == "arm-none-eabi": + group["application/core"].append("startup_gcc.S") + + for module in project.modules: + group["application/core"].append(f"core/src/{module.lower()}.c") for key in group.keys(): group[key].sort() @@ -99,7 +109,7 @@ def builder_src_files_group(project: dict) -> dict: return group -def builder_src_files(project: dict) -> list: +def builder_src_files(project: Project) -> list: files = [] for _, value in builder_src_files_group(project).items(): @@ -109,10 +119,3 @@ def builder_src_files(project: dict) -> list: files.sort() return files - - -def builder_startup_file(project: dict) -> str: - toolchains = project.get("gen", {}).get("toolchains", '') - if toolchains == 'arm-none-eabi': - return "startup_gcc.S" - return "None" diff --git a/tools/generator/filters/chip.py b/tools/generator/filters/chip.py index 49236b0..43443e2 100644 --- a/tools/generator/filters/chip.py +++ b/tools/generator/filters/chip.py @@ -1,11 +1,11 @@ #!/usr/bin/env python3 # -*- coding:utf-8 -*- -# Licensed under the GNU General Public License v. 3 (the "License") +# Licensed under the Apache License v. 2 (the "License") # You may not use this file except in compliance with the License. # You may obtain a copy of the License at # -# https://www.gnu.org/licenses/gpl-3.0.html +# https://www.apache.org/licenses/LICENSE-2.0.html # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, @@ -25,15 +25,28 @@ # -import os +from csp.project import Project -import yaml -__resourceDir = os.path.join(os.path.dirname(__file__), "..", "resource") +APM32F10xxE = { + "flash": { + "addr": 0x08000000, + "size": 0x0080000, + }, + "ram": { + "addr": 0x20000000, + "size": 0x00020000, + }, +} +infos = { + "APM32F103ZET6": { + **APM32F10xxE, + "class": "APM32F10X_HD", + "line": "APM32F103ZE", + } +} -def chip_info(project: dict) -> dict: - with open(os.path.join(__resourceDir, "chip_info.yaml"), "r") as f: - infos = yaml.load(f.read(), Loader=yaml.FullLoader) - return infos[project['targetChip']] +def chip_info(project: Project) -> dict: + return infos[project.targetChip] diff --git a/tools/generator/filters/crc.py b/tools/generator/filters/crc.py new file mode 100644 index 0000000..178c595 --- /dev/null +++ b/tools/generator/filters/crc.py @@ -0,0 +1,48 @@ +#!/usr/bin/env python3 +# -*- coding:utf-8 -*- + +# +# ------------------------------------------------------------------------------ +# @author: csplink coder +# @file: crc.py +# @version: 0.0.6 +# @time: 2025-11-14 15:39:27 +# +# ------------------------------------------------------------------------------ +# @attention +# +# Copyright (C) 2025 csplink software. +# All rights reserved. +# +# ------------------------------------------------------------------------------ +# + +from typing import Literal + +from csp.project import Project + +# --< user code begin import, do not change this comment! +# isort: off + +# isort: on +# --> user code end import, do not change this comment! + +# ------------------------------------------------------------------------------ +# region autogen filters +# fmt: off + +def crc_ctrl_state_t( + project: Project, + instance: str = "CRC", + default: bool = False, +) -> bool: + return project.configs.get(f"{instance}.crc_ctrl_state_t", default) + + +# fmt: on +# endregion +# ------------------------------------------------------------------------------ + +# --< user code begin code, do not change this comment! + +# --> user code end code, do not change this comment! diff --git a/tools/generator/filters/gpio.py b/tools/generator/filters/gpio.py index 14f6f07..254464a 100644 --- a/tools/generator/filters/gpio.py +++ b/tools/generator/filters/gpio.py @@ -1,65 +1,195 @@ #!/usr/bin/env python3 # -*- coding:utf-8 -*- -# Licensed under the GNU General Public License v. 3 (the "License") -# You may not use this file except in compliance with the License. -# You may obtain a copy of the License at # -# https://www.gnu.org/licenses/gpl-3.0.html +# ------------------------------------------------------------------------------ +# @author: csplink coder +# @file: gpio.py +# @version: 0.0.6 +# @time: 2025-11-15 17:54:10 # -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. +# ------------------------------------------------------------------------------ +# @attention # -# Copyright (C) 2022-2024 xqyjlj +# Copyright (C) 2025 csplink software. +# All rights reserved. # -# @author xqyjlj -# @file gpio.py -# -# Change Logs: -# Date Author Notes -# ------------ ---------- ----------------------------------------------- -# 2024-05-31 xqyjlj initial version +# ------------------------------------------------------------------------------ # +from typing import Literal + +from csp.project import Project + +# --< user code begin import, do not change this comment! +# isort: off import json +# isort: on +# --> user code end import, do not change this comment! + +# ------------------------------------------------------------------------------ +# region autogen filters +# fmt: off + +_gpio_mode_t_return_type = Literal[ + "af_od", + "af_pp", + "analog", + "evt_falling", + "evt_rising", + "evt_rising_falling", + "input", + "it_falling", + "it_rising", + "it_rising_falling", + "output_od", + "output_pp", +] + + +_gpio_pull_t_return_type = Literal[ + "nopull", + "pulldown", + "pullup", +] -def __hash_dict(dictionary) -> int: - json_str = json.dumps(dictionary, sort_keys=True) - return hash(json_str) + +_gpio_speed_t_return_type = Literal[ + "high", + "low", + "medium", +] + + +_gpio_state_t_return_type = Literal[ + "reset", + "set", +] + + +def gpio_mode_t( + project: Project, + channel: str, + instance: str = "GPIO", + default: _gpio_mode_t_return_type = "input", +) -> _gpio_mode_t_return_type: + return project.configs.get(f"{instance}.{channel}.gpio_mode_t", default) + + +def gpio_pull_t( + project: Project, + channel: str, + instance: str = "GPIO", + default: _gpio_pull_t_return_type = "nopull", +) -> _gpio_pull_t_return_type: + return project.configs.get(f"{instance}.{channel}.gpio_pull_t", default) + + +def gpio_speed_t( + project: Project, + channel: str, + instance: str = "GPIO", + default: _gpio_speed_t_return_type = "low", +) -> _gpio_speed_t_return_type: + return project.configs.get(f"{instance}.{channel}.gpio_speed_t", default) + + +def gpio_state_t( + project: Project, + channel: str, + instance: str = "GPIO", + default: _gpio_state_t_return_type = "reset", +) -> _gpio_state_t_return_type: + return project.configs.get(f"{instance}.{channel}.gpio_state_t", default) -def __pin_config(project: dict) -> dict[str, dict[str, str]]: - return project["configs"]["pin"] +def gpio_channels( + project: Project, + instance: str = "GPIO", +) -> list[str]: + return list(project.configs.get(instance, {}).keys()) -def __gpio_config(project: dict) -> dict[str, dict[str, str]]: - return project["configs"]["GPIO"] +def pin_function( + project: Project, + channel: str, + default: str = "", +) -> str: + return project.configs.get(f"pins.{channel}.function", default) -def gpio_pin_names(project: dict) -> list[str]: +def pin_label( + project: Project, + channel: str, + default: str = "", +) -> str: + return project.configs.get(f"pins.{channel}.label", default) + + +def pin_locked( + project: Project, + channel: str, + default: bool = False, +) -> bool: + return project.configs.get(f"pins.{channel}.locked", default) + + +def pin_mode( + project: Project, + channel: str, + default: str = "", +) -> str: + return project.configs.get(f"pins.{channel}.mode", default) + + +def pin_channels( + project: Project, +) -> str: + return list(project.configs.get("pins", {}).keys()) + + +# fmt: on +# endregion +# ------------------------------------------------------------------------------ + + +# --< user code begin code, do not change this comment! +def __hash_dict(dictionary) -> int: + json_str = json.dumps(dictionary, sort_keys=True) + return hash(json_str) + + +def gpio_used_channels(project: Project) -> list[str]: pins = [] - for key, value in __pin_config(project).items(): - if value.get("locked", False) and len(value.get("function", "")) != 0 and not key.startswith( - 'RCM-') and not value.get("unsupported", False): - pins.append(key) + channels = gpio_channels(project) + for channel in channels: + locked = pin_locked(project, channel) + function = pin_function(project, channel) + mode = pin_mode(project, channel) + + if ( + locked # locked == True + and len(function) != 0 # function != "" + and not channel.startswith("RCM-") # name startswith "RCM-" + and len(mode) == 0 # mode == "" + ): + pins.append(channel) pins.sort() return pins -def gpio_clocks(project: dict) -> list[str]: +def gpio_used_clocks(project: Project) -> list[str]: clocks = [] - pins = gpio_pin_names(project) - for pin in pins: - clocks.append(f"RCM_APB2_PERIPH_GPIO{str(pin[1]).upper()}") - if __pin_config(project)[pin].get("function", "") == "GPIO:EXTI": + channels = gpio_used_channels(project) + for channel in channels: + clocks.append(f"RCM_APB2_PERIPH_GPIO{str(channel[1]).upper()}") + function = pin_function(project, channel) + if function == "GPIO:EXTI": clocks.append(f"RCM_APB2_PERIPH_AFIO") - elif __pin_config(project)[pin].get("function", "") == "GPIO:EVENTOUT": + elif function == "GPIO:EVENTOUT": clocks.append(f"RCM_APB2_PERIPH_AFIO") clocks = list(set(clocks)) @@ -68,10 +198,9 @@ def gpio_clocks(project: dict) -> list[str]: return clocks -def gpio_clock_names(project: dict) -> list[str]: +def gpio_clocks_to_alias(clocks: list[str]) -> list[str]: names = [] - clocks = gpio_clocks(project) for clock in clocks: names.append(clock.replace("RCM_APB2_PERIPH_", "")) @@ -80,26 +209,46 @@ def gpio_clock_names(project: dict) -> list[str]: return names -def gpio_ports(project: dict) -> list[str]: - ports = [] +def gpio_channel_to_clock(channel: str) -> str: + return f"RCM_APB2_PERIPH_GPIO{str(channel[1]).upper()}" - pins = gpio_pin_names(project) - for pin in pins: - ports.append(f"GPIO{str(pin[1]).upper()}") - ports = list(set(ports)) - ports.sort() +def gpio_channel_to_port(channel: str) -> str: + return f"GPIO{str(channel[1]).upper()}" - return ports + +def gpio_channel_to_port_source(channel: str) -> str: + return f"GPIO_PORT_SOURCE_{str(channel[1]).upper()}" + + +def gpio_channel_to_pin(channel: str) -> str: + return f"GPIO_PIN_{channel[2:]}" + + +def gpio_channel_to_pin_source(channel: str) -> str: + return f"GPIO_PIN_SOURCE_{channel[2:]}" + + +def gpio_channel_to_eint_line(channel: str) -> str: + return f"EINT_LINE_{channel[2:]}" + + +def gpio_channels_to_pins(channels: list[str]) -> list[str]: + pins = [] + + for channel in channels: + pins.append(gpio_channel_to_pin(channel)) + + pins.sort() + + return pins -def gpio_pins_by_port(project: dict, port: str) -> list[str]: +def gpio_used_ports(channels: list[str]) -> list[str]: ports = [] - pins = gpio_pin_names(project) - for pin in pins: - if port[4] == pin[1]: - ports.append(f"GPIO_PIN_{pin[2:]}") + for channel in channels: + ports.append(gpio_channel_to_port(channel)) ports = list(set(ports)) ports.sort() @@ -107,140 +256,189 @@ def gpio_pins_by_port(project: dict, port: str) -> list[str]: return ports -def gpio_pin_groups_by_port(project: dict, port: str) -> list[list[str]]: - pin_groups_map = {} - pin_groups = [] - pins = gpio_pin_names(project) - for pin in pins: +def gpio_channels_group_by_port( + project: Project, channels: list[str], port: str +) -> list[list[str]]: + channels_group_map: dict[str, list[str]] = {} + channels_group = [] + for channel in channels: config = {} - if port[4] == pin[1]: - config["function"] = __pin_config(project)[pin].get("function", "") - config["config"] = __gpio_config(project)[pin] + if port[4] == channel[1]: + config["function"] = pin_function(project, channel) + config["gpio_mode_t"] = gpio_mode_t(project, channel) + config["gpio_pull_t"] = gpio_pull_t(project, channel) + config["gpio_speed_t"] = gpio_speed_t(project, channel) # group according to different configurations, pins with the same configuration are in the same group hash_str = __hash_dict(config) - if not hash_str in pin_groups_map: - pin_groups_map[hash_str] = [f"GPIO_PIN_{pin[2:]}"] + if not hash_str in channels_group_map: + channels_group_map[hash_str] = [channel] else: - pin_groups_map[hash_str].append(f"GPIO_PIN_{pin[2:]}") + channels_group_map[hash_str].append(channel) - for _, value in pin_groups_map.items(): + for _, value in channels_group_map.items(): group = list(set(value)) group.sort() - pin_groups.append(group) + channels_group.append(group) - pin_groups.sort() + channels_group.sort() - return pin_groups + return channels_group -def gpio_pin_alias(project: dict, port: str, pin: str) -> str: - pin_name = f'P{port.replace("GPIO", "")}{pin.replace("GPIO_PIN_", "")}' - alias = __pin_config(project)[pin_name].get("label", None) +def gpio_channel_alias(project: Project, channel: str) -> str: + return pin_label(project, channel) - return alias - -def gpio_pin_level(project: dict, port: str, pin: str) -> str | None: - level_map = { - "geehy.gpio_level_low": "BIT_RESET", - "geehy.gpio_level_high": "BIT_SET", +def gpio_channel_state(project: Project, channel: str) -> str | None: + state_map = { + "reset": "BIT_RESET", + "set": "BIT_SET", } - pin_name = f'P{port.replace("GPIO", "")}{pin.replace("GPIO_PIN_", "")}' - gpio_config = __gpio_config(project).get(pin_name, {}) - - if not "geehy.gpio_level_t" in gpio_config: - return None + state = gpio_state_t(project, channel) - return level_map[gpio_config["geehy.gpio_level_t"]] + return state_map[state] -def gpio_pin_level_map(project: dict, port: str, pins: list) -> dict: - if not gpio_pin_level(project, port, pins[0]): - return {} - level_groups_map = {} +def gpio_channels_classify_by_state( + project: Project, channels: list +) -> dict[str, list[str]]: + if not gpio_channel_state(project, channels[0]): + return {} # 代表这组通道并非输出类型的 + state_groups_map: dict[str, list[str]] = {} - for pin in pins: - level = gpio_pin_level(project, port, pin) - if not level in level_groups_map: - level_groups_map[level] = [pin] + for channel in channels: + state = gpio_channel_state(project, channel) + if not state in state_groups_map: + state_groups_map[state] = [channel] else: - level_groups_map[level].append(pin) + state_groups_map[state].append(channel) + + for level_groups in state_groups_map.keys(): + state_groups_map[level_groups].sort() + + return state_groups_map + + +def gpio_channel_mode(project: Project, channel: str) -> str: + mode = gpio_mode_t(project, channel) + pull = gpio_pull_t(project, channel) + + result = "" + + if mode in [ + "input", + "it_rising", + "it_falling", + "it_rising_falling", + "evt_rising", + "evt_falling", + "evt_rising_falling", + ]: + if pull == "nopull": + result = "GPIO_MODE_IN_FLOATING" + elif pull == "pullup": + result = "GPIO_MODE_IN_PU" + elif pull == "pulldown": + result = "GPIO_MODE_IN_PD" + elif mode == "output_pp": + result = "GPIO_MODE_OUT_PP" + elif mode == "output_od": + result = "GPIO_MODE_OUT_OD" + elif mode == "af_pp": + result = "GPIO_MODE_AF_PP" + elif mode == "af_od": + result = "GPIO_MODE_AF_OD" + elif mode == "analog": + result = "GPIO_MODE_ANALOG" + + assert result != "", f"failed to get gpio mode, {mode!r}, {pull!r}" + + return result + + +def gpio_channel_speed(project: Project, channel: str) -> str: + speed_map = { + "low": "GPIO_SPEED_2MHz", + "medium": "GPIO_SPEED_10MHz", + "high": "GPIO_SPEED_50MHz", + } - for level_groups in level_groups_map.keys(): - level_groups_map[level_groups].sort() + speed = gpio_speed_t(project, channel, default="") + if speed == "": + return "" - return level_groups_map + return speed_map[speed] -def gpio_pin_mode(project: dict, port: str, pin: str) -> str: - output_mode_map = { - "geehy.gpio_output_pp": "GPIO_MODE_OUT_PP", - "geehy.gpio_output_od": "GPIO_MODE_OUT_OD", - } - input_mode_map = { - "geehy.gpio_pull_up": "GPIO_MODE_IN_PU", - "geehy.gpio_pull_down": "GPIO_MODE_IN_PD", - "geehy.gpio_pull_no": "GPIO_MODE_IN_FLOATING", - } - analog_mode_map = { - "geehy.gpio_mode_analog": "GPIO_MODE_ANALOG", - } - alternate_mode_map = { - "geehy.gpio_output_pp": "GPIO_MODE_AF_PP", - "geehy.gpio_output_od": "GPIO_MODE_AF_OD", - } +def gpio_channel_eint_mode(project: Project, channel: str) -> str: + mode = gpio_mode_t(project, channel) + result = "" - pin_name = f'P{port.replace("GPIO", "")}{pin.replace("GPIO_PIN_", "")}' - function = __pin_config(project).get(pin_name, {}).get("function", "") - gpio_config = __gpio_config(project).get(pin_name, {}) + if mode in [ + "it_rising", + "it_falling", + "it_rising_falling", + ]: + result = "EINT_MODE_INTERRUPT" + elif mode in [ + "evt_rising", + "evt_falling", + "evt_rising_falling", + ]: + result = "EINT_MODE_EVENT" - if function == "GPIO:Output": - mode = output_mode_map[gpio_config["geehy.gpio_output_type_t"]] - elif function == "GPIO:Analog": - mode = analog_mode_map[gpio_config["geehy.gpio_mode_t"]] - elif function == "GPIO:Input": - mode = input_mode_map[gpio_config["geehy.gpio_pull_t"]] - elif function == "GPIO:EXTI": - mode = input_mode_map[gpio_config["geehy.gpio_pull_t"]] - elif function == "GPIO:EVENTOUT": - mode = alternate_mode_map[gpio_config["geehy.gpio_output_type_t"]] - else: - mode = "_N_O_N_E_ /** error: Unexpected Error. */" + assert result != "", f"failed to get gpio eint mode, {mode!r}" - return mode + return result -def gpio_pin_speed(project: dict, port: str, pin: str) -> str: - speed_map = { - "geehy.gpio_speed_2mhz": "GPIO_SPEED_2MHz", - "geehy.gpio_speed_10mhz": "GPIO_SPEED_10MHz", - "geehy.gpio_speed_50mhz": "GPIO_SPEED_50MHz", - } +def gpio_channel_eint_trigger(project: Project, channel: str) -> str: + mode = gpio_mode_t(project, channel) + result = "" - pin_name = f'P{port.replace("GPIO", "")}{pin.replace("GPIO_PIN_", "")}' - gpio_config = __gpio_config(project).get(pin_name, {}) + if mode in [ + "it_rising", + "evt_rising", + ]: + result = "EINT_TRIGGER_RISING" + elif mode in [ + "it_falling", + "evt_falling", + ]: + result = "EINT_TRIGGER_FALLING" + elif mode in [ + "it_rising_falling", + "evt_rising_falling", + ]: + result = "EINT_TRIGGER_RISING_FALLING" - if not "geehy.gpio_speed_t" in gpio_config: - return "" + assert result != "", f"failed to get gpio eint trigger, {mode!r}" + + return result + + +def gpio_eventout_channels(project: Project, channels: list[str]) -> list[str]: + result = [] + + for channel in channels: + function = pin_function(project, channel) + if function == "GPIO:EVENTOUT": + result.append(channel) + + return result - return speed_map[gpio_config["geehy.gpio_speed_t"]] +def gpio_eint_channels(project: Project, channels: list[str]) -> list[str]: + result = [] -def gpio_eventout(project: dict) -> dict[str, list[str]]: - eventout = {} + for channel in channels: + function = pin_function(project, channel) + if function.startswith("GPIO:EINT"): + result.append(channel) - ports = gpio_ports(project) + return result - for port in ports: - pins = gpio_pins_by_port(project, port) - for pin in pins: - pin_name = f'P{port.replace("GPIO", "")}{pin.replace("GPIO_PIN_", "")}' - function = __pin_config(project).get(pin_name, {}).get("function", "") - if function == "GPIO:EVENTOUT": - if eventout.get(port) is None: - eventout[port] = [] - eventout[port].append(pin) - return eventout +# --> user code end code, do not change this comment! diff --git a/tools/generator/filters/iwdt.py b/tools/generator/filters/iwdt.py new file mode 100644 index 0000000..17770fe --- /dev/null +++ b/tools/generator/filters/iwdt.py @@ -0,0 +1,87 @@ +#!/usr/bin/env python3 +# -*- coding:utf-8 -*- + +# +# ------------------------------------------------------------------------------ +# @author: csplink coder +# @file: iwdt.py +# @version: 0.0.6 +# @time: 2025-11-14 15:38:42 +# +# ------------------------------------------------------------------------------ +# @attention +# +# Copyright (C) 2025 csplink software. +# All rights reserved. +# +# ------------------------------------------------------------------------------ +# + +from typing import Literal + +from csp.project import Project + +# --< user code begin import, do not change this comment! +# isort: off + +# isort: on +# --> user code end import, do not change this comment! + +# ------------------------------------------------------------------------------ +# region autogen filters +# fmt: off + +_iwdt_prescaler_t_return_type = Literal[ + "/128", + "/16", + "/256", + "/32", + "/4", + "/64", + "/8", +] + + +def iwdt_prescaler_t( + project: Project, + instance: str = "IWDT", + default: _iwdt_prescaler_t_return_type = "/4", +) -> _iwdt_prescaler_t_return_type: + return project.configs.get(f"{instance}.iwdt_prescaler_t", default) + + +def iwdt_reload_t( + project: Project, + instance: str = "IWDT", + default: int = 4095, +) -> int: + return project.configs.get(f"{instance}.iwdt_reload_t", default) + + +def iwdt_ctrl_state_t( + project: Project, + instance: str = "IWDT", + default: bool = False, +) -> bool: + return project.configs.get(f"{instance}.iwdt_ctrl_state_t", default) + + +# fmt: on +# endregion +# ------------------------------------------------------------------------------ + +# --< user code begin code, do not change this comment! +def iwdt_prescaler(project: Project) -> str: + m = { + "/4": "IWDT_DIVIDER_4", + "/8": "IWDT_DIVIDER_8", + "/16": "IWDT_DIVIDER_16", + "/32": "IWDT_DIVIDER_32", + "/64": "IWDT_DIVIDER_64", + "/128": "IWDT_DIVIDER_128", + "/256": "IWDT_DIVIDER_256", + } + + prescaler = iwdt_prescaler_t(project) + return m[prescaler] +# --> user code end code, do not change this comment! diff --git a/tools/generator/filters/rcm.py b/tools/generator/filters/rcm.py index 0cca8b8..d836b21 100644 --- a/tools/generator/filters/rcm.py +++ b/tools/generator/filters/rcm.py @@ -1,350 +1,746 @@ #!/usr/bin/env python3 # -*- coding:utf-8 -*- -# Licensed under the GNU General Public License v. 3 (the "License") -# You may not use this file except in compliance with the License. -# You may obtain a copy of the License at # -# https://www.gnu.org/licenses/gpl-3.0.html -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. +# ------------------------------------------------------------------------------ +# @author: csplink coder +# @file: rcm.py +# @version: 0.0.6 +# @time: 2025-11-14 15:39:42 # -# Copyright (C) 2024-2024 xqyjlj +# ------------------------------------------------------------------------------ +# @attention # -# @author xqyjlj -# @file rcm.py +# Copyright (C) 2025 csplink software. +# All rights reserved. # -# Change Logs: -# Date Author Notes -# ------------ ---------- ----------------------------------------------- -# 2024-12-27 xqyjlj initial version +# ------------------------------------------------------------------------------ # -import csp_project_helper +from typing import Literal +from csp.project import Project + +# --< user code begin import, do not change this comment! +# isort: off + +# isort: on +# --> user code end import, do not change this comment! # ------------------------------------------------------------------------------ -def rcm_adc_clk_div_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_adc_clk_div_t', default) +# region autogen filters +# fmt: off +_rcm_hse_clk_div_rtc_t_return_type = Literal[ + "/128", +] + + +_rcm_rtc_clk_mux_t_return_type = Literal[ + "hse_div128", + "lse", + "lsi", +] -def rcm_adc_clk_out_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_adc_clk_out_t', default) +_rcm_system_clk_mux_t_return_type = Literal[ + "hse", + "hsi", + "pll", +] + + +_rcm_pll_clk_mux_t_return_type = Literal[ + "hse", + "hsi_div2", +] -def rcm_ahb_div_sdio_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_ahb_div_sdio_t', default) +_rcm_mco_clk_mux_t_return_type = Literal[ + "hse", + "hsi", + "pll_div2", + "system", +] + + +_rcm_hsi_clk_div_pll_t_return_type = Literal[ + "2", +] -def rcm_ahb_div_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_ahb_div_t', default) +_rcm_hse_clk_div_pll_t_return_type = Literal[ + "/1", + "/2", +] -def rcm_apb1_div_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_apb1_div_t', default) +_rcm_pll_clk_mul_t_return_type = Literal[ + "*10", + "*11", + "*12", + "*13", + "*14", + "*15", + "*16", + "*2", + "*3", + "*4", + "*5", + "*6", + "*7", + "*8", + "*9", +] -def rcm_apb1_peripherals_out_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_apb1_peripherals_out_t', default) +_rcm_ahb_clk_div_hclk_t_return_type = Literal[ + "/1", + "/128", + "/16", + "/2", + "/256", + "/4", + "/512", + "/64", + "/8", +] -def rcm_apb1_timers_mul_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_apb1_timers_mul_t', default) +_rcm_hclk_div_sys_timer_clk_t_return_type = Literal[ + "/1", + "/8", +] -def rcm_apb1_timers_out_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_apb1_timers_out_t', default) +_rcm_apb1_div_t_return_type = Literal[ + "/1", + "/16", + "/2", + "/4", + "/8", +] -def rcm_apb2_div_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_apb2_div_t', default) +_rcm_apb1_timers_mul_t_return_type = Literal[ + "*1", + "*2", +] -def rcm_apb2_peripherals_out_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_apb2_peripherals_out_t', default) +_rcm_apb2_div_t_return_type = Literal[ + "/1", + "/16", + "/2", + "/4", + "/8", +] -def rcm_apb2_timers_mul_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_apb2_timers_mul_t', default) +_rcm_apb2_timers_mul_t_return_type = Literal[ + "*1", + "*2", +] -def rcm_apb2_timers_out_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_apb2_timers_out_t', default) +_rcm_adc_clk_div_t_return_type = Literal[ + "/1", + "/16", + "/2", + "/4", + "/8", +] -def rcm_css_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_css_t', default) +_rcm_fpu_clk_div_t_return_type = Literal[ + "/1", + "/2", +] -def rcm_emmc_clk_out_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_emmc_clk_out_t', default) +_rcm_usb_clk_div_t_return_type = Literal[ + "/1", + "/1.5", + "/2", + "/2.5", +] -def rcm_fclk_out_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_fclk_out_t', default) +_rcm_sdram_clk_div_t_return_type = Literal[ + "/1", + "/2", + "/4", +] -def rcm_flash_latency_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_flash_latency_t', default) +_rcm_pll_clk_div_mco_clk_t_return_type = Literal[ + "/2", +] -def rcm_fmc_clk_value_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_fmc_clk_value_t', default) +_rcm_flash_latency_t_return_type = Literal[ + "0", + "1", + "2", + "3", +] -def rcm_fpu_clk_div_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_fpu_clk_div_t', default) +_rcm_css_t_return_type = Literal[ + "rcm_css_disable", + "rcm_css_enable", +] -def rcm_fpu_clk_out_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_fpu_clk_out_t', default) +_rcm_hse_clock_source_t_return_type = Literal[ + "bypass", + "disable", + "oscillator", +] -def rcm_hclk_out_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_hclk_out_t', default) +_rcm_lse_clock_source_t_return_type = Literal[ + "bypass", + "disable", + "oscillator", +] -def rcm_hclk_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_hclk_t', default) +_rcm_prefetch_buffer_enabled_t_return_type = Literal[ + "rcm_prefetch_buffer_disable", + "rcm_prefetch_buffer_enable", +] -def rcm_hse_clock_source_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_hse_clock_source_t', default) +_rcm_mco_enabled_t_return_type = Literal[ + "disabled", + "enabled", +] -def rcm_hse_div_pll_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_hse_div_pll_t', default) +def rcm_lse_clk_input_t( + project: Project, + instance: str = "RCM", + default: float = 32768, +) -> float: + return project.configs.get(f"{instance}.rcm_lse_clk_input_t", default) -def rcm_hse_div_rtc_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_hse_div_rtc_t', default) +def rcm_hse_clk_input_t( + project: Project, + instance: str = "RCM", + default: float = 8000000, +) -> float: + return project.configs.get(f"{instance}.rcm_hse_clk_input_t", default) -def rcm_hse_value_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_hse_value_t', default) +def rcm_hse_clk_div_rtc_t( + project: Project, + instance: str = "RCM", + default: _rcm_hse_clk_div_rtc_t_return_type = "/128", +) -> _rcm_hse_clk_div_rtc_t_return_type: + return project.configs.get(f"{instance}.rcm_hse_clk_div_rtc_t", default) -def rcm_hsi_calibration_t(project: dict, default: int | None = None) -> int: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_hsi_calibration_t', default) +def rcm_rtc_clk_mux_t( + project: Project, + instance: str = "RCM", + default: _rcm_rtc_clk_mux_t_return_type = "lsi", +) -> _rcm_rtc_clk_mux_t_return_type: + return project.configs.get(f"{instance}.rcm_rtc_clk_mux_t", default) -def rcm_hsi_div_pll_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_hsi_div_pll_t', default) +def rcm_rtc_clk_output_t( + project: Project, + instance: str = "RCM", + default: float = 40000, +) -> float: + return project.configs.get(f"{instance}.rcm_rtc_clk_output_t", default) -def rcm_hsi_value_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_hsi_value_t', default) +def rcm_lsi_clk_input_t( + project: Project, + instance: str = "RCM", + default: float = 40000, +) -> float: + return project.configs.get(f"{instance}.rcm_lsi_clk_input_t", default) -def rcm_i2s2_clk_freq_value_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_i2s2_clk_freq_value_t', default) +def rcm_iwdt_clk_output_t( + project: Project, + instance: str = "RCM", + default: float = 40000, +) -> float: + return project.configs.get(f"{instance}.rcm_iwdt_clk_output_t", default) -def rcm_i2s3_clk_freq_value_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_i2s3_clk_freq_value_t', default) +def rcm_hsi_clk_input_t( + project: Project, + instance: str = "RCM", + default: float = 8000000, +) -> float: + return project.configs.get(f"{instance}.rcm_hsi_clk_input_t", default) -def rcm_iwdg_clk_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_iwdg_clk_t', default) +def rcm_system_clk_mux_t( + project: Project, + instance: str = "RCM", + default: _rcm_system_clk_mux_t_return_type = "hsi", +) -> _rcm_system_clk_mux_t_return_type: + return project.configs.get(f"{instance}.rcm_system_clk_mux_t", default) -def rcm_lse_clock_source_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_lse_clock_source_t', default) +def rcm_fmc_clk_output_t( + project: Project, + instance: str = "RCM", + default: float = 8000000, +) -> float: + return project.configs.get(f"{instance}.rcm_fmc_clk_output_t", default) -def rcm_lse_value_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_lse_value_t', default) +def rcm_pll_clk_mux_t( + project: Project, + instance: str = "RCM", + default: _rcm_pll_clk_mux_t_return_type = "hsi_div2", +) -> _rcm_pll_clk_mux_t_return_type: + return project.configs.get(f"{instance}.rcm_pll_clk_mux_t", default) -def rcm_lsi_value_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_lsi_value_t', default) +def rcm_mco_clk_mux_t( + project: Project, + instance: str = "RCM", + default: _rcm_mco_clk_mux_t_return_type = "hsi", +) -> _rcm_mco_clk_mux_t_return_type: + return project.configs.get(f"{instance}.rcm_mco_clk_mux_t", default) -def rcm_mco_clk_selector_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_mco_clk_selector_t', default) +def rcm_hsi_clk_div_pll_t( + project: Project, + instance: str = "RCM", + default: _rcm_hsi_clk_div_pll_t_return_type = "2", +) -> _rcm_hsi_clk_div_pll_t_return_type: + return project.configs.get(f"{instance}.rcm_hsi_clk_div_pll_t", default) -def rcm_mco_clk_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_mco_clk_t', default) +def rcm_hse_clk_div_pll_t( + project: Project, + instance: str = "RCM", + default: _rcm_hse_clk_div_pll_t_return_type = "/1", +) -> _rcm_hse_clk_div_pll_t_return_type: + return project.configs.get(f"{instance}.rcm_hse_clk_div_pll_t", default) -def rcm_mco_enabled_t(project: dict, default: bool | None = None) -> bool: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_mco_enabled_t', default) +def rcm_pll_clk_t( + project: Project, + instance: str = "RCM", + default: float = 4000000, +) -> float: + return project.configs.get(f"{instance}.rcm_pll_clk_t", default) -def rcm_mco_out_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_mco_out_t', default) +def rcm_pll_clk_mul_t( + project: Project, + instance: str = "RCM", + default: _rcm_pll_clk_mul_t_return_type = "*2", +) -> _rcm_pll_clk_mul_t_return_type: + return project.configs.get(f"{instance}.rcm_pll_clk_mul_t", default) -def rcm_pll_clk_selector_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_pll_clk_selector_t', default) +def rcm_sys_clk_t( + project: Project, + instance: str = "RCM", + default: float = 8000000, +) -> float: + return project.configs.get(f"{instance}.rcm_sys_clk_t", default) -def rcm_pll_div_mco_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_pll_div_mco_t', default) +def rcm_i2s_clk_out_t( + project: Project, + instance: str = "RCM", + default: float = 8000000, +) -> float: + return project.configs.get(f"{instance}.rcm_i2s_clk_out_t", default) -def rcm_pll_mul_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_pll_mul_t', default) +def rcm_ahb_clk_div_hclk_t( + project: Project, + instance: str = "RCM", + default: _rcm_ahb_clk_div_hclk_t_return_type = "/1", +) -> _rcm_ahb_clk_div_hclk_t_return_type: + return project.configs.get(f"{instance}.rcm_ahb_clk_div_hclk_t", default) -def rcm_pll_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_pll_t', default) +def rcm_hclk_t( + project: Project, + instance: str = "RCM", + default: float = 8000000, +) -> float: + return project.configs.get(f"{instance}.rcm_hclk_t", default) -def rcm_prefetch_buffer_enabled_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_prefetch_buffer_enabled_t', default) +def rcm_hclk_out_t( + project: Project, + instance: str = "RCM", + default: float = 8000000, +) -> float: + return project.configs.get(f"{instance}.rcm_hclk_out_t", default) -def rcm_rtc_clk_selector_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_rtc_clk_selector_t', default) +def rcm_fclk_out_t( + project: Project, + instance: str = "RCM", + default: float = 8000000, +) -> float: + return project.configs.get(f"{instance}.rcm_fclk_out_t", default) -def rcm_rtc_clk_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_rtc_clk_t', default) +def rcm_hclk_div_sys_timer_clk_t( + project: Project, + instance: str = "RCM", + default: _rcm_hclk_div_sys_timer_clk_t_return_type = "/1", +) -> _rcm_hclk_div_sys_timer_clk_t_return_type: + return project.configs.get(f"{instance}.rcm_hclk_div_sys_timer_clk_t", default) -def rcm_sdio_ahb_clk_out_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_sdio_ahb_clk_out_t', default) +def rcm_sys_timer_clk_out_t( + project: Project, + instance: str = "RCM", + default: float = 8000000, +) -> float: + return project.configs.get(f"{instance}.rcm_sys_timer_clk_out_t", default) -def rcm_sdio_clk_out_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_sdio_clk_out_t', default) +def rcm_apb1_div_t( + project: Project, + instance: str = "RCM", + default: _rcm_apb1_div_t_return_type = "/1", +) -> _rcm_apb1_div_t_return_type: + return project.configs.get(f"{instance}.rcm_apb1_div_t", default) -def rcm_sys_clk_freq_value_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_sys_clk_freq_value_t', default) +def rcm_apb1_peripherals_out_t( + project: Project, + instance: str = "RCM", + default: float = 8000000, +) -> float: + return project.configs.get(f"{instance}.rcm_apb1_peripherals_out_t", default) -def rcm_sys_timer_clk_div_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_sys_timer_clk_div_t', default) +def rcm_apb1_timers_mul_t( + project: Project, + instance: str = "RCM", + default: _rcm_apb1_timers_mul_t_return_type = "*1", +) -> _rcm_apb1_timers_mul_t_return_type: + return project.configs.get(f"{instance}.rcm_apb1_timers_mul_t", default) -def rcm_sys_timer_clk_out_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_sys_timer_clk_out_t', default) +def rcm_apb1_timers_out_t( + project: Project, + instance: str = "RCM", + default: float = 8000000, +) -> float: + return project.configs.get(f"{instance}.rcm_apb1_timers_out_t", default) -def rcm_system_clk_selector_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_system_clk_selector_t', default) +def rcm_apb2_div_t( + project: Project, + instance: str = "RCM", + default: _rcm_apb2_div_t_return_type = "/1", +) -> _rcm_apb2_div_t_return_type: + return project.configs.get(f"{instance}.rcm_apb2_div_t", default) -def rcm_usb_clk_div_t(project: dict, default: str | None = None) -> str: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_usb_clk_div_t', default) +def rcm_apb2_peripherals_out_t( + project: Project, + instance: str = "RCM", + default: float = 8000000, +) -> float: + return project.configs.get(f"{instance}.rcm_apb2_peripherals_out_t", default) -def rcm_usb_clk_out_t(project: dict, default: float | None = None) -> float: - return csp_project_helper.get(project, 'configs/RCM/geehy.rcm_usb_clk_out_t', default) +def rcm_apb2_timers_mul_t( + project: Project, + instance: str = "RCM", + default: _rcm_apb2_timers_mul_t_return_type = "*1", +) -> _rcm_apb2_timers_mul_t_return_type: + return project.configs.get(f"{instance}.rcm_apb2_timers_mul_t", default) -# ------------------------------------------------------------------------------ + +def rcm_apb2_timers_out_t( + project: Project, + instance: str = "RCM", + default: float = 8000000, +) -> float: + return project.configs.get(f"{instance}.rcm_apb2_timers_out_t", default) + + +def rcm_adc_clk_div_t( + project: Project, + instance: str = "RCM", + default: _rcm_adc_clk_div_t_return_type = "/1", +) -> _rcm_adc_clk_div_t_return_type: + return project.configs.get(f"{instance}.rcm_adc_clk_div_t", default) + + +def rcm_adc_clk_out_t( + project: Project, + instance: str = "RCM", + default: float = 4000000, +) -> float: + return project.configs.get(f"{instance}.rcm_adc_clk_out_t", default) + + +def rcm_fpu_clk_div_t( + project: Project, + instance: str = "RCM", + default: _rcm_fpu_clk_div_t_return_type = "/1", +) -> _rcm_fpu_clk_div_t_return_type: + return project.configs.get(f"{instance}.rcm_fpu_clk_div_t", default) + + +def rcm_fpu_clk_out_t( + project: Project, + instance: str = "RCM", + default: float = 8000000, +) -> float: + return project.configs.get(f"{instance}.rcm_fpu_clk_out_t", default) + + +def rcm_sdio_clk_out_t( + project: Project, + instance: str = "RCM", + default: float = 8000000, +) -> float: + return project.configs.get(f"{instance}.rcm_sdio_clk_out_t", default) + + +def rcm_usb_clk_div_t( + project: Project, + instance: str = "RCM", + default: _rcm_usb_clk_div_t_return_type = "/1", +) -> _rcm_usb_clk_div_t_return_type: + return project.configs.get(f"{instance}.rcm_usb_clk_div_t", default) + + +def rcm_usb_clk_out_t( + project: Project, + instance: str = "RCM", + default: float = 48000000, +) -> float: + return project.configs.get(f"{instance}.rcm_usb_clk_out_t", default) + + +def rcm_smc_clk_out_t( + project: Project, + instance: str = "RCM", + default: float = 8000000, +) -> float: + return project.configs.get(f"{instance}.rcm_smc_clk_out_t", default) + + +def rcm_dmc_clk_out_t( + project: Project, + instance: str = "RCM", + default: float = 8000000, +) -> float: + return project.configs.get(f"{instance}.rcm_dmc_clk_out_t", default) + + +def rcm_sdram_clk_div_t( + project: Project, + instance: str = "RCM", + default: _rcm_sdram_clk_div_t_return_type = "/1", +) -> _rcm_sdram_clk_div_t_return_type: + return project.configs.get(f"{instance}.rcm_sdram_clk_div_t", default) -def rcm_flash_latency(project: dict) -> str: +def rcm_sdram_clk_out_t( + project: Project, + instance: str = "RCM", + default: float = 8000000, +) -> float: + return project.configs.get(f"{instance}.rcm_sdram_clk_out_t", default) + + +def rcm_pll_clk_div_mco_clk_t( + project: Project, + instance: str = "RCM", + default: _rcm_pll_clk_div_mco_clk_t_return_type = "/2", +) -> _rcm_pll_clk_div_mco_clk_t_return_type: + return project.configs.get(f"{instance}.rcm_pll_clk_div_mco_clk_t", default) + + +def rcm_mco_clk_out_t( + project: Project, + instance: str = "RCM", + default: float = 8000000, +) -> float: + return project.configs.get(f"{instance}.rcm_mco_clk_out_t", default) + + +def rcm_hsi_calibration_t( + project: Project, + instance: str = "RCM", + default: int = 16, +) -> int: + return project.configs.get(f"{instance}.rcm_hsi_calibration_t", default) + + +def rcm_flash_latency_t( + project: Project, + instance: str = "RCM", + default: _rcm_flash_latency_t_return_type = "0", +) -> _rcm_flash_latency_t_return_type: + return project.configs.get(f"{instance}.rcm_flash_latency_t", default) + + +def rcm_css_t( + project: Project, + instance: str = "RCM", + default: _rcm_css_t_return_type = "rcm_css_disable", +) -> _rcm_css_t_return_type: + return project.configs.get(f"{instance}.rcm_css_t", default) + + +def rcm_hse_clock_source_t( + project: Project, + instance: str = "RCM", + default: _rcm_hse_clock_source_t_return_type = "disable", +) -> _rcm_hse_clock_source_t_return_type: + return project.configs.get(f"{instance}.rcm_hse_clock_source_t", default) + + +def rcm_lse_clock_source_t( + project: Project, + instance: str = "RCM", + default: _rcm_lse_clock_source_t_return_type = "disable", +) -> _rcm_lse_clock_source_t_return_type: + return project.configs.get(f"{instance}.rcm_lse_clock_source_t", default) + + +def rcm_prefetch_buffer_enabled_t( + project: Project, + instance: str = "RCM", + default: _rcm_prefetch_buffer_enabled_t_return_type = "rcm_prefetch_buffer_enable", +) -> _rcm_prefetch_buffer_enabled_t_return_type: + return project.configs.get(f"{instance}.rcm_prefetch_buffer_enabled_t", default) + + +def rcm_mco_enabled_t( + project: Project, + instance: str = "RCM", + default: _rcm_mco_enabled_t_return_type = "disabled", +) -> _rcm_mco_enabled_t_return_type: + return project.configs.get(f"{instance}.rcm_mco_enabled_t", default) + + +# fmt: on +# endregion +# ------------------------------------------------------------------------------ + +# --< user code begin code, do not change this comment! +def rcm_flash_latency(project: Project) -> str: m = { - 'geehy.rcm_flash_latency_0': '0', - 'geehy.rcm_flash_latency_1': '1', - 'geehy.rcm_flash_latency_2': '2', - 'geehy.rcm_flash_latency_3': '3', + "0": "0", + "1": "1", + "2": "2", + "3": "3", } - latency = rcm_flash_latency_t(project, 'geehy.rcm_flash_latency_3') - return m.get(latency, '3') + latency = rcm_flash_latency_t(project) + return m[latency] -def rcm_hse_used(project: dict) -> bool: - pll_clk_selector = rcm_pll_clk_selector_t(project) - system_clk_selector = rcm_system_clk_selector_t(project) - mco_clk_selector = rcm_mco_clk_selector_t(project) - rtc_clk_selector = rcm_rtc_clk_selector_t(project) +def rcm_hse_used(project: Project) -> bool: + pll_clk_mux = rcm_pll_clk_mux_t(project) + system_clk_mux = rcm_system_clk_mux_t(project) + mco_clk_mux = rcm_mco_clk_mux_t(project) + rtc_clk_mux = rcm_rtc_clk_mux_t(project) - hse_clock_source = rcm_hse_clock_source_t(project, 'geehy.rcm_hse_clock_source_disable') + hse_clock_source = rcm_hse_clock_source_t(project) use_rtc = True # TODO: use_pll = rcm_pll_used(project) use_mco = True # TODO: - if hse_clock_source == 'geehy.rcm_hse_clock_source_disable': + if hse_clock_source == "disable": return False - if use_rtc and rtc_clk_selector == 'geehy.rcm_rtc_clk_hse_div128_t': + if use_rtc and rtc_clk_mux == "hse_div128": return True - if use_pll and pll_clk_selector == 'geehy.rcm_pll_hse_t': + if use_pll and pll_clk_mux == "hse": return True - if system_clk_selector == 'geehy.rcm_system_clk_hse_t': + if system_clk_mux == "hse": return True - if use_mco and mco_clk_selector == 'geehy.rcm_mco_clk_hse_t': + if use_mco and mco_clk_mux == "hse": return True return False -def rcm_hsi_used(project: dict) -> bool: - pll_clk_selector = rcm_pll_clk_selector_t(project) - system_clk_selector = rcm_system_clk_selector_t(project) - mco_clk_selector = rcm_mco_clk_selector_t(project) +def rcm_hsi_used(project: Project) -> bool: + pll_clk_mux = rcm_pll_clk_mux_t(project) + system_clk_mux = rcm_system_clk_mux_t(project) + mco_clk_mux = rcm_mco_clk_mux_t(project) use_pll = rcm_pll_used(project) use_mco = True # TODO: - if use_pll and pll_clk_selector == 'geehy.rcm_pll_hsi_div2_t': + if use_pll and pll_clk_mux == "hsi_div2": return True - if system_clk_selector == 'geehy.rcm_system_clk_hsi_t': + if system_clk_mux == "hsi": return True - if use_mco and mco_clk_selector == 'geehy.rcm_mco_clk_hsi_t': + if use_mco and mco_clk_mux == "hsi": return True return False -def rcm_lse_used(project: dict) -> bool: - rtc_clk_selector = rcm_rtc_clk_selector_t(project) +def rcm_lse_used(project: Project) -> bool: + rtc_clk_mux = rcm_rtc_clk_mux_t(project) - lse_clock_source = rcm_lse_clock_source_t(project, 'geehy.rcm_lse_clock_source_disable') + lse_clock_source = rcm_lse_clock_source_t(project) use_rtc = True # TODO: - if lse_clock_source == 'geehy.rcm_lse_clock_source_disable': + if lse_clock_source == "disable": return False - if use_rtc and rtc_clk_selector == 'geehy.rcm_rtc_clk_lse_t': + if use_rtc and rtc_clk_mux == "lse": return True return False -def rcm_lsi_used(project: dict) -> bool: - rtc_clk_selector = rcm_rtc_clk_selector_t(project) +def rcm_lsi_used(project: Project) -> bool: + rtc_clk_mux = rcm_rtc_clk_mux_t(project) use_iwdg = True # TODO: if use_iwdg: return True - if rtc_clk_selector == 'geehy.rcm_rtc_clk_lsi_t': + if rtc_clk_mux == "lsi": return True return False -def rcm_pll_used(project: dict) -> bool: - system_clk_selector = rcm_system_clk_selector_t(project) - mco_clk_selector = rcm_mco_clk_selector_t(project) +def rcm_pll_used(project: Project) -> bool: + system_clk_mux = rcm_system_clk_mux_t(project) + mco_clk_mux = rcm_mco_clk_mux_t(project) use_mco = True # TODO: use_usb = True # TODO: - if system_clk_selector == 'geehy.rcm_system_clk_pll_t': + if system_clk_mux == "pll": return True - if use_mco and mco_clk_selector == 'geehy.rcm_mco_clk_pll_div2_t': + if use_mco and mco_clk_mux == "pll_div2": return True if use_usb: @@ -353,97 +749,113 @@ def rcm_pll_used(project: dict) -> bool: return False -def rcm_pll_clk_selector(project: dict) -> str: - selector = rcm_pll_clk_selector_t(project) - div = rcm_hse_div_pll_t(project) +def rcm_mco_enabled(project: Project) -> bool: + mco_enabled = rcm_mco_enabled_t(project) + return mco_enabled == "enabled" + - if selector == 'geehy.rcm_pll_hsi_div2_t': - return 'RCM_PLLSEL_HSI_DIV_2' +def rcm_pll_clk_mux(project: Project) -> str: + mux = rcm_pll_clk_mux_t(project) + div = rcm_hse_clk_div_pll_t(project) + + if mux == "hsi_div2": + return "RCM_PLLSEL_HSI_DIV_2" else: - if div == 'geehy.rcm_hse_div_pll_div1': - return 'RCM_PLLSEL_HSE' + if div == "/1": + return "RCM_PLLSEL_HSE" else: - return 'RCM_PLLSEL_HSE_DIV2' + return "RCM_PLLSEL_HSE_DIV2" -def rcm_system_clk_selector(project: dict) -> str: +def rcm_system_clk_mux(project: Project) -> str: m = { - 'geehy.rcm_system_clk_hsi_t': 'RCM_SYSCLK_SEL_HSI', - 'geehy.rcm_system_clk_hse_t': 'RCM_SYSCLK_SEL_HSE', - 'geehy.rcm_system_clk_pll_t': 'RCM_SYSCLK_SEL_PLL', + "hsi": "RCM_SYSCLK_SEL_HSI", + "hse": "RCM_SYSCLK_SEL_HSE", + "pll": "RCM_SYSCLK_SEL_PLL", } - selector = rcm_system_clk_selector_t(project) - return m.get(selector) + mux = rcm_system_clk_mux_t(project) + return m[mux] -def rcm_mco_clk_selector(project: dict) -> str: +def rcm_mco_clk_mux(project: Project) -> str: m = { - 'geehy.rcm_mco_clk_pll_div2_t': 'RCM_MCOCLK_PLLCLK_DIV_2', - 'geehy.rcm_mco_clk_hse_t': 'RCM_MCOCLK_HSE', - 'geehy.rcm_mco_clk_hsi_t': 'RCM_MCOCLK_HSI', - 'geehy.rcm_mco_clk_system_t': 'RCM_MCOCLK_SYSCLK', + "pll_div2": "RCM_MCOCLK_PLLCLK_DIV_2", + "hsi": "RCM_MCOCLK_HSI", + "hse": "RCM_MCOCLK_HSE", + "system": "RCM_MCOCLK_SYSCLK", } - selector = rcm_mco_clk_selector_t(project) - return m.get(selector) + mux = rcm_mco_clk_mux_t(project) + return m[mux] -def rcm_pll_mul(project: dict) -> str: +def rcm_pll_clk_mul(project: Project) -> str: m = { - 'geehy.rcm_pll_mul2': 'RCM_PLLMF_2', - 'geehy.rcm_pll_mul3': 'RCM_PLLMF_3', - 'geehy.rcm_pll_mul4': 'RCM_PLLMF_4', - 'geehy.rcm_pll_mul5': 'RCM_PLLMF_5', - 'geehy.rcm_pll_mul6': 'RCM_PLLMF_6', - 'geehy.rcm_pll_mul7': 'RCM_PLLMF_7', - 'geehy.rcm_pll_mul8': 'RCM_PLLMF_8', - 'geehy.rcm_pll_mul9': 'RCM_PLLMF_9', - 'geehy.rcm_pll_mul10': 'RCM_PLLMF_10', - 'geehy.rcm_pll_mul11': 'RCM_PLLMF_11', - 'geehy.rcm_pll_mul12': 'RCM_PLLMF_12', - 'geehy.rcm_pll_mul13': 'RCM_PLLMF_13', - 'geehy.rcm_pll_mul14': 'RCM_PLLMF_14', - 'geehy.rcm_pll_mul15': 'RCM_PLLMF_15', - 'geehy.rcm_pll_mul16': 'RCM_PLLMF_16', + "*2": "RCM_PLLMF_2", + "*3": "RCM_PLLMF_3", + "*4": "RCM_PLLMF_4", + "*5": "RCM_PLLMF_5", + "*6": "RCM_PLLMF_6", + "*7": "RCM_PLLMF_7", + "*8": "RCM_PLLMF_8", + "*9": "RCM_PLLMF_9", + "*10": "RCM_PLLMF_10", + "*11": "RCM_PLLMF_11", + "*12": "RCM_PLLMF_12", + "*13": "RCM_PLLMF_13", + "*14": "RCM_PLLMF_14", + "*15": "RCM_PLLMF_15", + "*16": "RCM_PLLMF_16", } - mul = rcm_pll_mul_t(project) - return m.get(mul) + mul = rcm_pll_clk_mul_t(project) + return m[mul] -def rcm_ahb_div(project: dict) -> str: +def rcm_ahb_clk_div_hclk(project: Project) -> str: m = { - 'geehy.rcm_ahb_div1': 'RCM_AHB_DIV_1', - 'geehy.rcm_ahb_div2': 'RCM_AHB_DIV_2', - 'geehy.rcm_ahb_div4': 'RCM_AHB_DIV_4', - 'geehy.rcm_ahb_div8': 'RCM_AHB_DIV_8', - 'geehy.rcm_ahb_div16': 'RCM_AHB_DIV_16', - 'geehy.rcm_ahb_div64': 'RCM_AHB_DIV_64', - 'geehy.rcm_ahb_div128': 'RCM_AHB_DIV_128', - 'geehy.rcm_ahb_div256': 'RCM_AHB_DIV_256', - 'geehy.rcm_ahb_div512': 'RCM_AHB_DIV_512', + "/1": "RCM_AHB_DIV_1", + "/2": "RCM_AHB_DIV_2", + "/4": "RCM_AHB_DIV_4", + "/8": "RCM_AHB_DIV_8", + "/16": "RCM_AHB_DIV_16", + "/64": "RCM_AHB_DIV_64", + "/128": "RCM_AHB_DIV_128", + "/256": "RCM_AHB_DIV_256", + "/512": "RCM_AHB_DIV_512", } - div = rcm_ahb_div_t(project) - return m.get(div) + div = rcm_ahb_clk_div_hclk_t(project) + return m[div] -def rcm_apb1_div(project: dict) -> str: +def rcm_apb1_div(project: Project) -> str: m = { - 'geehy.rcm_apb1_div1': 'RCM_APB_DIV_1', - 'geehy.rcm_apb1_div2': 'RCM_APB_DIV_2', - 'geehy.rcm_apb1_div4': 'RCM_APB_DIV_4', - 'geehy.rcm_apb1_div8': 'RCM_APB_DIV_8', - 'geehy.rcm_apb1_div16': 'RCM_APB_DIV_16', + "/1": "RCM_APB_DIV_1", + "/2": "RCM_APB_DIV_2", + "/4": "RCM_APB_DIV_4", + "/8": "RCM_APB_DIV_8", + "/16": "RCM_APB_DIV_16", } div = rcm_apb1_div_t(project) - return m.get(div) + return m[div] -def rcm_apb2_div(project: dict) -> str: +def rcm_apb2_div(project: Project) -> str: m = { - 'geehy.rcm_apb2_div1': 'RCM_APB_DIV_1', - 'geehy.rcm_apb2_div2': 'RCM_APB_DIV_2', - 'geehy.rcm_apb2_div4': 'RCM_APB_DIV_4', - 'geehy.rcm_apb2_div8': 'RCM_APB_DIV_8', - 'geehy.rcm_apb2_div16': 'RCM_APB_DIV_16', + "/1": "RCM_APB_DIV_1", + "/2": "RCM_APB_DIV_2", + "/4": "RCM_APB_DIV_4", + "/8": "RCM_APB_DIV_8", + "/16": "RCM_APB_DIV_16", } div = rcm_apb2_div_t(project) - return m.get(div) + return m[div] + + +def rcm_mco_io(project: Project) -> str | None: + return None + ios = csp_project_helper.find_pins_by_function(project, "RCM:MCO") + if ios: + return ios[0] + else: + return None + +# --> user code end code, do not change this comment! diff --git a/tools/generator/filters/sys.py b/tools/generator/filters/sys.py new file mode 100644 index 0000000..dd21c5e --- /dev/null +++ b/tools/generator/filters/sys.py @@ -0,0 +1,171 @@ +#!/usr/bin/env python3 +# -*- coding:utf-8 -*- + +# +# ------------------------------------------------------------------------------ +# @author: csplink coder +# @file: sys.py +# @version: 0.0.6 +# @time: 2025-11-14 15:40:50 +# +# ------------------------------------------------------------------------------ +# @attention +# +# Copyright (C) 2025 csplink software. +# All rights reserved. +# +# ------------------------------------------------------------------------------ +# + +from typing import Literal + +from csp.project import Project + +# --< user code begin import, do not change this comment! +# isort: off + +# isort: on +# --> user code end import, do not change this comment! + +# ------------------------------------------------------------------------------ +# region autogen filters +# fmt: off + +_sys_instance_t_return_type = Literal[ + "sys_tick", + "tim1", + "tim2", + "tim3", + "tim4", + "tim5", + "tim6", + "tim7", + "tim8", +] + + +_sys_ctrl_debug_t_return_type = Literal[ + "jtag_4_pins", + "jtag_5_pins", + "no_debug", + "serial_wire", + "trace_asynchronous_sw", + "trace_synchro_1bit_jtag", + "trace_synchro_1bit_sw", + "trace_synchro_2bits_jtag", + "trace_synchro_2bits_sw", + "trace_synchro_4bits_jtag", + "trace_synchro_4bits_sw", +] + + +_sys_ctrl_time_base_t_return_type = Literal[ + "sys_tick", + "tmr1", + "tmr2", + "tmr3", + "tmr4", + "tmr5", + "tmr6", + "tmr7", + "tmr8", +] + + +def sys_instance_t( + project: Project, + instance: str = "SYS", + default: _sys_instance_t_return_type = "tim1", +) -> _sys_instance_t_return_type: + return project.configs.get(f"{instance}.sys_instance_t", default) + + +def sys_ctrl_debug_t( + project: Project, + instance: str = "SYS", + default: _sys_ctrl_debug_t_return_type = "no_debug", +) -> _sys_ctrl_debug_t_return_type: + return project.configs.get(f"{instance}.sys_ctrl_debug_t", default) + + +def sys_ctrl_wake_up0_t( + project: Project, + instance: str = "SYS", + default: bool = False, +) -> bool: + return project.configs.get(f"{instance}.sys_ctrl_wake_up0_t", default) + + +def sys_ctrl_time_base_t( + project: Project, + instance: str = "SYS", + default: _sys_ctrl_time_base_t_return_type = "sys_tick", +) -> _sys_ctrl_time_base_t_return_type: + return project.configs.get(f"{instance}.sys_ctrl_time_base_t", default) + + +# fmt: on +# endregion +# ------------------------------------------------------------------------------ + +# --< user code begin code, do not change this comment! +def sys_clocks(project: Project) -> list[str]: + rtn = set() + + wake_up0 = sys_ctrl_wake_up0_t(project) + if wake_up0: + rtn.add("RCM_APB2_PERIPH_GPIOA") + + debug = sys_ctrl_debug_t(project) + if debug == "serial_wire": + rtn.add("RCM_APB2_PERIPH_GPIOA") + elif debug in [ + "jtag_4_pins", + "jtag_5_pins", + "trace_asynchronous_sw", + ]: + rtn.add("RCM_APB2_PERIPH_GPIOA") + rtn.add("RCM_APB2_PERIPH_GPIOB") + elif debug == "no_debug": + pass + else: + rtn.add("RCM_APB2_PERIPH_GPIOA") + rtn.add("RCM_APB2_PERIPH_GPIOB") + rtn.add("RCM_APB2_PERIPH_GPIOE") + + return sorted(rtn) + + +def sys_debug(project: Project) -> str: + rtn = "GPIO_NO_REMAP_SWJ" + + debug = sys_ctrl_debug_t(project) + + if debug in [ + "serial_wire", + "trace_asynchronous_sw", + "trace_synchro_1bit_sw", + "trace_synchro_1bit_sw", + "trace_synchro_2bits_sw", + "trace_synchro_4bits_sw", + ]: + rtn = "GPIO_REMAP_SWJ_JTAGDISABLE" + elif debug in [ + "jtag_4_pins", + "trace_synchro_1bit_jtag", + "trace_synchro_2bits_jtag", + "trace_synchro_4bits_jtag", + ]: + rtn = "GPIO_REMAP_SWJ_NOJTRST" + elif debug in [ + "jtag_5_pins", + ]: + rtn = "GPIO_NO_REMAP_SWJ" + elif debug in [ + "no_debug", + ]: + rtn = "GPIO_REMAP_SWJ_DISABLE" + + return rtn + +# --> user code end code, do not change this comment! diff --git a/tools/generator/filters/uart.py b/tools/generator/filters/uart.py new file mode 100644 index 0000000..de9e3d0 --- /dev/null +++ b/tools/generator/filters/uart.py @@ -0,0 +1,284 @@ +#!/usr/bin/env python3 +# -*- coding:utf-8 -*- + +# +# ------------------------------------------------------------------------------ +# @author: csplink coder +# @file: uart.py +# @version: 0.0.6 +# @time: 2025-11-14 15:42:20 +# +# ------------------------------------------------------------------------------ +# @attention +# +# Copyright (C) 2025 csplink software. +# All rights reserved. +# +# ------------------------------------------------------------------------------ +# + +from typing import Literal + +from csp.project import Project + +# --< user code begin import, do not change this comment! +# isort: off + +# isort: on +# --> user code end import, do not change this comment! + +# ------------------------------------------------------------------------------ +# region autogen filters +# fmt: off + +_uart_break_detect_length_t_return_type = Literal[ + "10_b", + "11_b", +] + + +_uart_ir_da_mode_t_return_type = Literal[ + "lowpower", + "normal", +] + + +_uart_mode_t_return_type = Literal[ + "rx", + "tx", + "tx_rx", +] + + +_uart_over_sampling_t_return_type = Literal[ + "null", + "uart_oversampling_16", +] + + +_uart_parity_t_return_type = Literal[ + "even", + "none", + "odd", +] + + +_uart_stop_bits_t_return_type = Literal[ + "1", + "2", +] + + +_uart_virtual_mode_t_return_type = Literal[ + "asynchronous", + "ir_da", + "lin", +] + + +_uart_wake_up_methode_t_return_type = Literal[ + "addressmark", + "idleline", +] + + +_uart_word_length_t_return_type = Literal[ + "8_b", + "9_b", +] + + +_uart_ctrl_mode_t_return_type = Literal[ + "asynchronous", + "disable", + "half_duplex_single_wire_mode", + "ir_da", + "lin", + "multiprocessor_communication", +] + + +def uart_address_t( + project: Project, + instance: str = "UART", + default: int = 0, +) -> int: + return project.configs.get(f"{instance}.uart_address_t", default) + + +def uart_baud_rate_t( + project: Project, + instance: str = "UART", + default: int = 115200, +) -> int: + return project.configs.get(f"{instance}.uart_baud_rate_t", default) + + +def uart_break_detect_length_t( + project: Project, + instance: str = "UART", + default: _uart_break_detect_length_t_return_type = "10_b", +) -> _uart_break_detect_length_t_return_type: + return project.configs.get(f"{instance}.uart_break_detect_length_t", default) + + +def uart_ir_da_mode_t( + project: Project, + instance: str = "UART", + default: _uart_ir_da_mode_t_return_type = "normal", +) -> _uart_ir_da_mode_t_return_type: + return project.configs.get(f"{instance}.uart_ir_da_mode_t", default) + + +def uart_mode_t( + project: Project, + instance: str = "UART", + default: _uart_mode_t_return_type = "tx_rx", +) -> _uart_mode_t_return_type: + return project.configs.get(f"{instance}.uart_mode_t", default) + + +def uart_over_sampling_t( + project: Project, + instance: str = "UART", + default: _uart_over_sampling_t_return_type = "null", +) -> _uart_over_sampling_t_return_type: + return project.configs.get(f"{instance}.uart_over_sampling_t", default) + + +def uart_parity_t( + project: Project, + instance: str = "UART", + default: _uart_parity_t_return_type = "none", +) -> _uart_parity_t_return_type: + return project.configs.get(f"{instance}.uart_parity_t", default) + + +def uart_prescaler_t( + project: Project, + instance: str = "UART", + default: int = 1, +) -> int: + return project.configs.get(f"{instance}.uart_prescaler_t", default) + + +def uart_stop_bits_t( + project: Project, + instance: str = "UART", + default: _uart_stop_bits_t_return_type = "1", +) -> _uart_stop_bits_t_return_type: + return project.configs.get(f"{instance}.uart_stop_bits_t", default) + + +def uart_virtual_mode_t( + project: Project, + instance: str = "UART", + default: _uart_virtual_mode_t_return_type = "asynchronous", +) -> _uart_virtual_mode_t_return_type: + return project.configs.get(f"{instance}.uart_virtual_mode_t", default) + + +def uart_wake_up_methode_t( + project: Project, + instance: str = "UART", + default: _uart_wake_up_methode_t_return_type = "idleline", +) -> _uart_wake_up_methode_t_return_type: + return project.configs.get(f"{instance}.uart_wake_up_methode_t", default) + + +def uart_word_length_t( + project: Project, + instance: str = "UART", + default: _uart_word_length_t_return_type = "8_b", +) -> _uart_word_length_t_return_type: + return project.configs.get(f"{instance}.uart_word_length_t", default) + + +def uart_ctrl_mode_t( + project: Project, + instance: str = "UART", + default: _uart_ctrl_mode_t_return_type = "disable", +) -> _uart_ctrl_mode_t_return_type: + return project.configs.get(f"{instance}.uart_ctrl_mode_t", default) + + +# fmt: on +# endregion +# ------------------------------------------------------------------------------ + +# --< user code begin code, do not change this comment! + + +def uart_mode(project: Project, instance: str) -> str: + m = { + "tx_rx": "USART_MODE_TX_RX", + "rx": "USART_MODE_RX", + "tx": "USART_MODE_TX", + } + + mode = uart_mode_t(project, instance) + return m[mode] + + +def uart_parity(project: Project, instance: str) -> str: + m = { + "none": "USART_PARITY_NONE", + "even": "USART_PARITY_EVEN", + "odd": "USART_PARITY_ODD", + } + + parity = uart_parity_t(project, instance) + return m[parity] + + +def uart_stop_bits(project: Project, instance: str) -> str: + m = { + "1": "USART_STOP_BIT_1", + "2": "USART_STOP_BIT_2", + } + + stop_bits = uart_stop_bits_t(project, instance) + return m[stop_bits] + + +def uart_word_length(project: Project, instance: str) -> str: + m = { + "8_b": "USART_WORD_LEN_8B", + "9_b": "USART_WORD_LEN_9B", + } + + word = uart_word_length_t(project, instance) + return m[word] + + +def uart_wake_up_methode(project: Project, instance: str) -> str: + m = { + "addressmark": "USART_WAKEUP_ADDRESS_MARK", + "idleline": "USART_WAKEUP_IDLE_LINE", + } + + word = uart_wake_up_methode_t(project, instance) + return m[word] + + +def uart_break_detect_length(project: Project, instance: str) -> str: + m = { + "10_b": "USART_LBDL_10B", + "11_b": "USART_LBDL_11B", + } + + word = uart_break_detect_length_t(project, instance) + return m[word] + + +def uart_ir_da_mode(project: Project, instance: str) -> str: + m = { + "lowpower": "USART_IRDALP_LOWPOWER", + "normal": "USART_IRDALP_NORMAL", + } + + word = uart_ir_da_mode_t(project, instance) + return m[word] + + +# --> user code end code, do not change this comment! diff --git a/tools/generator/filters/usart.py b/tools/generator/filters/usart.py new file mode 100644 index 0000000..6ac77e4 --- /dev/null +++ b/tools/generator/filters/usart.py @@ -0,0 +1,433 @@ +#!/usr/bin/env python3 +# -*- coding:utf-8 -*- + +# +# ------------------------------------------------------------------------------ +# @author: csplink coder +# @file: usart.py +# @version: 0.0.6 +# @time: 2025-11-14 15:41:04 +# +# ------------------------------------------------------------------------------ +# @attention +# +# Copyright (C) 2025 csplink software. +# All rights reserved. +# +# ------------------------------------------------------------------------------ +# + +from typing import Literal + +from csp.project import Project + +# --< user code begin import, do not change this comment! +# isort: off + +# isort: on +# --> user code end import, do not change this comment! + +# ------------------------------------------------------------------------------ +# region autogen filters +# fmt: off + +_usart_break_detect_length_t_return_type = Literal[ + "10_b", + "11_b", +] + + +_usart_clk_last_bit_t_return_type = Literal[ + "smartcard_lastbit_disable", + "smartcard_lastbit_enable", + "usart_lastbit_disable", + "usart_lastbit_enable", +] + + +_usart_clk_phase_t_return_type = Literal[ + "smartcard_phase_1_edge", + "smartcard_phase_2_edge", + "usart_phase_1_edge", + "usart_phase_2_edge", +] + + +_usart_clk_polarity_t_return_type = Literal[ + "smartcard_polarity_high", + "smartcard_polarity_low", + "usart_polarity_high", + "usart_polarity_low", +] + + +_usart_hw_flow_ctl_t_return_type = Literal[ + "cts", + "none", + "rts", + "rts_cts", +] + + +_usart_ir_da_mode_t_return_type = Literal[ + "lowpower", + "normal", +] + + +_usart_mode_t_return_type = Literal[ + "rx", + "tx", + "tx_rx", +] + + +_usart_nack_state_t_return_type = Literal[ + "disable", + "enable", +] + + +_usart_over_sampling_t_return_type = Literal[ + "null", + "uart_oversampling_16", +] + + +_usart_parity_t_return_type = Literal[ + "even", + "none", + "odd", +] + + +_usart_stop_bits_t_return_type = Literal[ + "0_5", + "1", + "1_5", + "2", +] + + +_usart_virtual_clock_mode_t_return_type = Literal[ + "smartcard", + "sync", +] + + +_usart_virtual_mode_t_return_type = Literal[ + "async", + "irda", + "smartcard", + "sync", +] + + +_usart_wake_up_methode_t_return_type = Literal[ + "addressmark", + "idleline", +] + + +_usart_word_length_t_return_type = Literal[ + "8_b", + "9_b", +] + + +_usart_ctrl_mode_t_return_type = Literal[ + "asynchronous", + "disable", + "half_duplex_single_wire_mode", + "ir_da", + "lin", + "multiprocessor_communication", + "smart_card", + "smart_card_with_clock", + "synchronous", +] + + +_usart_ctrl_hardware_flow_control_rs232_t_return_type = Literal[ + "cts_only", + "cts_rts", + "disable", + "rts_only", +] + + +def usart_address_t( + project: Project, + instance: str = "USART", + default: int = 0, +) -> int: + return project.configs.get(f"{instance}.usart_address_t", default) + + +def usart_baud_rate_t( + project: Project, + instance: str = "USART", + default: int = 115200, +) -> int: + return project.configs.get(f"{instance}.usart_baud_rate_t", default) + + +def usart_break_detect_length_t( + project: Project, + instance: str = "USART", + default: _usart_break_detect_length_t_return_type = "10_b", +) -> _usart_break_detect_length_t_return_type: + return project.configs.get(f"{instance}.usart_break_detect_length_t", default) + + +def usart_clk_last_bit_t( + project: Project, + instance: str = "USART", + default: _usart_clk_last_bit_t_return_type | int = "smartcard_lastbit_disable", +) -> _usart_clk_last_bit_t_return_type | int: + return project.configs.get(f"{instance}.usart_clk_last_bit_t", default) + + +def usart_clk_phase_t( + project: Project, + instance: str = "USART", + default: _usart_clk_phase_t_return_type | int = "smartcard_phase_1_edge", +) -> _usart_clk_phase_t_return_type | int: + return project.configs.get(f"{instance}.usart_clk_phase_t", default) + + +def usart_clk_polarity_t( + project: Project, + instance: str = "USART", + default: _usart_clk_polarity_t_return_type | int = "smartcard_polarity_low", +) -> _usart_clk_polarity_t_return_type | int: + return project.configs.get(f"{instance}.usart_clk_polarity_t", default) + + +def usart_calculate_speed_t( + project: Project, + instance: str = "USART", + default: str = "5000000", +) -> str: + return project.configs.get(f"{instance}.usart_calculate_speed_t", default) + + +def usart_guard_time_t( + project: Project, + instance: str = "USART", + default: int = 0, +) -> int: + return project.configs.get(f"{instance}.usart_guard_time_t", default) + + +def usart_hw_flow_ctl_t( + project: Project, + instance: str = "USART", + default: _usart_hw_flow_ctl_t_return_type = "rts", +) -> _usart_hw_flow_ctl_t_return_type: + return project.configs.get(f"{instance}.usart_hw_flow_ctl_t", default) + + +def usart_ir_da_mode_t( + project: Project, + instance: str = "USART", + default: _usart_ir_da_mode_t_return_type = "normal", +) -> _usart_ir_da_mode_t_return_type: + return project.configs.get(f"{instance}.usart_ir_da_mode_t", default) + + +def usart_mode_t( + project: Project, + instance: str = "USART", + default: _usart_mode_t_return_type = "tx_rx", +) -> _usart_mode_t_return_type: + return project.configs.get(f"{instance}.usart_mode_t", default) + + +def usart_nack_state_t( + project: Project, + instance: str = "USART", + default: _usart_nack_state_t_return_type = "disable", +) -> _usart_nack_state_t_return_type: + return project.configs.get(f"{instance}.usart_nack_state_t", default) + + +def usart_over_sampling_t( + project: Project, + instance: str = "USART", + default: _usart_over_sampling_t_return_type = "null", +) -> _usart_over_sampling_t_return_type: + return project.configs.get(f"{instance}.usart_over_sampling_t", default) + + +def usart_parity_t( + project: Project, + instance: str = "USART", + default: _usart_parity_t_return_type = "even", +) -> _usart_parity_t_return_type: + return project.configs.get(f"{instance}.usart_parity_t", default) + + +def usart_prescaler_t( + project: Project, + instance: str = "USART", + default: int = 1, +) -> int: + return project.configs.get(f"{instance}.usart_prescaler_t", default) + + +def usart_stop_bits_t( + project: Project, + instance: str = "USART", + default: _usart_stop_bits_t_return_type = "1", +) -> _usart_stop_bits_t_return_type: + return project.configs.get(f"{instance}.usart_stop_bits_t", default) + + +def usart_virtual_clock_mode_t( + project: Project, + instance: str = "USART", + default: _usart_virtual_clock_mode_t_return_type = "sync", +) -> _usart_virtual_clock_mode_t_return_type: + return project.configs.get(f"{instance}.usart_virtual_clock_mode_t", default) + + +def usart_virtual_mode_t( + project: Project, + instance: str = "USART", + default: _usart_virtual_mode_t_return_type = "async", +) -> _usart_virtual_mode_t_return_type: + return project.configs.get(f"{instance}.usart_virtual_mode_t", default) + + +def usart_wake_up_methode_t( + project: Project, + instance: str = "USART", + default: _usart_wake_up_methode_t_return_type = "idleline", +) -> _usart_wake_up_methode_t_return_type: + return project.configs.get(f"{instance}.usart_wake_up_methode_t", default) + + +def usart_word_length_t( + project: Project, + instance: str = "USART", + default: _usart_word_length_t_return_type = "8_b", +) -> _usart_word_length_t_return_type: + return project.configs.get(f"{instance}.usart_word_length_t", default) + + +def usart_ctrl_mode_t( + project: Project, + instance: str = "USART", + default: _usart_ctrl_mode_t_return_type = "disable", +) -> _usart_ctrl_mode_t_return_type: + return project.configs.get(f"{instance}.usart_ctrl_mode_t", default) + + +def usart_ctrl_hardware_flow_control_rs232_t( + project: Project, + instance: str = "USART", + default: _usart_ctrl_hardware_flow_control_rs232_t_return_type = "disable", +) -> _usart_ctrl_hardware_flow_control_rs232_t_return_type: + return project.configs.get(f"{instance}.usart_ctrl_hardware_flow_control_rs232_t", default) + + +# fmt: on +# endregion +# ------------------------------------------------------------------------------ + + +# --< user code begin code, do not change this comment! +def usart_ctrl_hardware_flow_control_rs232(project: Project, instance: str) -> str: + m = { + "disable": "USART_HARDWARE_FLOW_NONE", + "cts_only": "USART_HARDWARE_FLOW_CTS", + "rts_only": "USART_HARDWARE_FLOW_RTS", + "cts_rts": "USART_HARDWARE_FLOW_RTS_CTS", + } + + rs232 = usart_ctrl_hardware_flow_control_rs232_t(project, instance) + return m[rs232] + + +def usart_mode(project: Project, instance: str) -> str: + m = { + "tx_rx": "USART_MODE_TX_RX", + "rx": "USART_MODE_RX", + "tx": "USART_MODE_TX", + } + + mode = usart_mode_t(project, instance) + return m[mode] + + +def usart_parity(project: Project, instance: str) -> str: + m = { + "none": "USART_PARITY_NONE", + "even": "USART_PARITY_EVEN", + "odd": "USART_PARITY_ODD", + } + + parity = usart_parity_t(project, instance) + return m[parity] + + +def usart_stop_bits(project: Project, instance: str) -> str: + m = { + "1": "USART_STOP_BIT_1", + "2": "USART_STOP_BIT_2", + "0_5": "USART_STOP_BIT_0_5", + "1_5": "USART_STOP_BIT_1_5", + } + + stop_bits = usart_stop_bits_t(project, instance) + return m[stop_bits] + + +def usart_word_length(project: Project, instance: str) -> str: + m = { + "8_b": "USART_WORD_LEN_8B", + "9_b": "USART_WORD_LEN_9B", + } + + word = usart_word_length_t(project, instance) + return m[word] + + +def usart_clk_polarity(project: Project, instance: str) -> str: + m = { + "smartcard_polarity_high": "USART_CLKPOL_HIGH", + "smartcard_polarity_low": "USART_CLKPOL_LOW", + "usart_polarity_high": "USART_CLKPOL_HIGH", + "usart_polarity_low": "USART_CLKPOL_LOW", + } + + word = usart_clk_polarity_t(project, instance) + return m[word] + + +def usart_clk_phase(project: Project, instance: str) -> str: + m = { + "smartcard_phase_1_edge": "USART_CLKPHA_1EDGE", + "smartcard_phase_2_edge": "USART_CLKPHA_2EDGE", + "usart_phase_1_edge": "USART_CLKPHA_1EDGE", + "usart_phase_2_edge": "USART_CLKPHA_2EDGE", + } + + word = usart_clk_phase_t(project, instance) + return m[word] + + +def usart_clk_last_bit(project: Project, instance: str) -> str: + m = { + "smartcard_lastbit_disable": "USART_LBCP_DISABLE", + "smartcard_lastbit_enable": "USART_LBCP_ENABLE", + "usart_lastbit_disable": "USART_LBCP_DISABLE", + "usart_lastbit_enable": "USART_LBCP_ENABLE", + } + + word = usart_clk_last_bit_t(project, instance) + return m[word] + + +# --> user code end code, do not change this comment! diff --git a/tools/generator/filters/wwdt.py b/tools/generator/filters/wwdt.py new file mode 100644 index 0000000..34bd127 --- /dev/null +++ b/tools/generator/filters/wwdt.py @@ -0,0 +1,103 @@ +#!/usr/bin/env python3 +# -*- coding:utf-8 -*- + +# +# ------------------------------------------------------------------------------ +# @author: csplink coder +# @file: wwdt.py +# @version: 0.0.6 +# @time: 2025-11-14 15:40:59 +# +# ------------------------------------------------------------------------------ +# @attention +# +# Copyright (C) 2025 csplink software. +# All rights reserved. +# +# ------------------------------------------------------------------------------ +# + +from typing import Literal + +from csp.project import Project + +# --< user code begin import, do not change this comment! +# isort: off + +# isort: on +# --> user code end import, do not change this comment! + +# ------------------------------------------------------------------------------ +# region autogen filters +# fmt: off + +_wwdt_ewi_mode_t_return_type = Literal[ + "disable", + "enable", +] + + +_wwdt_prescaler_t_return_type = Literal[ + "/1", + "/2", + "/4", + "/8", +] + + +def wwdt_counter_t( + project: Project, + instance: str = "WWDT", + default: int = 64, +) -> int: + return project.configs.get(f"{instance}.wwdt_counter_t", default) + + +def wwdt_ewi_mode_t( + project: Project, + instance: str = "WWDT", + default: _wwdt_ewi_mode_t_return_type = "disable", +) -> _wwdt_ewi_mode_t_return_type: + return project.configs.get(f"{instance}.wwdt_ewi_mode_t", default) + + +def wwdt_prescaler_t( + project: Project, + instance: str = "WWDT", + default: _wwdt_prescaler_t_return_type = "/1", +) -> _wwdt_prescaler_t_return_type: + return project.configs.get(f"{instance}.wwdt_prescaler_t", default) + + +def wwdt_window_t( + project: Project, + instance: str = "WWDT", + default: int = 64, +) -> int: + return project.configs.get(f"{instance}.wwdt_window_t", default) + + +def wwdt_ctrl_state_t( + project: Project, + instance: str = "WWDT", + default: bool = False, +) -> bool: + return project.configs.get(f"{instance}.wwdt_ctrl_state_t", default) + + +# fmt: on +# endregion +# ------------------------------------------------------------------------------ + +# --< user code begin code, do not change this comment! +def wwdt_prescaler(project: Project) -> str: + m = { + "/1": "WWDT_TIME_BASE_1", + "/2": "WWDT_TIME_BASE_2", + "/4": "WWDT_TIME_BASE_4", + "/8": "WWDT_TIME_BASE_8", + } + + prescaler = wwdt_prescaler_t(project) + return m[prescaler] +# --> user code end code, do not change this comment! diff --git a/tools/generator/generator.py b/tools/generator/generator.py index 0cbb0ac..9595909 100644 --- a/tools/generator/generator.py +++ b/tools/generator/generator.py @@ -1,11 +1,11 @@ #!/usr/bin/env python3 # -*- coding:utf-8 -*- -# Licensed under the GNU General Public License v. 3 (the "License") +# Licensed under the Apache License v. 2 (the "License") # You may not use this file except in compliance with the License. # You may obtain a copy of the License at # -# https://www.gnu.org/licenses/gpl-3.0.html +# https://www.apache.org/licenses/LICENSE-2.0.html # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, @@ -27,58 +27,122 @@ import glob import os import shutil +import xml.etree.ElementTree as etree from typing import Callable +import filters.builder as builder +import filters.chip as chip +from csp.project import Project + script_dir = os.path.dirname(__file__) root_dir = os.path.join(script_dir, "..", "..") -def files_table(project: dict) -> dict[str, dict[str, str]]: +def _remove_trailing_digits(s): + return s.rstrip("0123456789") + + +def files_table(project: Project) -> dict[str, dict[str, str]]: all_modules = [ - 'ADC1', 'ADC2', 'ADC3', 'DAC', - 'CRC', - 'CAN', 'EMMC', 'I2C1', 'I2C2', 'SDIO', 'SPI1', 'SPI2', 'SPI3', 'UART4', 'UART5', 'USART1', 'USART2', 'USART3', - 'USBD', - - 'I2S2', 'I2S3', - 'DMA', 'GPIO', 'IWDT', 'NVIC', 'RCM', 'SYS', 'WWDT', - 'RTC', 'TMR1', 'TMR2', 'TMR3', 'TMR4', 'TMR5', 'TMR6', 'TMR7', 'TMR8', + "ADC1", + "ADC2", + "ADC3", + "DAC", + "CRC", + "CAN", + "EMMC", + "I2C1", + "I2C2", + "SDIO", + "SPI1", + "SPI2", + "SPI3", + "UART4", + "UART5", + "USART1", + "USART2", + "USART3", + "USBD", + "I2S2", + "I2S3", + "DMA", + "GPIO", + "IWDT", + "NVIC", + "RCM", + "SYS", + "WWDT", + "RTC", + "TMR1", + "TMR2", + "TMR3", + "TMR4", + "TMR5", + "TMR6", + "TMR7", + "TMR8", ] files = { "core/inc/main.h": {"brief": "main program body"}, "core/src/main.c": {"brief": "main program body"}, - "core/src/isr_vector.c": {"brief": "interrupt vector table"}, - "core/src/system_apm32f10x.c": {"brief": "CMSIS Cortex-M3 Device Peripheral Access Layer System Source File"}, + "core/src/isr.c": {"brief": "interrupt function entry"}, + "core/src/system_apm32f10x.c": { + "brief": "CMSIS Cortex-M3 Device Peripheral Access Layer System Source File" + }, + ".gitignore": {"force": False}, } - modules: list[str] = project.get("modules", []) + modules: list[str] = project.modules for module in all_modules: mod = module.lower() - files[f"core/inc/csp/{mod}.h"] = {"brief": f"this file provides code for the {mod} initialization"} - files[f"core/src/{mod}.c"] = {"brief": f"this file provides code for the {mod} initialization"} + name = _remove_trailing_digits(mod) + files[f"core/inc/csp/{mod}.h"] = { + "brief": f"this file provides code for the {mod} initialization", + "template": f"{name}.h.j2", + "module": module, + } + files[f"core/src/{mod}.c"] = { + "brief": f"this file provides code for the {mod} initialization", + "template": f"{name}.c.j2", + "module": module, + } if module not in modules: - files[f"core/inc/csp/{mod}.h"]['gen'] = False - files[f"core/src/{mod}.c"]['gen'] = False + files[f"core/inc/csp/{mod}.h"]["gen"] = False # type: ignore + files[f"core/src/{mod}.c"]["gen"] = False # type: ignore + + builder = project.gen.builder + targetChip = project.targetChip + toolchains = project.gen.toolchains - builder = project.get("gen", {}).get("builder", '') if builder == "CMake": - files[f"CMakeLists.txt"] = {"brief": "this file provides code for the cmake build system"} + files["CMakeLists.txt"] = { + "brief": "this file provides code for the cmake build system" + } elif builder == "XMake": - files[f"xmake.lua"] = {"brief": "this file provides code for the xmake build system"} + files["xmake.lua"] = { + "brief": "this file provides code for the xmake build system" + } + elif builder == "MDK-Arm": + files[f"{project.name}.uvprojx"] = {} + files["startup_arm.s"] = { + "brief": f"CMSIS Cortex-M3 based Core Device Startup File for Device {targetChip}" + } - targetChip = project.get("targetChip", 'linker_script') - toolchains = project.get("gen", {}).get("toolchains", '') - if toolchains == 'arm-none-eabi': + if toolchains == "gcc-arm-none-eabi": files[f"{targetChip}.lds"] = { "brief": f"this file provides linker script for the {targetChip} device", - "template": "linker_script.lds.j2" + "template": "linker_script.lds.j2", + } + files["startup_gcc.S"] = { + "brief": f"CMSIS Cortex-M3 based Core Device Startup File for Device {targetChip}" } - files[f"startup_gcc.S"] = {"brief": f"CMSIS Cortex-M3 based Core Device Startup File for Device {targetChip}"} return files -def copy_library(project: dict, output: str, callback: Callable[[str, int, int, bool, str], None]): +def copy_library( + project: Project, output: str, callback: Callable[[str, int, int, bool, str], None] +): file_list = [ "libraries/cmsis/device/*", "libraries/cmsis/inc/*", @@ -88,7 +152,7 @@ def copy_library(project: dict, output: str, callback: Callable[[str, int, int, ".gitattributes", ".gitignore", "LICENSE", - "README*.md" + "README*.md", ] li = {} @@ -106,6 +170,33 @@ def copy_library(project: dict, output: str, callback: Callable[[str, int, int, if not os.path.isdir(os.path.dirname(dest)): os.makedirs(os.path.dirname(dest)) shutil.copy(source, dest) - callback(dest, index, count, True, 'because the file does not exist') + callback(dest, index, count, True, "because the file does not exist") else: - callback(dest, index, count, False, 'because the file already exists') + callback(dest, index, count, False, "because the file already exists") + + +def get_mdk(project: Project, path: str = ""): + if not path or not os.path.isfile(path): + path = f"{root_dir}/tools/generator/resource/template.uvprojx" + + tree = etree.parse(path) + + info = chip.chip_info(project) + cpu = ( + f'IRAM(0x{info["ram"]["addr"]:08X},0x{info["ram"]["size"]:08X}) ' + f'IROM(0x{info["flash"]["addr"]:08X},0x{info["flash"]["size"]:08X}) ' + 'CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE' + ) + defines = builder.builder_defines(project) + includes = builder.builder_inc_dirs(project) + files = builder.builder_src_files_group(project) + + return { + "etree": tree, + "cpu": cpu, + "vendor": "Geehy", + "defines": defines, + "includes": includes, + "files": files, + "line": info["line"], + } diff --git a/tools/generator/resource/chip_info.yaml b/tools/generator/resource/chip_info.yaml deleted file mode 100644 index 5d5ab68..0000000 --- a/tools/generator/resource/chip_info.yaml +++ /dev/null @@ -1,35 +0,0 @@ -# Licensed under the GNU General Public License v. 3 (the "License") -# You may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# https://www.gnu.org/licenses/gpl-3.0.html -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -# Copyright (C) 2024-2024 xqyjlj -# -# @author xqyjlj -# @file chip_info.yaml -# -# Change Logs: -# Date Author Notes -# ------------ ---------- ----------------------------------------------- -# 2024-12-11 xqyjlj initial version -# - -.APM32F10xxE: &APM32F10xxE - flash: - addr: 0x8000000 - size: 0x0080000 - ram: - addr: 0x20000000 - size: 0x00020000 - - -APM32F103ZET6: - <<: *APM32F10xxE - class: APM32F10X_HD \ No newline at end of file diff --git a/tools/generator/resource/template.uvprojx b/tools/generator/resource/template.uvprojx new file mode 100644 index 0000000..57533df --- /dev/null +++ b/tools/generator/resource/template.uvprojx @@ -0,0 +1,383 @@ + + + 2.1 +
### uVision Project, (C) Keil Software
+ + + APM32F103 + 0x4 + ARM-ADS + + + APM32F103ZE + Geehy + IRAM(0x20000000,0x00020000) IROM(0x08000000,0x00080000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + + 0 + + + + + + + + + + + + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + APM32F103\ + APM32F103 + 1 + 0 + 1 + 1 + 1 + ./APM32F103/ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 1 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4101 + + 1 + BIN\UL2V8M.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 1 + 8 + 0 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + + + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 4 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 5 + 3 + 1 + 1 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + diff --git a/tools/generator/templates/.gitignore.j2 b/tools/generator/templates/.gitignore.j2 new file mode 100644 index 0000000..c539e47 --- /dev/null +++ b/tools/generator/templates/.gitignore.j2 @@ -0,0 +1,72 @@ +{# + # Licensed under the Apache License v. 2 (the "License") + # You may not use this file except in compliance with the License. + # You may obtain a copy of the License at + # + # https://www.apache.org/licenses/LICENSE-2.0.html + # + # Unless required by applicable law or agreed to in writing, software + # distributed under the License is distributed on an "AS IS" BASIS, + # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + # See the License for the specific language governing permissions and + # limitations under the License. + # + # Copyright (C) 2025-2025 xqyjlj + # + # @author xqyjlj + # @file .gitignore.j2 + # + # Change Logs: + # Date Author Notes + # ------------ ---------- ----------------------------------------------- + # 2025-04-15 xqyjlj initial version + #} + +#Clion +.idea/ +cmake-build*/ + +#vscode +.vscode/ + +#mdk +*.uvmpw.* +DebugConfig/ +Listings/ +Objects/ +RTE/ +*.uvoptx +*.uvguix.* + +#object +*.o +*.d +*.obj +*.elf +*.map +*.bin +*.hex + +#cache +cache/ + +# Xmake cache +.xmake/ +build*/ + +# MacOS Cache +.DS_Store + +# cmake +/CMakeLists.txt + +# python +__pycache__ + +# ozone +*.jdebug +*.jdebug.user + +# csp +.csp + diff --git a/tools/generator/templates/CMakeLists.txt.j2 b/tools/generator/templates/CMakeLists.txt.j2 index 03992cb..3bd16a8 100644 --- a/tools/generator/templates/CMakeLists.txt.j2 +++ b/tools/generator/templates/CMakeLists.txt.j2 @@ -1,9 +1,9 @@ {# - # Licensed under the GNU General Public License v. 3 (the "License") + # Licensed under the Apache License v. 2 (the "License") # You may not use this file except in compliance with the License. # You may obtain a copy of the License at # - # https://www.gnu.org/licenses/gpl-3.0.html + # https://www.apache.org/licenses/LICENSE-2.0.html # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, @@ -20,37 +20,56 @@ # Date Author Notes # ------------ ---------- ----------------------------------------------- # 2024-03-22 xqyjlj initial version + # 2025-10-10 xqyjlj improve cmake configuration # #} {%- extends "csp-file-base.cmake.j2" %} {%- block project_settings %} -cmake_minimum_required(VERSION 3.7) - set(CMAKE_SYSTEM_NAME Generic) set(CMAKE_SYSTEM_PROCESSOR arm) set(CMAKE_SYSTEM_VERSION 1) set(CMAKE_EXPORT_COMPILE_COMMANDS ON) +set(CMAKE_COLOR_DIAGNOSTICS ON) + +set(CMAKE_C_STANDARD 99) +set(CMAKE_C_STANDARD_REQUIRED ON) +set(CMAKE_C_EXTENSIONS OFF) +set(CMAKE_CXX_STANDARD 11) +set(CMAKE_CXX_STANDARD_REQUIRED ON) +set(CMAKE_CXX_EXTENSIONS OFF) + +if(NOT CMAKE_BUILD_TYPE) + set(CMAKE_BUILD_TYPE "Debug" CACHE STRING "Build type (Debug, Release, RelWithDebInfo, MinSizeRel)" FORCE) + set_property(CACHE CMAKE_BUILD_TYPE PROPERTY STRINGS "Debug" "Release" "RelWithDebInfo" "MinSizeRel") +endif() {%- endblock %} {%- block toolchains %} -set(CMAKE_C_COMPILER_FORCED TRUE) -set(CMAKE_CXX_COMPILER_FORCED TRUE) -set(CMAKE_C_COMPILER_ID GNU) -set(CMAKE_CXX_COMPILER_ID GNU) - -{%- if CSP.toolchainsPath %} -set(TOOLCHAINS_PATH "{{ CSP.toolchainsPath|replace("\\", "/") }}/bin/") -{%- else %} -set(TOOLCHAINS_PATH "") -{%- endif %} -{%- set suffix = ".exe" if CSP.platform == "win32" and CSP.toolchainsPath else "" %} -set(CMAKE_C_COMPILER ${TOOLCHAINS_PATH}arm-none-eabi-gcc{{ suffix }}) -set(CMAKE_ASM_COMPILER ${TOOLCHAINS_PATH}arm-none-eabi-gcc{{ suffix }}) -set(CMAKE_CXX_COMPILER ${TOOLCHAINS_PATH}arm-none-eabi-g++{{ suffix }}) -set(CMAKE_OBJCOPY ${TOOLCHAINS_PATH}arm-none-eabi-objcopy{{ suffix }}) -set(CMAKE_OBJDUMP ${TOOLCHAINS_PATH}arm-none-eabi-objdump{{ suffix }}) -set(CMAKE_SIZE ${TOOLCHAINS_PATH}arm-none-eabi-size{{ suffix }}) +set(CMAKE_C_COMPILER_FORCED TRUE) +set(CMAKE_CXX_COMPILER_FORCED TRUE) +set(CMAKE_C_COMPILER_ID GNU) +set(CMAKE_CXX_COMPILER_ID GNU) + +set(TOOLCHAINS_PATH $ENV{CSP_TOOLCHAIN_PATH}) +if(NOT TOOLCHAINS_PATH) + {%- if CSP.toolchainsPath %} + set(TOOLCHAINS_PATH "{{ CSP.toolchainsPath }}/bin/") + {%- else %} + set(TOOLCHAINS_PATH "") + {%- endif %} +endif() + +if(WIN32) + set(EXECUTABLE_SUFFIX ".exe") +endif() + +set(CMAKE_C_COMPILER ${TOOLCHAINS_PATH}arm-none-eabi-gcc${EXECUTABLE_SUFFIX}) +set(CMAKE_ASM_COMPILER ${TOOLCHAINS_PATH}arm-none-eabi-gcc${EXECUTABLE_SUFFIX}) +set(CMAKE_CXX_COMPILER ${TOOLCHAINS_PATH}arm-none-eabi-g++${EXECUTABLE_SUFFIX}) +set(CMAKE_OBJCOPY ${TOOLCHAINS_PATH}arm-none-eabi-objcopy${EXECUTABLE_SUFFIX}) +set(CMAKE_OBJDUMP ${TOOLCHAINS_PATH}arm-none-eabi-objdump${EXECUTABLE_SUFFIX}) +set(CMAKE_SIZE ${TOOLCHAINS_PATH}arm-none-eabi-size${EXECUTABLE_SUFFIX}) {%- endblock %} {%- block project_info %} @@ -58,57 +77,91 @@ project({{ CSP.project.name }} VERSION 0.0.0 LANGUAGES ASM C) {%- endblock %} {%- block flags %} -set(CMAKE_CXX_FLAGS "-mcpu=cortex-m3 -mthumb -mthumb-interwork -ffunction-sections -fdata-sections -fno-common -fmessage-length=0 -Wall -std=c++11") -set(CMAKE_C_FLAGS "-mcpu=cortex-m3 -mthumb -mthumb-interwork -ffunction-sections -fdata-sections -fno-common -fmessage-length=0 -Wall -std=gnu99") -set(CMAKE_ASM_FLAGS "-mcpu=cortex-m3 -mthumb -mthumb-interwork -ffunction-sections -fdata-sections -fno-common -fmessage-length=0 -Wall -x assembler-with-cpp") -set(CMAKE_EXE_LINKER_FLAGS "-mcpu=cortex-m3 -mthumb -mthumb-interwork -specs=nano.specs -specs=nosys.specs -Wl,--gc-sections,--print-memory-usage,-Map=${PROJECT_BINARY_DIR}/${PROJECT_NAME}.map,--cref -T${CMAKE_SOURCE_DIR}/{{ CSP.project.targetChip }}.lds") -add_definitions( +set(COMMON_FLAGS + -mcpu=cortex-m3 + -mthumb + -mthumb-interwork + -ffunction-sections + -fdata-sections + -fno-common + -fmessage-length=0 + -Wall +) + +set(LINKER_SCRIPT ${CMAKE_SOURCE_DIR}/{{ CSP.project.targetChip }}.lds) + +add_compile_definitions( {%- for define in CSP.project|builder_defines %} - -D{{ define }} + {{ define }} {%- endfor %} ) -if ("${CMAKE_BUILD_TYPE}" STREQUAL "Release") - message(STATUS "Maximum optimization for speed") - add_compile_options(-Ofast) -elseif ("${CMAKE_BUILD_TYPE}" STREQUAL "RelWithDebInfo") - message(STATUS "Maximum optimization for speed, debug info included") - add_compile_options(-Ofast -g) -elseif ("${CMAKE_BUILD_TYPE}" STREQUAL "MinSizeRel") - message(STATUS "Maximum optimization for size") - add_compile_options(-Os) -else () - message(STATUS "Minimal optimization, debug info included") - add_compile_options(-O0 -g) -endif () +if("${CMAKE_BUILD_TYPE}" STREQUAL "Release") + message(STATUS "Build type: Release (maximum optimization for speed)") + set(OPTIMIZATION_FLAGS -Ofast) +elseif("${CMAKE_BUILD_TYPE}" STREQUAL "RelWithDebInfo") + message(STATUS "Build type: RelWithDebInfo (maximum optimization for speed with debug info)") + set(OPTIMIZATION_FLAGS -Ofast -g) +elseif("${CMAKE_BUILD_TYPE}" STREQUAL "MinSizeRel") + message(STATUS "Build type: MinSizeRel (maximum optimization for size)") + set(OPTIMIZATION_FLAGS -Os) +else() + message(STATUS "Build type: Debug (minimal optimization with debug info)") + set(OPTIMIZATION_FLAGS -Og -g) +endif() {%- endblock %} {%- block files %} set(SOURCES {%- for file in CSP.project|builder_src_files %} - {{ file }} + {{ file }} {%- endfor %} - {{ CSP.project|builder_startup_file }} +{# #} +{%- if CSP.project.gen.toolchains == "gcc-arm-none-eabi" %} + startup_gcc.S +{%- endif %} ) {%- endblock %} {%- block includes %} set(INCLUDES -{%- for dir in CSP.project|builder_inc_dirs%} +{%- for dir in CSP.project|builder_inc_dirs %} {{ dir }} {%- endfor %} ) {%- endblock %} -{%- block files_includes %} -include_directories(${INCLUDES}) -add_executable(${PROJECT_NAME}.elf ${SOURCES} ${CMAKE_SOURCE_DIR}/{{ CSP.project.targetChip }}.lds) +{%- block executable %} +add_executable(${PROJECT_NAME}.elf ${SOURCES} ${LINKER_SCRIPT}) + +target_include_directories(${PROJECT_NAME}.elf PRIVATE ${INCLUDES}) + +target_compile_options(${PROJECT_NAME}.elf PRIVATE + ${COMMON_FLAGS} + ${OPTIMIZATION_FLAGS} + $<$:-x assembler-with-cpp> +) + +target_link_options(${PROJECT_NAME}.elf PRIVATE + ${COMMON_FLAGS} + -specs=nano.specs + -specs=nosys.specs + -Wl,--gc-sections + -Wl,--print-memory-usage + -Wl,-Map=${PROJECT_BINARY_DIR}/${PROJECT_NAME}.map + -Wl,--cref + -T${LINKER_SCRIPT} +) + +set_target_properties(${PROJECT_NAME}.elf PROPERTIES LINK_DEPENDS ${LINKER_SCRIPT}) {%- endblock %} {%- block command %} add_custom_command(TARGET ${PROJECT_NAME}.elf POST_BUILD - COMMAND ${CMAKE_OBJCOPY} -O binary $ ${PROJECT_BINARY_DIR}/${PROJECT_NAME}.bin - COMMAND ${CMAKE_OBJCOPY} -O ihex $ ${PROJECT_BINARY_DIR}/${PROJECT_NAME}.hex - COMMAND ${CMAKE_SIZE} --format=berkeley $ + COMMAND ${CMAKE_OBJCOPY} -O binary $ ${PROJECT_BINARY_DIR}/${PROJECT_NAME}.bin + COMMAND ${CMAKE_OBJCOPY} -O ihex $ ${PROJECT_BINARY_DIR}/${PROJECT_NAME}.hex + COMMAND ${CMAKE_SIZE} --format=berkeley $ + COMMENT "Generating binary and hex files, displaying memory usage" + VERBATIM ) {%- endblock %} diff --git a/tools/generator/templates/startup_armcc.s.j2 b/tools/generator/templates/crc.c.j2 similarity index 55% rename from tools/generator/templates/startup_armcc.s.j2 rename to tools/generator/templates/crc.c.j2 index 03f744b..141ff52 100644 --- a/tools/generator/templates/startup_armcc.s.j2 +++ b/tools/generator/templates/crc.c.j2 @@ -1,9 +1,9 @@ {# - # Licensed under the GNU General Public License v. 3 (the "License") + # Licensed under the Apache License v. 2 (the "License") # You may not use this file except in compliance with the License. # You may obtain a copy of the License at # - # https://www.gnu.org/licenses/gpl-3.0.html + # https://www.apache.org/licenses/LICENSE-2.0.html # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, @@ -11,14 +11,27 @@ # See the License for the specific language governing permissions and # limitations under the License. # - # Copyright (C) 2024-2024 xqyjlj + # Copyright (C) 2022-2024 xqyjlj # # @author xqyjlj - # @file startup_armcc.s.j2 + # @file crc.c.j2 # # Change Logs: # Date Author Notes # ------------ ---------- ----------------------------------------------- + # 2024-04-01 xqyjlj initial version + # #} +{%- extends "csp-file-base.c.j2" %} +{%- block includes %} +#include "csp/crc.h" +{%- endblock %} +{%- block function_body %} +void csp_crc_init(void) +{ + /*!< enable the CRC clock. */ + RCM_EnableAHBPeriphClock(RCM_AHB_PERIPH_CRC); +} +{%- endblock %} diff --git a/tools/generator/templates/crc.h.j2 b/tools/generator/templates/crc.h.j2 new file mode 100644 index 0000000..488be58 --- /dev/null +++ b/tools/generator/templates/crc.h.j2 @@ -0,0 +1,38 @@ +{# + # Licensed under the Apache License v. 2 (the "License") + # You may not use this file except in compliance with the License. + # You may obtain a copy of the License at + # + # https://www.apache.org/licenses/LICENSE-2.0.html + # + # Unless required by applicable law or agreed to in writing, software + # distributed under the License is distributed on an "AS IS" BASIS, + # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + # See the License for the specific language governing permissions and + # limitations under the License. + # + # Copyright (C) 2022-2024 xqyjlj + # + # @author xqyjlj + # @file crc.h.j2 + # + # Change Logs: + # Date Author Notes + # ------------ ---------- ----------------------------------------------- + # 2024-04-01 xqyjlj initial version + # + #} +{%- extends "csp-file-base.h.j2" %} + +{%- block includes %} +#include "apm32f10x.h" +#include "apm32f10x_crc.h" +#include "apm32f10x_rcm.h" +{%- endblock %} + +{%- block functions_prototypes %} +/** + * @brief configure crc + */ +void csp_crc_init(void); +{%- endblock %} diff --git a/tools/generator/templates/gpio.c.j2 b/tools/generator/templates/gpio.c.j2 index 726689e..83a3194 100644 --- a/tools/generator/templates/gpio.c.j2 +++ b/tools/generator/templates/gpio.c.j2 @@ -1,9 +1,9 @@ {# - # Licensed under the GNU General Public License v. 3 (the "License") + # Licensed under the Apache License v. 2 (the "License") # You may not use this file except in compliance with the License. # You may obtain a copy of the License at # - # https://www.gnu.org/licenses/gpl-3.0.html + # https://www.apache.org/licenses/LICENSE-2.0.html # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, @@ -24,6 +24,12 @@ #} {%- extends "csp-file-base.c.j2" %} +{%- set used_channels = CSP.project|gpio_channels() %} +{%- set used_ports = used_channels|gpio_used_ports() %} +{%- set eint_channels = CSP.project|gpio_eint_channels(used_channels) %} +{%- set eventout_channels = CSP.project|gpio_eventout_channels(used_channels) %} +{%- set eventout_eint_channels = eint_channels + eventout_channels %} + {%- block includes %} #include "csp/gpio.h" {%- endblock %} @@ -31,51 +37,82 @@ {%- block function_body %} void csp_gpio_init(void) { - GPIO_Config_T config = {0}; - - /*!< enable the {{ CSP.project|gpio_clock_names|join(", ") }} clock. */ - RCM_EnableAPB2PeriphClock({{ CSP.project|gpio_clocks|join(" | ") }}); - -{%- set ports = CSP.project|gpio_ports %} -{%- for port in ports %} - {%- for pin_group in CSP.project|gpio_pin_groups_by_port(port) %} +{%- if used_ports|length() > 0 %} + GPIO_Config_T gpio_config = {0}; +{%- endif %} +{%- if eint_channels|length() > 0 %} + EINT_Config_T eint_config = {0}; +{%- endif %} +{# #} +{%- set clocks = CSP.project|gpio_used_clocks() %} +{%- if clocks|length() > 0 %} + /*!< enable the {{ clocks|gpio_clocks_to_alias|join(", ") }} clock. */ + RCM_EnableAPB2PeriphClock({{ clocks|join(" | ") }}); +{%- endif %} +{%- for port in used_ports %} + {%- for channels_group in CSP.project|gpio_channels_group_by_port(used_channels, port) %} +{# #} /**************************************************************************/ - /*!< configure the {{ port }}<{{ pin_group|join(", ") }}>. */ + {%- set pins = channels_group|gpio_channels_to_pins() %} + /*!< configure the {{ port }}<{{ pins|join(", ") }}>. */ - {%- set level_map = CSP.project|gpio_pin_level_map(port, pin_group) %} - {%- if level_map %} - {%- for level, pins in level_map.items() %} - GPIO_WriteBitValue({{ port }}, {{ pins|join(" | ") }}, {{ level }}); + {%- set channels_classified = CSP.project|gpio_channels_classify_by_state(channels_group) %} + {%- if channels_classified %} + {%- for level, channels in channels_classified.items() %} + {%- set pins_classified = channels|gpio_channels_to_pins() %} + GPIO_WriteBitValue({{ port }}, {{ pins_classified|join(" | ") }}, {{ level }}); {%- endfor %} {%- endif %} - config.pin = {{ pin_group|join(" | ") }}; - config.mode = {{ CSP.project|gpio_pin_mode(port, pin_group[0]) }}; + gpio_config.pin = {{ pins|join(" | ") }}; + gpio_config.mode = {{ CSP.project|gpio_channel_mode(channels_group[0]) }}; - {%- set speed = CSP.project|gpio_pin_speed(port, pin_group[0]) %} + {%- set speed = CSP.project|gpio_channel_speed(channels_group[0]) %} {%- if speed %} - config.speed = {{ speed }}; + gpio_config.speed = {{ speed }}; {%- endif %} - GPIO_Config({{ port }}, &config); + GPIO_Config({{ port }}, &gpio_config); {%- endfor %} {%- endfor %} -{%- set eventout_map = CSP.project|gpio_eventout %} - {%- for port, pins in eventout_map.items() %} - {%- for pin in pins %} +{%- if eint_channels|length > 0 %} + {%- for channel in eint_channels %} +{# #} + /**************************************************************************/ + {%- set port = channel|gpio_channel_to_port() %} + {%- set pin = channel|gpio_channel_to_pin() %} + {%- set port_source = channel|gpio_channel_to_port_source() %} + {%- set pin_source = channel|gpio_channel_to_pin_source() %} + {%- set eint_line = channel|gpio_channel_to_eint_line() %} + /*!< selects the {{ port }}<{{ pin }}> used as eint. */ + GPIO_ConfigEINTLine({{ port_source }}, {{ pin_source }}); + + eint_config.line = {{ eint_line }}; + eint_config.mode = {{ CSP.project|gpio_channel_eint_mode(channel) }}; + eint_config.trigger = {{ CSP.project|gpio_channel_eint_trigger(channel) }}; + eint_config.lineCmd = ENABLE; + EINT_Config(&eint_config); + + // TODO: NVIC + {%- endfor %} +{%- endif %} +{%- if eventout_channels|length > 0 %} + {%- for channel in eventout_channels %} +{# #} /**************************************************************************/ + {%- set port = channel|gpio_channel_to_port() %} + {%- set pin = channel|gpio_channel_to_pin() %} + {%- set port_source = channel|gpio_channel_to_port_source() %} + {%- set pin_source = channel|gpio_channel_to_pin_source() %} /*!< selects the {{ port }}<{{ pin }}> used as event output. */ - GPIO_ConfigEventOutput({{ port.replace("GPIO", "GPIO_PORT_SOURCE_") }}, {{ pin }}); - {%- endfor %} + GPIO_ConfigEventOutput({{ port_source }}, {{ pin_source }}); {%- endfor %} - {%- if eventout_map|length > 0 %} - /**************************************************************************/ /*!< enables the event output. */ GPIO_EnableEventOutput(); - {%- endif %} +{%- endif %} } {%- endblock %} diff --git a/tools/generator/templates/gpio.h.j2 b/tools/generator/templates/gpio.h.j2 index 590a002..f33524d 100644 --- a/tools/generator/templates/gpio.h.j2 +++ b/tools/generator/templates/gpio.h.j2 @@ -1,9 +1,9 @@ {# - # Licensed under the GNU General Public License v. 3 (the "License") + # Licensed under the Apache License v. 2 (the "License") # You may not use this file except in compliance with the License. # You may obtain a copy of the License at # - # https://www.gnu.org/licenses/gpl-3.0.html + # https://www.apache.org/licenses/LICENSE-2.0.html # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, @@ -24,6 +24,8 @@ #} {%- extends "csp-file-base.h.j2" %} +{%- set used_channels = CSP.project|gpio_used_channels %} + {%- block includes %} #include "apm32f10x.h" #include "apm32f10x_eint.h" @@ -33,16 +35,13 @@ {%- endblock %} {%- block define %} -{%- set ports = CSP.project|gpio_ports %} -{%- for port in ports %} - {%- for pin in CSP.project|gpio_pins_by_port(port) %} - {%- set alias = CSP.project|gpio_pin_alias(port, pin) %} - {%- if alias %} +{%- for channel in used_channels %} + {%- set alias = CSP.project|gpio_channel_alias(channel) %} + {%- if alias %} -#define {{alias}}_PORT {{port}} /*!< Alias for {{port}} */ -#define {{alias}}_PIN {{pin}} /*!< Alias for {{pin}} */ - {%- endif %} - {%- endfor %} +#define {{ alias }}_PORT {{ port }} /*!< Alias for {{ port }} */ +#define {{ alias }}_PIN {{ pin }} /*!< Alias for {{ pin }} */ + {%- endif %} {%- endfor %} {%- endblock %} diff --git a/tools/generator/templates/isr.c.j2 b/tools/generator/templates/isr.c.j2 new file mode 100644 index 0000000..b0c0bdc --- /dev/null +++ b/tools/generator/templates/isr.c.j2 @@ -0,0 +1,36 @@ +{# + # Licensed under the Apache License v. 2 (the "License") + # You may not use this file except in compliance with the License. + # You may obtain a copy of the License at + # + # https://www.apache.org/licenses/LICENSE-2.0.html + # + # Unless required by applicable law or agreed to in writing, software + # distributed under the License is distributed on an "AS IS" BASIS, + # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + # See the License for the specific language governing permissions and + # limitations under the License. + # + # Copyright (C) 2025-2025 xqyjlj + # + # @author xqyjlj + # @file isr.c.j2 + # + # Change Logs: + # Date Author Notes + # ------------ ---------- ----------------------------------------------- + # 2025-04-15 xqyjlj initial version + #} +{%- extends "csp-file-base.c.j2" %} + +{%- set modules = CSP.project.modules|sort %} + +{%- block includes %} +#include "apm32f10x.h" +{%- for module in modules %} +#include "csp/{{ module|lower }}.h" +{%- endfor %} +{%- endblock %} + +{%- block function_body %} +{%- endblock %} diff --git a/tools/generator/templates/isr_vector.c.j2 b/tools/generator/templates/isr_vector.c.j2 deleted file mode 100644 index 30c8e0e..0000000 --- a/tools/generator/templates/isr_vector.c.j2 +++ /dev/null @@ -1,706 +0,0 @@ -{# - # Licensed under the GNU General Public License v. 3 (the "License") - # You may not use this file except in compliance with the License. - # You may obtain a copy of the License at - # - # https://www.gnu.org/licenses/gpl-3.0.html - # - # Unless required by applicable law or agreed to in writing, software - # distributed under the License is distributed on an "AS IS" BASIS, - # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - # See the License for the specific language governing permissions and - # limitations under the License. - # - # Copyright (C) 2024-2024 xqyjlj - # - # @author xqyjlj - # @file isr_vector.c.j2 - # - # Change Logs: - # Date Author Notes - # ------------ ---------- ----------------------------------------------- - # 2024-12-12 xqyjlj initial version - # - #} -{%- extends "csp-file-base.c.j2" %} - -{%- set info = CSP.project|chip_info %} - -{%- block includes %} - -#include - -#include "csp/compiler.h" -{% endblock %} - -{%- block extern %} - -extern uint32_t __default_stack__; - -void Reset_Handler(void); -void Default_Handler(void); - -/* clang-format off */ - -#if defined(__IAR_SYSTEMS_ICC__) -# define WEAK_ALIAS_DEFAULT_HANDLER -{%- if info.class == "APM32F10X_MD" %} -# pragma weak NMI_Handler = Default_Handler -# pragma weak HardFault_Handler = Default_Handler -# pragma weak MemManage_Handler = Default_Handler -# pragma weak BusFault_Handler = Default_Handler -# pragma weak UsageFault_Handler = Default_Handler -# pragma weak SVC_Handler = Default_Handler -# pragma weak DebugMon_Handler = Default_Handler -# pragma weak PendSV_Handler = Default_Handler -# pragma weak SysTick_Handler = Default_Handler -# pragma weak WWDT_IRQHandler = Default_Handler -# pragma weak PVD_IRQHandler = Default_Handler -# pragma weak TAMPER_IRQHandler = Default_Handler -# pragma weak RTC_IRQHandler = Default_Handler -# pragma weak FLASH_IRQHandler = Default_Handler -# pragma weak RCM_IRQHandler = Default_Handler -# pragma weak EINT0_IRQHandler = Default_Handler -# pragma weak EINT1_IRQHandler = Default_Handler -# pragma weak EINT2_IRQHandler = Default_Handler -# pragma weak EINT3_IRQHandler = Default_Handler -# pragma weak EINT4_IRQHandler = Default_Handler -# pragma weak DMA1_Channel1_IRQHandler = Default_Handler -# pragma weak DMA1_Channel2_IRQHandler = Default_Handler -# pragma weak DMA1_Channel3_IRQHandler = Default_Handler -# pragma weak DMA1_Channel4_IRQHandler = Default_Handler -# pragma weak DMA1_Channel5_IRQHandler = Default_Handler -# pragma weak DMA1_Channel6_IRQHandler = Default_Handler -# pragma weak DMA1_Channel7_IRQHandler = Default_Handler -# pragma weak ADC1_2_IRQHandler = Default_Handler -# pragma weak USBD1_HP_CAN1_TX_IRQHandler = Default_Handler -# pragma weak USBD1_LP_CAN1_RX0_IRQHandler = Default_Handler -# pragma weak CAN1_RX1_IRQHandler = Default_Handler -# pragma weak CAN1_SCE_IRQHandler = Default_Handler -# pragma weak EINT9_5_IRQHandler = Default_Handler -# pragma weak TMR1_BRK_IRQHandler = Default_Handler -# pragma weak TMR1_UP_IRQHandler = Default_Handler -# pragma weak TMR1_TRG_COM_IRQHandler = Default_Handler -# pragma weak TMR1_CC_IRQHandler = Default_Handler -# pragma weak TMR2_IRQHandler = Default_Handler -# pragma weak TMR3_IRQHandler = Default_Handler -# pragma weak TMR4_IRQHandler = Default_Handler -# pragma weak I2C1_EV_IRQHandler = Default_Handler -# pragma weak I2C1_ER_IRQHandler = Default_Handler -# pragma weak I2C2_EV_IRQHandler = Default_Handler -# pragma weak I2C2_ER_IRQHandler = Default_Handler -# pragma weak SPI1_IRQHandler = Default_Handler -# pragma weak SPI2_IRQHandler = Default_Handler -# pragma weak USART1_IRQHandler = Default_Handler -# pragma weak USART2_IRQHandler = Default_Handler -# pragma weak USART3_IRQHandler = Default_Handler -# pragma weak EINT15_10_IRQHandler = Default_Handler -# pragma weak RTC_Alarm_IRQHandler = Default_Handler -# pragma weak USBDWakeUp_IRQHandler = Default_Handler -# pragma weak FPU_IRQHandler = Default_Handler -# pragma weak QSPI_IRQHandler = Default_Handler -# pragma weak USBD2_HP_IRQHandler = Default_Handler -# pragma weak USBD2_LP_IRQHandler = Default_Handler -{%- elif info.class == "APM32F10X_HD" %} -# pragma weak NMI_Handler = Default_Handler -# pragma weak HardFault_Handler = Default_Handler -# pragma weak MemManage_Handler = Default_Handler -# pragma weak BusFault_Handler = Default_Handler -# pragma weak UsageFault_Handler = Default_Handler -# pragma weak SVC_Handler = Default_Handler -# pragma weak DebugMon_Handler = Default_Handler -# pragma weak PendSV_Handler = Default_Handler -# pragma weak SysTick_Handler = Default_Handler -# pragma weak WWDT_IRQHandler = Default_Handler -# pragma weak PVD_IRQHandler = Default_Handler -# pragma weak TAMPER_IRQHandler = Default_Handler -# pragma weak RTC_IRQHandler = Default_Handler -# pragma weak FLASH_IRQHandler = Default_Handler -# pragma weak RCM_IRQHandler = Default_Handler -# pragma weak EINT0_IRQHandler = Default_Handler -# pragma weak EINT1_IRQHandler = Default_Handler -# pragma weak EINT2_IRQHandler = Default_Handler -# pragma weak EINT3_IRQHandler = Default_Handler -# pragma weak EINT4_IRQHandler = Default_Handler -# pragma weak DMA1_Channel1_IRQHandler = Default_Handler -# pragma weak DMA1_Channel2_IRQHandler = Default_Handler -# pragma weak DMA1_Channel3_IRQHandler = Default_Handler -# pragma weak DMA1_Channel4_IRQHandler = Default_Handler -# pragma weak DMA1_Channel5_IRQHandler = Default_Handler -# pragma weak DMA1_Channel6_IRQHandler = Default_Handler -# pragma weak DMA1_Channel7_IRQHandler = Default_Handler -# pragma weak ADC1_2_IRQHandler = Default_Handler -# pragma weak USBD1_HP_CAN1_TX_IRQHandler = Default_Handler -# pragma weak USBD1_LP_CAN1_RX0_IRQHandler = Default_Handler -# pragma weak CAN1_RX1_IRQHandler = Default_Handler -# pragma weak CAN1_SCE_IRQHandler = Default_Handler -# pragma weak EINT9_5_IRQHandler = Default_Handler -# pragma weak TMR1_BRK_IRQHandler = Default_Handler -# pragma weak TMR1_UP_IRQHandler = Default_Handler -# pragma weak TMR1_TRG_COM_IRQHandler = Default_Handler -# pragma weak TMR1_CC_IRQHandler = Default_Handler -# pragma weak TMR2_IRQHandler = Default_Handler -# pragma weak TMR3_IRQHandler = Default_Handler -# pragma weak TMR4_IRQHandler = Default_Handler -# pragma weak I2C1_EV_IRQHandler = Default_Handler -# pragma weak I2C1_ER_IRQHandler = Default_Handler -# pragma weak I2C2_EV_IRQHandler = Default_Handler -# pragma weak I2C2_ER_IRQHandler = Default_Handler -# pragma weak SPI1_IRQHandler = Default_Handler -# pragma weak SPI2_IRQHandler = Default_Handler -# pragma weak USART1_IRQHandler = Default_Handler -# pragma weak USART2_IRQHandler = Default_Handler -# pragma weak USART3_IRQHandler = Default_Handler -# pragma weak EINT15_10_IRQHandler = Default_Handler -# pragma weak RTC_Alarm_IRQHandler = Default_Handler -# pragma weak USBDWakeUp_IRQHandler = Default_Handler -# pragma weak TMR8_BRK_IRQHandler = Default_Handler -# pragma weak TMR8_UP_IRQHandler = Default_Handler -# pragma weak TMR8_TRG_COM_IRQHandler = Default_Handler -# pragma weak TMR8_CC_IRQHandler = Default_Handler -# pragma weak ADC3_IRQHandler = Default_Handler -# pragma weak FSMC_IRQHandler = Default_Handler -# pragma weak SDIO_IRQHandler = Default_Handler -# pragma weak TMR5_IRQHandler = Default_Handler -# pragma weak SPI3_IRQHandler = Default_Handler -# pragma weak UART4_IRQHandler = Default_Handler -# pragma weak UART5_IRQHandler = Default_Handler -# pragma weak TMR6_IRQHandler = Default_Handler -# pragma weak TMR7_IRQHandler = Default_Handler -# pragma weak DMA2_Channel1_IRQHandler = Default_Handler -# pragma weak DMA2_Channel2_IRQHandler = Default_Handler -# pragma weak DMA2_Channel3_IRQHandler = Default_Handler -# pragma weak DMA2_Channel4_5_IRQHandler = Default_Handler -# pragma weak USBD2_HP_CAN2_TX_IRQHandler = Default_Handler -# pragma weak USBD2_LP_CAN2_RX0_IRQHandler = Default_Handler -# pragma weak CAN2_RX1_IRQHandler = Default_Handler -# pragma weak CAN2_SCE_IRQHandler = Default_Handler -{%- elif info.class == "APM32F10X_CL" %} -# pragma weak NMI_Handler = Default_Handler -# pragma weak HardFault_Handler = Default_Handler -# pragma weak MemManage_Handler = Default_Handler -# pragma weak BusFault_Handler = Default_Handler -# pragma weak UsageFault_Handler = Default_Handler -# pragma weak SVC_Handler = Default_Handler -# pragma weak DebugMon_Handler = Default_Handler -# pragma weak PendSV_Handler = Default_Handler -# pragma weak SysTick_Handler = Default_Handler -# pragma weak WWDT_IRQHandler = Default_Handler -# pragma weak PVD_IRQHandler = Default_Handler -# pragma weak TAMPER_IRQHandler = Default_Handler -# pragma weak RTC_IRQHandler = Default_Handler -# pragma weak FLASH_IRQHandler = Default_Handler -# pragma weak RCM_IRQHandler = Default_Handler -# pragma weak EINT0_IRQHandler = Default_Handler -# pragma weak EINT1_IRQHandler = Default_Handler -# pragma weak EINT2_IRQHandler = Default_Handler -# pragma weak EINT3_IRQHandler = Default_Handler -# pragma weak EINT4_IRQHandler = Default_Handler -# pragma weak DMA1_Channel1_IRQHandler = Default_Handler -# pragma weak DMA1_Channel2_IRQHandler = Default_Handler -# pragma weak DMA1_Channel3_IRQHandler = Default_Handler -# pragma weak DMA1_Channel4_IRQHandler = Default_Handler -# pragma weak DMA1_Channel5_IRQHandler = Default_Handler -# pragma weak DMA1_Channel6_IRQHandler = Default_Handler -# pragma weak DMA1_Channel7_IRQHandler = Default_Handler -# pragma weak ADC1_2_IRQHandler = Default_Handler -# pragma weak CAN1_TX_IRQHandler = Default_Handler -# pragma weak CAN1_RX0_IRQHandler = Default_Handler -# pragma weak CAN1_RX1_IRQHandler = Default_Handler -# pragma weak CAN1_SCE_IRQHandler = Default_Handler -# pragma weak EINT9_5_IRQHandler = Default_Handler -# pragma weak TMR1_BRK_IRQHandler = Default_Handler -# pragma weak TMR1_UP_IRQHandler = Default_Handler -# pragma weak TMR1_TRG_COM_IRQHandler = Default_Handler -# pragma weak TMR1_CC_IRQHandler = Default_Handler -# pragma weak TMR2_IRQHandler = Default_Handler -# pragma weak TMR3_IRQHandler = Default_Handler -# pragma weak TMR4_IRQHandler = Default_Handler -# pragma weak I2C1_EV_IRQHandler = Default_Handler -# pragma weak I2C1_ER_IRQHandler = Default_Handler -# pragma weak I2C2_EV_IRQHandler = Default_Handler -# pragma weak I2C2_ER_IRQHandler = Default_Handler -# pragma weak SPI1_IRQHandler = Default_Handler -# pragma weak SPI2_IRQHandler = Default_Handler -# pragma weak USART1_IRQHandler = Default_Handler -# pragma weak USART2_IRQHandler = Default_Handler -# pragma weak USART3_IRQHandler = Default_Handler -# pragma weak EINT15_10_IRQHandler = Default_Handler -# pragma weak RTC_Alarm_IRQHandler = Default_Handler -# pragma weak OTG_FS_WKUP_IRQHandler = Default_Handler -# pragma weak TMR5_IRQHandler = Default_Handler -# pragma weak SPI3_IRQHandler = Default_Handler -# pragma weak UART4_IRQHandler = Default_Handler -# pragma weak UART5_IRQHandler = Default_Handler -# pragma weak TMR6_IRQHandler = Default_Handler -# pragma weak TMR7_IRQHandler = Default_Handler -# pragma weak DMA2_Channel1_IRQHandler = Default_Handler -# pragma weak DMA2_Channel2_IRQHandler = Default_Handler -# pragma weak DMA2_Channel3_IRQHandler = Default_Handler -# pragma weak DMA2_Channel4_IRQHandler = Default_Handler -# pragma weak DMA2_Channel5_IRQHandler = Default_Handler -# pragma weak ETH_IRQHandler = Default_Handler -# pragma weak ETH_WKUP_IRQHandler = Default_Handler -# pragma weak CAN2_TX_IRQHandler = Default_Handler -# pragma weak CAN2_RX0_IRQHandler = Default_Handler -# pragma weak CAN2_RX1_IRQHandler = Default_Handler -# pragma weak CAN2_SCE_IRQHandler = Default_Handler -# pragma weak OTG_FS_IRQHandler = Default_Handler -{%- endif %} -#else -# define WEAK_ALIAS_DEFAULT_HANDLER __attribute__((weak, alias("Default_Handler"))) -#endif -{%- if info.class == "APM32F10X_MD" %} -void NMI_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void HardFault_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void MemManage_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void BusFault_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void UsageFault_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void SVC_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DebugMon_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void PendSV_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void SysTick_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void WWDT_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void PVD_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TAMPER_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void RTC_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void FLASH_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void RCM_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void EINT0_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void EINT1_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void EINT2_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void EINT3_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void EINT4_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA1_Channel1_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA1_Channel2_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA1_Channel3_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA1_Channel4_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA1_Channel5_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA1_Channel6_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA1_Channel7_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void ADC1_2_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void USBD1_HP_CAN1_TX_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void USBD1_LP_CAN1_RX0_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void CAN1_RX1_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void CAN1_SCE_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void EINT9_5_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR1_BRK_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR1_UP_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR1_TRG_COM_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR1_CC_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR2_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR3_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR4_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void I2C1_EV_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void I2C1_ER_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void I2C2_EV_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void I2C2_ER_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void SPI1_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void SPI2_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void USART1_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void USART2_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void USART3_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void EINT15_10_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void RTC_Alarm_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void USBDWakeUp_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void FPU_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void QSPI_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void USBD2_HP_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void USBD2_LP_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -{%- elif info.class == "APM32F10X_HD" %} -void NMI_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void HardFault_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void MemManage_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void BusFault_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void UsageFault_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void SVC_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DebugMon_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void PendSV_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void SysTick_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void WWDT_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void PVD_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TAMPER_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void RTC_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void FLASH_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void RCM_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void EINT0_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void EINT1_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void EINT2_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void EINT3_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void EINT4_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA1_Channel1_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA1_Channel2_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA1_Channel3_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA1_Channel4_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA1_Channel5_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA1_Channel6_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA1_Channel7_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void ADC1_2_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void USBD1_HP_CAN1_TX_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void USBD1_LP_CAN1_RX0_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void CAN1_RX1_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void CAN1_SCE_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void EINT9_5_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR1_BRK_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR1_UP_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR1_TRG_COM_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR1_CC_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR2_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR3_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR4_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void I2C1_EV_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void I2C1_ER_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void I2C2_EV_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void I2C2_ER_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void SPI1_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void SPI2_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void USART1_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void USART2_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void USART3_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void EINT15_10_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void RTC_Alarm_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void USBDWakeUp_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR8_BRK_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR8_UP_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR8_TRG_COM_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR8_CC_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void ADC3_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void FSMC_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void SDIO_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR5_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void SPI3_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void UART4_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void UART5_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR6_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR7_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA2_Channel1_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA2_Channel2_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA2_Channel3_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA2_Channel4_5_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void USBD2_HP_CAN2_TX_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void USBD2_LP_CAN2_RX0_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void CAN2_RX1_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void CAN2_SCE_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -{%- elif info.class == "APM32F10X_CL" %} -void NMI_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void HardFault_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void MemManage_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void BusFault_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void UsageFault_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void SVC_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DebugMon_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void PendSV_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void SysTick_Handler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void WWDT_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void PVD_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TAMPER_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void RTC_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void FLASH_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void RCM_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void EINT0_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void EINT1_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void EINT2_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void EINT3_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void EINT4_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA1_Channel1_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA1_Channel2_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA1_Channel3_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA1_Channel4_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA1_Channel5_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA1_Channel6_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA1_Channel7_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void ADC1_2_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void CAN1_TX_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void CAN1_RX0_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void CAN1_RX1_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void CAN1_SCE_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void EINT9_5_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR1_BRK_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR1_UP_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR1_TRG_COM_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR1_CC_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR2_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR3_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR4_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void I2C1_EV_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void I2C1_ER_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void I2C2_EV_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void I2C2_ER_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void SPI1_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void SPI2_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void USART1_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void USART2_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void USART3_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void EINT15_10_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void RTC_Alarm_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void OTG_FS_WKUP_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR5_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void SPI3_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void UART4_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void UART5_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR6_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void TMR7_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA2_Channel1_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA2_Channel2_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA2_Channel3_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA2_Channel4_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void DMA2_Channel5_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void ETH_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void ETH_WKUP_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void CAN2_TX_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void CAN2_RX0_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void CAN2_RX1_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void CAN2_SCE_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -void OTG_FS_IRQHandler(void) WEAK_ALIAS_DEFAULT_HANDLER; -{%- endif %} - -/* clang-format on */ -{% endblock %} - -{%- block variables %} - -const uint32_t *_csp_isr_vector[] CSP_SECTION(".isr_vector") = { -{%- if info.class == "APM32F10X_MD" %} - (uint32_t *)&__default_stack__, /*!< Top of Stack */ - (uint32_t *)Reset_Handler, /*!< -15, Reset Handler */ - (uint32_t *)NMI_Handler, /*!< -14, NMI Handler */ - (uint32_t *)HardFault_Handler, /*!< -13, Hard Fault Handler */ - (uint32_t *)MemManage_Handler, /*!< -12, MPU Fault Handler */ - (uint32_t *)BusFault_Handler, /*!< -11, Bus Fault Handler */ - (uint32_t *)UsageFault_Handler, /*!< -10, Usage Fault Handler */ - (uint32_t *)0, /*!< -9, Reserved */ - (uint32_t *)0, /*!< -8, Reserved */ - (uint32_t *)0, /*!< -7, Reserved */ - (uint32_t *)0, /*!< -6, Reserved */ - (uint32_t *)SVC_Handler, /*!< -5, SVCall Handler */ - (uint32_t *)DebugMon_Handler, /*!< -4, Debug Monitor Handler */ - (uint32_t *)0, /*!< -3, Reserved */ - (uint32_t *)PendSV_Handler, /*!< -2, PendSV Handler */ - (uint32_t *)SysTick_Handler, /*!< -1, SysTick Handler */ - (uint32_t *)WWDT_IRQHandler, /*!< 0, Window Watchdog */ - (uint32_t *)PVD_IRQHandler, /*!< 1, PVD through EINT Line detect */ - (uint32_t *)TAMPER_IRQHandler, /*!< 2, Tamper */ - (uint32_t *)RTC_IRQHandler, /*!< 3, RTC */ - (uint32_t *)FLASH_IRQHandler, /*!< 4, Flash */ - (uint32_t *)RCM_IRQHandler, /*!< 5, RCM */ - (uint32_t *)EINT0_IRQHandler, /*!< 6, EINT Line 0 */ - (uint32_t *)EINT1_IRQHandler, /*!< 7, EINT Line 1 */ - (uint32_t *)EINT2_IRQHandler, /*!< 8, EINT Line 2 */ - (uint32_t *)EINT3_IRQHandler, /*!< 9, EINT Line 3 */ - (uint32_t *)EINT4_IRQHandler, /*!< 10, EINT Line 4 */ - (uint32_t *)DMA1_Channel1_IRQHandler, /*!< 11, DMA1 Channel 1 */ - (uint32_t *)DMA1_Channel2_IRQHandler, /*!< 12, DMA1 Channel 2 */ - (uint32_t *)DMA1_Channel3_IRQHandler, /*!< 13, DMA1 Channel 3 */ - (uint32_t *)DMA1_Channel4_IRQHandler, /*!< 14, DMA1 Channel 4 */ - (uint32_t *)DMA1_Channel5_IRQHandler, /*!< 15, DMA1 Channel 5 */ - (uint32_t *)DMA1_Channel6_IRQHandler, /*!< 16, DMA1 Channel 6 */ - (uint32_t *)DMA1_Channel7_IRQHandler, /*!< 17, DMA1 Channel 7 */ - (uint32_t *)ADC1_2_IRQHandler, /*!< 18, ADC1_2 */ - (uint32_t *)USBD1_HP_CAN1_TX_IRQHandler, /*!< 19, USBD1 High Priority or CAN1 TX */ - (uint32_t *)USBD1_LP_CAN1_RX0_IRQHandler, /*!< 20, USBD1 Low Priority or CAN1 RX0 */ - (uint32_t *)CAN1_RX1_IRQHandler, /*!< 21, CAN1 RX1 */ - (uint32_t *)CAN1_SCE_IRQHandler, /*!< 22, CAN1 SCE */ - (uint32_t *)EINT9_5_IRQHandler, /*!< 23, EINT Line 9..5 */ - (uint32_t *)TMR1_BRK_IRQHandler, /*!< 24, TMR1 Break */ - (uint32_t *)TMR1_UP_IRQHandler, /*!< 25, TMR1 Update */ - (uint32_t *)TMR1_TRG_COM_IRQHandler, /*!< 26, TMR1 Trigger and Commutation */ - (uint32_t *)TMR1_CC_IRQHandler, /*!< 27, TMR1 Capture Compare */ - (uint32_t *)TMR2_IRQHandler, /*!< 28, TMR2 */ - (uint32_t *)TMR3_IRQHandler, /*!< 29, TMR3 */ - (uint32_t *)TMR4_IRQHandler, /*!< 30, TMR4 */ - (uint32_t *)I2C1_EV_IRQHandler, /*!< 31, I2C1 Event */ - (uint32_t *)I2C1_ER_IRQHandler, /*!< 32, I2C1 Error */ - (uint32_t *)I2C2_EV_IRQHandler, /*!< 33, I2C2 Event */ - (uint32_t *)I2C2_ER_IRQHandler, /*!< 34, I2C2 Error */ - (uint32_t *)SPI1_IRQHandler, /*!< 35, SPI1 */ - (uint32_t *)SPI2_IRQHandler, /*!< 36, SPI2 */ - (uint32_t *)USART1_IRQHandler, /*!< 37, USART1 */ - (uint32_t *)USART2_IRQHandler, /*!< 38, USART2 */ - (uint32_t *)USART3_IRQHandler, /*!< 39, USART3 */ - (uint32_t *)EINT15_10_IRQHandler, /*!< 40, EINT Line 15..10 */ - (uint32_t *)RTC_Alarm_IRQHandler, /*!< 41, RTC Alarm through EINT Line */ - (uint32_t *)USBDWakeUp_IRQHandler, /*!< 42, USBD Wakeup from suspend */ - (uint32_t *)FPU_IRQHandler, /*!< 43, FPU */ - (uint32_t *)QSPI_IRQHandler, /*!< 44, QSPI */ - (uint32_t *)USBD2_HP_IRQHandler, /*!< 45, USBD2 High Priority */ - (uint32_t *)USBD2_LP_IRQHandler, /*!< 46, USBD2 Low Priority */ -{%- elif info.class == "APM32F10X_HD" %} - (uint32_t *)&__default_stack__, /*!< Top of Stack */ - (uint32_t *)Reset_Handler, /*!< -15, Reset Handler */ - (uint32_t *)NMI_Handler, /*!< -14, NMI Handler */ - (uint32_t *)HardFault_Handler, /*!< -13, Hard Fault Handler */ - (uint32_t *)MemManage_Handler, /*!< -12, MPU Fault Handler */ - (uint32_t *)BusFault_Handler, /*!< -11, Bus Fault Handler */ - (uint32_t *)UsageFault_Handler, /*!< -10, Usage Fault Handler */ - (uint32_t *)0, /*!< -9, Reserved */ - (uint32_t *)0, /*!< -8, Reserved */ - (uint32_t *)0, /*!< -7, Reserved */ - (uint32_t *)0, /*!< -6, Reserved */ - (uint32_t *)SVC_Handler, /*!< -5, SVCall Handler */ - (uint32_t *)DebugMon_Handler, /*!< -4, Debug Monitor Handler */ - (uint32_t *)0, /*!< -3, Reserved */ - (uint32_t *)PendSV_Handler, /*!< -2, PendSV Handler */ - (uint32_t *)SysTick_Handler, /*!< -1, SysTick Handler */ - (uint32_t *)WWDT_IRQHandler, /*!< 0, Window Watchdog */ - (uint32_t *)PVD_IRQHandler, /*!< 1, PVD through EINT Line detect */ - (uint32_t *)TAMPER_IRQHandler, /*!< 2, Tamper */ - (uint32_t *)RTC_IRQHandler, /*!< 3, RTC */ - (uint32_t *)FLASH_IRQHandler, /*!< 4, Flash */ - (uint32_t *)RCM_IRQHandler, /*!< 5, RCM */ - (uint32_t *)EINT0_IRQHandler, /*!< 6, EINT Line 0 */ - (uint32_t *)EINT1_IRQHandler, /*!< 7, EINT Line 1 */ - (uint32_t *)EINT2_IRQHandler, /*!< 8, EINT Line 2 */ - (uint32_t *)EINT3_IRQHandler, /*!< 9, EINT Line 3 */ - (uint32_t *)EINT4_IRQHandler, /*!< 10, EINT Line 4 */ - (uint32_t *)DMA1_Channel1_IRQHandler, /*!< 11, DMA1 Channel 1 */ - (uint32_t *)DMA1_Channel2_IRQHandler, /*!< 12, DMA1 Channel 2 */ - (uint32_t *)DMA1_Channel3_IRQHandler, /*!< 13, DMA1 Channel 3 */ - (uint32_t *)DMA1_Channel4_IRQHandler, /*!< 14, DMA1 Channel 4 */ - (uint32_t *)DMA1_Channel5_IRQHandler, /*!< 15, DMA1 Channel 5 */ - (uint32_t *)DMA1_Channel6_IRQHandler, /*!< 16, DMA1 Channel 6 */ - (uint32_t *)DMA1_Channel7_IRQHandler, /*!< 17, DMA1 Channel 7 */ - (uint32_t *)ADC1_2_IRQHandler, /*!< 18, ADC1 & ADC2 */ - (uint32_t *)USBD1_HP_CAN1_TX_IRQHandler, /*!< 19, USBD1 High Priority or CAN1 TX */ - (uint32_t *)USBD1_LP_CAN1_RX0_IRQHandler, /*!< 20, USBD1 Low Priority or CAN1 RX0 */ - (uint32_t *)CAN1_RX1_IRQHandler, /*!< 21, CAN1 RX1 */ - (uint32_t *)CAN1_SCE_IRQHandler, /*!< 22, CAN1 SCE */ - (uint32_t *)EINT9_5_IRQHandler, /*!< 23, EINT Line 9..5 */ - (uint32_t *)TMR1_BRK_IRQHandler, /*!< 24, TMR1 Break */ - (uint32_t *)TMR1_UP_IRQHandler, /*!< 25, TMR1 Update */ - (uint32_t *)TMR1_TRG_COM_IRQHandler, /*!< 26, TMR1 Trigger and Commutation */ - (uint32_t *)TMR1_CC_IRQHandler, /*!< 27, TMR1 Capture Compare */ - (uint32_t *)TMR2_IRQHandler, /*!< 28, TMR2 */ - (uint32_t *)TMR3_IRQHandler, /*!< 29, TMR3 */ - (uint32_t *)TMR4_IRQHandler, /*!< 30, TMR4 */ - (uint32_t *)I2C1_EV_IRQHandler, /*!< 31, I2C1 Event */ - (uint32_t *)I2C1_ER_IRQHandler, /*!< 32, I2C1 Error */ - (uint32_t *)I2C2_EV_IRQHandler, /*!< 33, I2C2 Event */ - (uint32_t *)I2C2_ER_IRQHandler, /*!< 34, I2C2 Error */ - (uint32_t *)SPI1_IRQHandler, /*!< 35, SPI1 */ - (uint32_t *)SPI2_IRQHandler, /*!< 36, SPI2 */ - (uint32_t *)USART1_IRQHandler, /*!< 37, USART1 */ - (uint32_t *)USART2_IRQHandler, /*!< 38, USART2 */ - (uint32_t *)USART3_IRQHandler, /*!< 39, USART3 */ - (uint32_t *)EINT15_10_IRQHandler, /*!< 40, EINT Line 15..10 */ - (uint32_t *)RTC_Alarm_IRQHandler, /*!< 41, RTC Alarm through EINT Line */ - (uint32_t *)USBDWakeUp_IRQHandler, /*!< 42, USBD Wakeup from suspend */ - (uint32_t *)TMR8_BRK_IRQHandler, /*!< 43, TMR8 Break */ - (uint32_t *)TMR8_UP_IRQHandler, /*!< 44, TMR8 Update */ - (uint32_t *)TMR8_TRG_COM_IRQHandler, /*!< 45, TMR8 Trigger and Commutation */ - (uint32_t *)TMR8_CC_IRQHandler, /*!< 46, TMR8 Capture Compare */ - (uint32_t *)ADC3_IRQHandler, /*!< 47, ADC3 */ - (uint32_t *)FSMC_IRQHandler, /*!< 48, EMMC */ - (uint32_t *)SDIO_IRQHandler, /*!< 49, SDIO */ - (uint32_t *)TMR5_IRQHandler, /*!< 50, TMR5 */ - (uint32_t *)SPI3_IRQHandler, /*!< 51, SPI3 */ - (uint32_t *)UART4_IRQHandler, /*!< 52, UART4 */ - (uint32_t *)UART5_IRQHandler, /*!< 53, UART5 */ - (uint32_t *)TMR6_IRQHandler, /*!< 54, TMR6 */ - (uint32_t *)TMR7_IRQHandler, /*!< 55, TMR7 */ - (uint32_t *)DMA2_Channel1_IRQHandler, /*!< 56, DMA2 Channel1 */ - (uint32_t *)DMA2_Channel2_IRQHandler, /*!< 57, DMA2 Channel2 */ - (uint32_t *)DMA2_Channel3_IRQHandler, /*!< 58, DMA2 Channel3 */ - (uint32_t *)DMA2_Channel4_5_IRQHandler, /*!< 59, DMA2 Channel4 & Channel5 */ - (uint32_t *)0, /*!< 60, Reserved */ - (uint32_t *)USBD2_HP_CAN2_TX_IRQHandler, /*!< 61, USBD2 High Priority or CAN2 TX */ - (uint32_t *)USBD2_LP_CAN2_RX0_IRQHandler, /*!< 62, USBD2 Low Priority or CAN2 RX0 */ - (uint32_t *)CAN2_RX1_IRQHandler, /*!< 63, CAN2 RX1 */ - (uint32_t *)CAN2_SCE_IRQHandler, /*!< 64, CAN2 SCE */ -{%- elif info.class == "APM32F10X_CL" %} - (uint32_t *)&__default_stack__, /*!< -16, Top of Stack */ - (uint32_t *)Reset_Handler, /*!< -15, Reset Handler */ - (uint32_t *)NMI_Handler, /*!< -14, NMI Handler */ - (uint32_t *)HardFault_Handler, /*!< -13, Hard Fault Handler */ - (uint32_t *)MemManage_Handler, /*!< -12, MPU Fault Handler */ - (uint32_t *)BusFault_Handler, /*!< -11, Bus Fault Handler */ - (uint32_t *)UsageFault_Handler, /*!< -10, Usage Fault Handler */ - (uint32_t *)0, /*!< -9, Reserved */ - (uint32_t *)0, /*!< -8, Reserved */ - (uint32_t *)0, /*!< -7, Reserved */ - (uint32_t *)0, /*!< -6, Reserved */ - (uint32_t *)SVC_Handler, /*!< -5, SVCall Handler */ - (uint32_t *)DebugMon_Handler, /*!< -4, Debug Monitor Handler */ - (uint32_t *)0, /*!< -3, Reserved */ - (uint32_t *)PendSV_Handler, /*!< -2, PendSV Handler */ - (uint32_t *)SysTick_Handler, /*!< -1, SysTick Handler */ - (uint32_t *)WWDT_IRQHandler, /*!< 0, Window Watchdog */ - (uint32_t *)PVD_IRQHandler, /*!< 1, PVD through EINT Line detect */ - (uint32_t *)TAMPER_IRQHandler, /*!< 2, Tamper */ - (uint32_t *)RTC_IRQHandler, /*!< 3, RTC */ - (uint32_t *)FLASH_IRQHandler, /*!< 4, Flash */ - (uint32_t *)RCM_IRQHandler, /*!< 5, RCM */ - (uint32_t *)EINT0_IRQHandler, /*!< 6, EINT Line 0 */ - (uint32_t *)EINT1_IRQHandler, /*!< 7, EINT Line 1 */ - (uint32_t *)EINT2_IRQHandler, /*!< 8, EINT Line 2 */ - (uint32_t *)EINT3_IRQHandler, /*!< 9, EINT Line 3 */ - (uint32_t *)EINT4_IRQHandler, /*!< 10, EINT Line 4 */ - (uint32_t *)DMA1_Channel1_IRQHandler, /*!< 11, DMA1 Channel 1 */ - (uint32_t *)DMA1_Channel2_IRQHandler, /*!< 12, DMA1 Channel 2 */ - (uint32_t *)DMA1_Channel3_IRQHandler, /*!< 13, DMA1 Channel 3 */ - (uint32_t *)DMA1_Channel4_IRQHandler, /*!< 14, DMA1 Channel 4 */ - (uint32_t *)DMA1_Channel5_IRQHandler, /*!< 15, DMA1 Channel 5 */ - (uint32_t *)DMA1_Channel6_IRQHandler, /*!< 16, DMA1 Channel 6 */ - (uint32_t *)DMA1_Channel7_IRQHandler, /*!< 17, DMA1 Channel 7 */ - (uint32_t *)ADC1_2_IRQHandler, /*!< 18, ADC1 & ADC2 */ - (uint32_t *)CAN1_TX_IRQHandler, /*!< 19, CAN1 TX */ - (uint32_t *)CAN1_RX0_IRQHandler, /*!< 20, CAN1 RX0 */ - (uint32_t *)CAN1_RX1_IRQHandler, /*!< 21, CAN1 RX1 */ - (uint32_t *)CAN1_SCE_IRQHandler, /*!< 22, CAN1 SCE */ - (uint32_t *)EINT9_5_IRQHandler, /*!< 23, EINT Line 9..5 */ - (uint32_t *)TMR1_BRK_IRQHandler, /*!< 24, TMR1 Break */ - (uint32_t *)TMR1_UP_IRQHandler, /*!< 25, TMR1 Update */ - (uint32_t *)TMR1_TRG_COM_IRQHandler, /*!< 26, TMR1 Trigger and Commutation */ - (uint32_t *)TMR1_CC_IRQHandler, /*!< 27, TMR1 Capture Compare */ - (uint32_t *)TMR2_IRQHandler, /*!< 28, TMR2 */ - (uint32_t *)TMR3_IRQHandler, /*!< 29, TMR3 */ - (uint32_t *)TMR4_IRQHandler, /*!< 30, TMR4 */ - (uint32_t *)I2C1_EV_IRQHandler, /*!< 31, I2C1 Event */ - (uint32_t *)I2C1_ER_IRQHandler, /*!< 32, I2C1 Error */ - (uint32_t *)I2C2_EV_IRQHandler, /*!< 33, I2C2 Event */ - (uint32_t *)I2C2_ER_IRQHandler, /*!< 34, I2C2 Error */ - (uint32_t *)SPI1_IRQHandler, /*!< 35, SPI1 */ - (uint32_t *)SPI2_IRQHandler, /*!< 36, SPI2 */ - (uint32_t *)USART1_IRQHandler, /*!< 37, USART1 */ - (uint32_t *)USART2_IRQHandler, /*!< 38, USART2 */ - (uint32_t *)USART3_IRQHandler, /*!< 39, USART3 */ - (uint32_t *)EINT15_10_IRQHandler, /*!< 40, EINT Line 15..10 */ - (uint32_t *)RTC_Alarm_IRQHandler, /*!< 41, RTC Alarm through EINT Line */ - (uint32_t *)OTG_FS_WKUP_IRQHandler, /*!< 42, USBD Wakeup from suspend */ - (uint32_t *)0, /*!< 43, Reserved */ - (uint32_t *)0, /*!< 44, Reserved */ - (uint32_t *)0, /*!< 45, Reserved */ - (uint32_t *)0, /*!< 46, Reserved */ - (uint32_t *)0, /*!< 47, Reserved */ - (uint32_t *)0, /*!< 48, Reserved */ - (uint32_t *)0, /*!< 49, Reserved */ - (uint32_t *)TMR5_IRQHandler, /*!< 50, TMR5 */ - (uint32_t *)SPI3_IRQHandler, /*!< 51, SPI3 */ - (uint32_t *)UART4_IRQHandler, /*!< 52, UART4 */ - (uint32_t *)UART5_IRQHandler, /*!< 53, UART5 */ - (uint32_t *)TMR6_IRQHandler, /*!< 54, TMR6 */ - (uint32_t *)TMR7_IRQHandler, /*!< 55, TMR7 */ - (uint32_t *)DMA2_Channel1_IRQHandler, /*!< 56, DMA2 Channel1 */ - (uint32_t *)DMA2_Channel2_IRQHandler, /*!< 57, DMA2 Channel2 */ - (uint32_t *)DMA2_Channel3_IRQHandler, /*!< 58, DMA2 Channel3 */ - (uint32_t *)DMA2_Channel4_IRQHandler, /*!< 59, DMA2 Channel4 */ - (uint32_t *)DMA2_Channel5_IRQHandler, /*!< 60, DMA2 Channel5 */ - (uint32_t *)ETH_IRQHandler, /*!< 61, ETH */ - (uint32_t *)ETH_WKUP_IRQHandler, /*!< 62, ETH Wake up */ - (uint32_t *)CAN2_TX_IRQHandler, /*!< 63, CAN2 TX */ - (uint32_t *)CAN2_RX0_IRQHandler, /*!< 64, CAN2 RX0 */ - (uint32_t *)CAN2_RX1_IRQHandler, /*!< 65, CAN2 RX1 */ - (uint32_t *)CAN2_SCE_IRQHandler, /*!< 66, CAN2 SCE */ - (uint32_t *)OTG_FS_IRQHandler, /*!< 67, OTG FS */ -{%- endif %} -}; -{% endblock %} - -{%- block function_body %} - -void Default_Handler(void) -{ - while (1) - { - } -} -{% endblock %} diff --git a/tools/generator/templates/iwdt.c.j2 b/tools/generator/templates/iwdt.c.j2 new file mode 100644 index 0000000..015a4e3 --- /dev/null +++ b/tools/generator/templates/iwdt.c.j2 @@ -0,0 +1,46 @@ +{# + # Licensed under the Apache License v. 2 (the "License") + # You may not use this file except in compliance with the License. + # You may obtain a copy of the License at + # + # https://www.apache.org/licenses/LICENSE-2.0.html + # + # Unless required by applicable law or agreed to in writing, software + # distributed under the License is distributed on an "AS IS" BASIS, + # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + # See the License for the specific language governing permissions and + # limitations under the License. + # + # Copyright (C) 2022-2024 xqyjlj + # + # @author xqyjlj + # @file iwdt.c.j2 + # + # Change Logs: + # Date Author Notes + # ------------ ---------- ----------------------------------------------- + # 2024-04-01 xqyjlj initial version + # + #} +{%- extends "csp-file-base.c.j2" %} + +{%- block includes %} +#include "csp/iwdt.h" +{%- endblock %} + +{%- block function_body %} +void csp_iwdt_init(void) +{ + IWDT_Enable(); + IWDT_EnableWriteAccess(); + + IWDT_ConfigDivider({{ CSP.project|iwdt_prescaler() }}); + IWDT_ConfigReload({{ CSP.project|iwdt_reload_t(4095) }}U); + + while (IWDT_ReadStatusFlag(IWDT_FLAG_PSCU | IWDT_FLAG_CNTU) == RESET) + { + } + + IWDT_Refresh(); +} +{%- endblock %} diff --git a/tools/generator/templates/iwdt.h.j2 b/tools/generator/templates/iwdt.h.j2 new file mode 100644 index 0000000..528fb4c --- /dev/null +++ b/tools/generator/templates/iwdt.h.j2 @@ -0,0 +1,38 @@ +{# + # Licensed under the Apache License v. 2 (the "License") + # You may not use this file except in compliance with the License. + # You may obtain a copy of the License at + # + # https://www.apache.org/licenses/LICENSE-2.0.html + # + # Unless required by applicable law or agreed to in writing, software + # distributed under the License is distributed on an "AS IS" BASIS, + # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + # See the License for the specific language governing permissions and + # limitations under the License. + # + # Copyright (C) 2022-2024 xqyjlj + # + # @author xqyjlj + # @file iwdt.h.j2 + # + # Change Logs: + # Date Author Notes + # ------------ ---------- ----------------------------------------------- + # 2024-04-01 xqyjlj initial version + # + #} +{%- extends "csp-file-base.h.j2" %} + +{%- block includes %} +#include "apm32f10x.h" +#include "apm32f10x_iwdt.h" +#include "apm32f10x_rcm.h" +{%- endblock %} + +{%- block functions_prototypes %} +/** + * @brief configure iwdt + */ +void csp_iwdt_init(void); +{%- endblock %} diff --git a/tools/generator/templates/linker_script.lds.j2 b/tools/generator/templates/linker_script.lds.j2 index 0289827..3222127 100644 --- a/tools/generator/templates/linker_script.lds.j2 +++ b/tools/generator/templates/linker_script.lds.j2 @@ -1,9 +1,9 @@ {# - # Licensed under the GNU General Public License v. 3 (the "License") + # Licensed under the Apache License v. 2 (the "License") # You may not use this file except in compliance with the License. # You may obtain a copy of the License at # - # https://www.gnu.org/licenses/gpl-3.0.html + # https://www.apache.org/licenses/LICENSE-2.0.html # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, @@ -23,19 +23,19 @@ #} /** * ***************************************************************************** - * @author: {{CSP.author}} - * @file: {{CSP.file}} - * @brief: {{CSP.brief}} - * @version: {{CSP.version}} - * @hal: {{CSP.project.vendor}}.{{CSP.project.gen.hal}}@{{ CSP.project.gen.halVersion }} - * @project: {{CSP.project.name}} - * @targetChip: {{CSP.project.targetChip}} - * @time: {{CSP.time}} + * @author: {{ CSP.author }} + * @file: {{ CSP.file }} + * @brief: {{ CSP.brief }} + * @version: {{ CSP.version }} + * @hal: {{ CSP.project.vendor }}.{{ CSP.project.gen.hal }}@{{ CSP.project.gen.halVersion }} + * @project: {{ CSP.project.name }} + * @targetChip: {{ CSP.project.targetChip }} + * @time: {{ CSP.time }} * * ***************************************************************************** * @attention * - * Copyright (C) {{year}} csp software. + * Copyright (C) {{ year }} csp software. * All rights reserved. * * ***************************************************************************** @@ -46,9 +46,9 @@ /*!< entry point */ ENTRY(Reset_Handler) -__heap_size__ = {{ CSP.project.gen.linker.defaultHeapSize|hex(4) }}; -__stack_size__ = {{ CSP.project.gen.linker.defaultStackSize|hex(4) }}; -__default_stack__ = {{ (info.ram.addr + info.ram.size )|hex(4) }}; +__heap_size__ = {{ CSP.project.gen.linker.heapSize|hex(4) }}; +__stack_size__ = {{ CSP.project.gen.linker.stackSize|hex(4) }}; +__default_stack__ = {{ (info.ram.addr + info.ram.size)|hex(4) }}; MEMORY { diff --git a/tools/generator/templates/main.c.j2 b/tools/generator/templates/main.c.j2 index 033f3b9..7c6181a 100644 --- a/tools/generator/templates/main.c.j2 +++ b/tools/generator/templates/main.c.j2 @@ -1,9 +1,9 @@ {# - # Licensed under the GNU General Public License v. 3 (the "License") + # Licensed under the Apache License v. 2 (the "License") # You may not use this file except in compliance with the License. # You may obtain a copy of the License at # - # https://www.gnu.org/licenses/gpl-3.0.html + # https://www.apache.org/licenses/LICENSE-2.0.html # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, @@ -23,23 +23,34 @@ # #} {%- extends "csp-file-base.main.c.j2" %} + +{%- macro init_func(name, modules) %} + {%- if name in modules %} + csp_{{ name|lower() }}_init(); + {%- endif %} +{%- endmacro %} + {%- set modules = CSP.project.modules|sort %} -{%- block includes %} +{%- block includes %} #include "apm32f10x.h" {%- for module in modules %} -#include "csp/{{module|lower}}.h" +#include "csp/{{ module|lower }}.h" {%- endfor %} -{% endblock %} +{%- endblock includes %} {%- block main_init_body %} - -{%- if 'RCM' in modules %} - csp_rcm_init(); -{%- endif %} -{%- if 'GPIO' in modules %} - csp_gpio_init(); -{%- endif %} + {{- init_func("RCM", modules) }} + {{- init_func("SYS", modules) }} + {{- init_func("GPIO", modules) }} + {{- init_func("USART1", modules) }} + {{- init_func("USART2", modules) }} + {{- init_func("USART3", modules) }} + {{- init_func("UART4", modules) }} + {{- init_func("UART5", modules) }} + {{- init_func("CRC", modules) }} + {{- init_func("IWDT", modules) }} + {{- init_func("WWDT", modules) }} {##} -{%- endblock %} +{%- endblock main_init_body %} diff --git a/tools/generator/templates/main.h.j2 b/tools/generator/templates/main.h.j2 index 423992e..375bd45 100644 --- a/tools/generator/templates/main.h.j2 +++ b/tools/generator/templates/main.h.j2 @@ -1,9 +1,9 @@ {# - # Licensed under the GNU General Public License v. 3 (the "License") + # Licensed under the Apache License v. 2 (the "License") # You may not use this file except in compliance with the License. # You may obtain a copy of the License at # - # https://www.gnu.org/licenses/gpl-3.0.html + # https://www.apache.org/licenses/LICENSE-2.0.html # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, @@ -27,4 +27,4 @@ {%- block includes %} #include "apm32f10x.h" -{% endblock %} +{% endblock includes %} diff --git a/tools/generator/templates/rcm.c.j2 b/tools/generator/templates/rcm.c.j2 index 54008b2..4dcc3ee 100644 --- a/tools/generator/templates/rcm.c.j2 +++ b/tools/generator/templates/rcm.c.j2 @@ -1,9 +1,9 @@ {# - # Licensed under the GNU General Public License v. 3 (the "License") + # Licensed under the Apache License v. 2 (the "License") # You may not use this file except in compliance with the License. # You may obtain a copy of the License at # - # https://www.gnu.org/licenses/gpl-3.0.html + # https://www.apache.org/licenses/LICENSE-2.0.html # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, @@ -25,102 +25,116 @@ {%- extends "csp-file-base.c.j2" %} {%- block includes %} - #include "csp/rcm.h" -{% endblock %} +{% endblock includes %} {%- block function_body %} - +{%- set mco_enabled = CSP.project|rcm_mco_enabled() %} +{%- set mco_io = CSP.project|rcm_mco_io() %} void csp_rcm_init(void) { - {%- if CSP.project|rcm_prefetch_buffer_enabled_t == 'geehy.rcm_prefetch_buffer_enable' %} +{%- if mco_enabled %} + GPIO_Config_T gpio_config = {0}; +{# #} + RCM_EnableAPB2PeriphClock({{ mco_io|gpio_clock }}); +{%- endif %} + + {%- if CSP.project|rcm_prefetch_buffer_enabled_t() == 'rcm_prefetch_buffer_enable' %} FMC_EnablePrefetchBuffer(); {%- endif %} /*!< set flash latency. */ - FMC->CTRL1_B.WS = {{ CSP.project|rcm_flash_latency }}U; - while(FMC->CTRL1_B.WS != {{ CSP.project|rcm_flash_latency }}U) + FMC->CTRL1_B.WS = {{ CSP.project|rcm_flash_latency() }}U; + while (FMC->CTRL1_B.WS != {{ CSP.project|rcm_flash_latency() }}U) { } {%- if CSP.project|rcm_hse_used %} -{##} - {%- set rcm_hse_clock_source = CSP.project|rcm_hse_clock_source_t %} - {%- if rcm_hse_clock_source == 'geehy.rcm_hse_clock_source_oscillator' %} +{# #} + {%- set rcm_hse_clock_source = CSP.project|rcm_hse_clock_source_t() %} + {%- if rcm_hse_clock_source == 'rcm_hse_clock_source_oscillator' %} RCM_ConfigHSE(RCM_HSE_OPEN); {%- else %} RCM_ConfigHSE(RCM_HSE_BYPASS); {%- endif %} /*!< wait till HSE is ready. */ - while(RCM->CTRL_B.HSERDYFLG != 1U) + while (RCM->CTRL_B.HSERDYFLG != 1U) { } {%- endif %} {%- if CSP.project|rcm_hsi_used %} -{##} - RCM_ConfigHSITrim({{ CSP.project|rcm_hsi_calibration_t }}U); +{# #} + RCM_ConfigHSITrim({{ CSP.project|rcm_hsi_calibration_t() }}U); RCM_EnableHSI(); /*!< wait till HSI is ready. */ - while(RCM->CTRL_B.HSIRDYFLG != 1U) + while (RCM->CTRL_B.HSIRDYFLG != 1U) { } {%- endif %} -{%- if CSP.project|rcm_lse_used %} -{##} - {%- set rcm_lse_clock_source = CSP.project|rcm_lse_clock_source_t %} - {%- if rcm_lse_clock_source == 'geehy.rcm_lse_clock_source_oscillator' %} +{%- if CSP.project|rcm_lse_used() %} +{# #} + {%- set rcm_lse_clock_source = CSP.project|rcm_lse_clock_source_t() %} + {%- if rcm_lse_clock_source == 'rcm_lse_clock_source_oscillator' %} RCM_ConfigLSE(RCM_LSE_OPEN); {%- else %} RCM_ConfigLSE(RCM_LSE_BYPASS); {%- endif %} /*!< wait till LSE is ready. */ - while(RCM->CTRL_B.LSERDYFLG != 1U) + while (RCM->CTRL_B.LSERDYFLG != 1U) { } {%- endif %} -{%- if CSP.project|rcm_lse_used %} -{##} +{%- if CSP.project|rcm_lse_used() %} +{# #} RCM_EnableLSI(); /*!< wait till LSI is ready. */ - while(RCM->CTRL_B.LSIRDYFLG != 1U) + while (RCM->CTRL_B.LSIRDYFLG != 1U) { } {%- endif %} -{%- if CSP.project|rcm_pll_used %} -{##} - RCM_ConfigPLL({{ CSP.project|rcm_pll_clk_selector }}, {{ CSP.project|rcm_pll_mul }}); +{%- if CSP.project|rcm_pll_used() %} +{# #} + RCM_ConfigPLL({{ CSP.project|rcm_pll_clk_mux() }}, {{ CSP.project|rcm_pll_clk_mul() }}); RCM_EnablePLL(); /*!< wait till PLL is ready. */ - while(RCM->CTRL_B.PLL1RDYFLG != 1U) + while (RCM->CTRL_B.PLL1RDYFLG != 1U) { } {%- endif %} - RCM_ConfigAHB({{ CSP.project|rcm_ahb_div }}); - RCM_ConfigAPB1({{ CSP.project|rcm_apb1_div }}); - RCM_ConfigAPB2({{ CSP.project|rcm_apb2_div }}); + RCM_ConfigAHB({{ CSP.project|rcm_ahb_clk_div_hclk() }}); + RCM_ConfigAPB1({{ CSP.project|rcm_apb1_div() }}); + RCM_ConfigAPB2({{ CSP.project|rcm_apb2_div() }}); - RCM_ConfigSYSCLK({{ CSP.project|rcm_system_clk_selector }}); + RCM_ConfigSYSCLK({{ CSP.project|rcm_system_clk_mux() }}); /*!< wait till SYSCLK is ready. */ - while(RCM_ReadSYSCLKSource() != {{ CSP.project|rcm_system_clk_selector }}) + while (RCM_ReadSYSCLKSource() != {{ CSP.project|rcm_system_clk_mux() }}) { } - SystemCoreClock = {{ CSP.project|rcm_sys_timer_clk_out_t|int }}U; + SystemCoreClock = {{ CSP.project|rcm_sys_timer_clk_out_t()|int }}U; + +{%- if mco_enabled %} +{# #} + {%- set port = mco_io|gpio_channel_to_port %} + {%- set pin = mco_io|gpio_channel_to_pin %} + /*!< configure the {{ port }}<{{ pin }}> -> RCM:MCO. */ + gpio_config.pin = {{ pin }}; + gpio_config.mode = {{ CSP.project|gpio_io_mode(port, pin) }}; + gpio_config.speed = {{ CSP.project|gpio_io_speed(port, pin) }}; + GPIO_Config({{ port }}, &gpio_config); -{%- if CSP.project|rcm_mco_enabled_t(false) %} -{##} - RCM_ConfigMCO({{ CSP.project|rcm_mco_clk_selector }}); + RCM_ConfigMCO({{ CSP.project|rcm_mco_clk_mux() }}); {%- endif %} } -{% endblock %} +{% endblock function_body %} diff --git a/tools/generator/templates/rcm.h.j2 b/tools/generator/templates/rcm.h.j2 index e754235..04a7fb2 100644 --- a/tools/generator/templates/rcm.h.j2 +++ b/tools/generator/templates/rcm.h.j2 @@ -1,9 +1,9 @@ {# - # Licensed under the GNU General Public License v. 3 (the "License") + # Licensed under the Apache License v. 2 (the "License") # You may not use this file except in compliance with the License. # You may obtain a copy of the License at # - # https://www.gnu.org/licenses/gpl-3.0.html + # https://www.apache.org/licenses/LICENSE-2.0.html # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, @@ -25,18 +25,17 @@ {%- extends "csp-file-base.h.j2" %} {%- block includes %} - #include "apm32f10x.h" #include "apm32f10x_fmc.h" +#include "apm32f10x_gpio.h" #include "apm32f10x_misc.h" #include "apm32f10x_rcm.h" #include "system_apm32f10x.h" -{% endblock %} +{%- endblock %} {%- block functions_prototypes %} - /** * @brief configure rcm */ void csp_rcm_init(void); -{% endblock %} +{%- endblock %} diff --git a/tools/generator/templates/startup_arm.s.j2 b/tools/generator/templates/startup_arm.s.j2 new file mode 100644 index 0000000..0ca8fec --- /dev/null +++ b/tools/generator/templates/startup_arm.s.j2 @@ -0,0 +1,690 @@ +{# + # Licensed under the Apache License v. 2 (the "License") + # You may not use this file except in compliance with the License. + # You may obtain a copy of the License at + # + # https://www.apache.org/licenses/LICENSE-2.0.html + # + # Unless required by applicable law or agreed to in writing, software + # distributed under the License is distributed on an "AS IS" BASIS, + # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + # See the License for the specific language governing permissions and + # limitations under the License. + # + # Copyright (C) 2025-2025 xqyjlj + # + # @author xqyjlj + # @file startup_arm.s.j2 + # + # Change Logs: + # Date Author Notes + # ------------ ---------- ----------------------------------------------- + # 2025-04-13 xqyjlj initial version + #} + +{%- set info = CSP.project|chip_info %} +; +; ****************************************************************************** +; @author: {{ CSP.author }} +; @file: {{ CSP.file }} +; @brief: {{ CSP.brief }} +; @version: {{ CSP.version }} +; @hal: {{ CSP.project.vendor }}.{{ CSP.project.gen.hal }}@{{ CSP.project.gen.halVersion }} +; @project: {{ CSP.project.name }} +; @targetChip: {{ CSP.project.targetChip }} +; @time: {{ CSP.time }} +; +; ****************************************************************************** +; @attention +; +; Copyright (C) {{ year }} csp software. +; All rights reserved. +; +; ****************************************************************************** +; + +; Stack Configuration +Stack_Size EQU 0x00000400 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp +__default_stack__ + EXPORT __default_stack__ + +; Heap Configuration +Heap_Size EQU 0x00000200 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; !< Top of Stack + DCD Reset_Handler ; !< -15, Reset Handler + DCD NMI_Handler ; !< -14, NMI Handler + DCD HardFault_Handler ; !< -13, Hard Fault Handler + DCD MemManage_Handler ; !< -12, MPU Fault Handler + DCD BusFault_Handler ; !< -11, Bus Fault Handler + DCD UsageFault_Handler ; !< -10, Usage Fault Handler + DCD 0 ; !< -9, Reserved + DCD 0 ; !< -8, Reserved + DCD 0 ; !< -7, Reserved + DCD 0 ; !< -6, Reserved + DCD SVC_Handler ; !< -5, SVCall Handler + DCD DebugMon_Handler ; !< -4, Debug Monitor Handler + DCD 0 ; !< -3, Reserved + DCD PendSV_Handler ; !< -2, PendSV Handler + DCD SysTick_Handler ; !< -1, SysTick Handler +{%- if info.class == "APM32F10X_MD" %} + DCD WWDT_IRQHandler ; !< 0, Window Watchdog + DCD PVD_IRQHandler ; !< 1, PVD through EINT Line detect + DCD TAMPER_IRQHandler ; !< 2, Tamper + DCD RTC_IRQHandler ; !< 3, RTC + DCD FLASH_IRQHandler ; !< 4, Flash + DCD RCM_IRQHandler ; !< 5, RCM + DCD EINT0_IRQHandler ; !< 6, EINT Line 0 + DCD EINT1_IRQHandler ; !< 7, EINT Line 1 + DCD EINT2_IRQHandler ; !< 8, EINT Line 2 + DCD EINT3_IRQHandler ; !< 9, EINT Line 3 + DCD EINT4_IRQHandler ; !< 10, EINT Line 4 + DCD DMA1_Channel1_IRQHandler ; !< 11, DMA1 Channel 1 + DCD DMA1_Channel2_IRQHandler ; !< 12, DMA1 Channel 2 + DCD DMA1_Channel3_IRQHandler ; !< 13, DMA1 Channel 3 + DCD DMA1_Channel4_IRQHandler ; !< 14, DMA1 Channel 4 + DCD DMA1_Channel5_IRQHandler ; !< 15, DMA1 Channel 5 + DCD DMA1_Channel6_IRQHandler ; !< 16, DMA1 Channel 6 + DCD DMA1_Channel7_IRQHandler ; !< 17, DMA1 Channel 7 + DCD ADC1_2_IRQHandler ; !< 18, ADC1_2 + DCD USBD1_HP_CAN1_TX_IRQHandler ; !< 19, USBD1 High Priority or CAN1 TX + DCD USBD1_LP_CAN1_RX0_IRQHandler ; !< 20, USBD1 Low Priority or CAN1 RX0 + DCD CAN1_RX1_IRQHandler ; !< 21, CAN1 RX1 + DCD CAN1_SCE_IRQHandler ; !< 22, CAN1 SCE + DCD EINT9_5_IRQHandler ; !< 23, EINT Line 9..5 + DCD TMR1_BRK_IRQHandler ; !< 24, TMR1 Break + DCD TMR1_UP_IRQHandler ; !< 25, TMR1 Update + DCD TMR1_TRG_COM_IRQHandler ; !< 26, TMR1 Trigger and Commutation + DCD TMR1_CC_IRQHandler ; !< 27, TMR1 Capture Compare + DCD TMR2_IRQHandler ; !< 28, TMR2 + DCD TMR3_IRQHandler ; !< 29, TMR3 + DCD TMR4_IRQHandler ; !< 30, TMR4 + DCD I2C1_EV_IRQHandler ; !< 31, I2C1 Event + DCD I2C1_ER_IRQHandler ; !< 32, I2C1 Error + DCD I2C2_EV_IRQHandler ; !< 33, I2C2 Event + DCD I2C2_ER_IRQHandler ; !< 34, I2C2 Error + DCD SPI1_IRQHandler ; !< 35, SPI1 + DCD SPI2_IRQHandler ; !< 36, SPI2 + DCD USART1_IRQHandler ; !< 37, USART1 + DCD USART2_IRQHandler ; !< 38, USART2 + DCD USART3_IRQHandler ; !< 39, USART3 + DCD EINT15_10_IRQHandler ; !< 40, EINT Line 15..10 + DCD RTCAlarm_IRQHandler ; !< 41, RTC Alarm through EINT Line + DCD USBDWakeUp_IRQHandler ; !< 42, USBD Wakeup from suspend + DCD FPU_IRQHandler ; !< 43, FPU + DCD QSPI_IRQHandler ; !< 44, QSPI + DCD USBD2_HP_IRQHandler ; !< 45, USBD2 High Priority + DCD USBD2_LP_IRQHandler ; !< 46, USBD2 Low Priority +{%- elif info.class == "APM32F10X_HD" %} + DCD WWDT_IRQHandler ; !< 0, Window Watchdog + DCD PVD_IRQHandler ; !< 1, PVD through EINT Line detect + DCD TAMPER_IRQHandler ; !< 2, Tamper + DCD RTC_IRQHandler ; !< 3, RTC + DCD FLASH_IRQHandler ; !< 4, Flash + DCD RCM_IRQHandler ; !< 5, RCM + DCD EINT0_IRQHandler ; !< 6, EINT Line 0 + DCD EINT1_IRQHandler ; !< 7, EINT Line 1 + DCD EINT2_IRQHandler ; !< 8, EINT Line 2 + DCD EINT3_IRQHandler ; !< 9, EINT Line 3 + DCD EINT4_IRQHandler ; !< 10, EINT Line 4 + DCD DMA1_Channel1_IRQHandler ; !< 11, DMA1 Channel 1 + DCD DMA1_Channel2_IRQHandler ; !< 12, DMA1 Channel 2 + DCD DMA1_Channel3_IRQHandler ; !< 13, DMA1 Channel 3 + DCD DMA1_Channel4_IRQHandler ; !< 14, DMA1 Channel 4 + DCD DMA1_Channel5_IRQHandler ; !< 15, DMA1 Channel 5 + DCD DMA1_Channel6_IRQHandler ; !< 16, DMA1 Channel 6 + DCD DMA1_Channel7_IRQHandler ; !< 17, DMA1 Channel 7 + DCD ADC1_2_IRQHandler ; !< 18, ADC1 & ADC2 + DCD USBD1_HP_CAN1_TX_IRQHandler ; !< 19, USBD1 High Priority or CAN1 TX + DCD USBD1_LP_CAN1_RX0_IRQHandler ; !< 20, USBD1 Low Priority or CAN1 RX0 + DCD CAN1_RX1_IRQHandler ; !< 21, CAN1 RX1 + DCD CAN1_SCE_IRQHandler ; !< 22, CAN1 SCE + DCD EINT9_5_IRQHandler ; !< 23, EINT Line 9..5 + DCD TMR1_BRK_IRQHandler ; !< 24, TMR1 Break + DCD TMR1_UP_IRQHandler ; !< 25, TMR1 Update + DCD TMR1_TRG_COM_IRQHandler ; !< 26, TMR1 Trigger and Commutation + DCD TMR1_CC_IRQHandler ; !< 27, TMR1 Capture Compare + DCD TMR2_IRQHandler ; !< 28, TMR2 + DCD TMR3_IRQHandler ; !< 29, TMR3 + DCD TMR4_IRQHandler ; !< 30, TMR4 + DCD I2C1_EV_IRQHandler ; !< 31, I2C1 Event + DCD I2C1_ER_IRQHandler ; !< 32, I2C1 Error + DCD I2C2_EV_IRQHandler ; !< 33, I2C2 Event + DCD I2C2_ER_IRQHandler ; !< 34, I2C2 Error + DCD SPI1_IRQHandler ; !< 35, SPI1 + DCD SPI2_IRQHandler ; !< 36, SPI2 + DCD USART1_IRQHandler ; !< 37, USART1 + DCD USART2_IRQHandler ; !< 38, USART2 + DCD USART3_IRQHandler ; !< 39, USART3 + DCD EINT15_10_IRQHandler ; !< 40, EINT Line 15..10 + DCD RTCAlarm_IRQHandler ; !< 41, RTC Alarm through EINT Line + DCD USBDWakeUp_IRQHandler ; !< 42, USBD Wakeup from suspend + DCD TMR8_BRK_IRQHandler ; !< 43, TMR8 Break + DCD TMR8_UP_IRQHandler ; !< 44, TMR8 Update + DCD TMR8_TRG_COM_IRQHandler ; !< 45, TMR8 Trigger and Commutation + DCD TMR8_CC_IRQHandler ; !< 46, TMR8 Capture Compare + DCD ADC3_IRQHandler ; !< 47, ADC3 + DCD EMMC_IRQHandler ; !< 48, EMMC + DCD SDIO_IRQHandler ; !< 49, SDIO + DCD TMR5_IRQHandler ; !< 50, TMR5 + DCD SPI3_IRQHandler ; !< 51, SPI3 + DCD UART4_IRQHandler ; !< 52, UART4 + DCD UART5_IRQHandler ; !< 53, UART5 + DCD TMR6_IRQHandler ; !< 54, TMR6 + DCD TMR7_IRQHandler ; !< 55, TMR7 + DCD DMA2_Channel1_IRQHandler ; !< 56, DMA2 Channel1 + DCD DMA2_Channel2_IRQHandler ; !< 57, DMA2 Channel2 + DCD DMA2_Channel3_IRQHandler ; !< 58, DMA2 Channel3 + DCD DMA2_Channel4_5_IRQHandler ; !< 59, DMA2 Channel4 & Channel5 + DCD 0 ; !< 60, Reserved + DCD USBD2_HP_CAN2_TX_IRQHandler ; !< 61, USBD2 High Priority or CAN2 TX + DCD USBD2_LP_CAN2_RX0_IRQHandler ; !< 62, USBD2 Low Priority or CAN2 RX0 + DCD CAN2_RX1_IRQHandler ; !< 63, CAN2 RX1 + DCD CAN2_SCE_IRQHandler ; !< 64, CAN2 SCE +{%- elif info.class == "APM32F10X_CL" %} + DCD WWDT_IRQHandler ; !< 0, Window Watchdog + DCD PVD_IRQHandler ; !< 1, PVD through EINT Line detect + DCD TAMPER_IRQHandler ; !< 2, Tamper + DCD RTC_IRQHandler ; !< 3, RTC + DCD FLASH_IRQHandler ; !< 4, Flash + DCD RCM_IRQHandler ; !< 5, RCM + DCD EINT0_IRQHandler ; !< 6, EINT Line 0 + DCD EINT1_IRQHandler ; !< 7, EINT Line 1 + DCD EINT2_IRQHandler ; !< 8, EINT Line 2 + DCD EINT3_IRQHandler ; !< 9, EINT Line 3 + DCD EINT4_IRQHandler ; !< 10, EINT Line 4 + DCD DMA1_Channel1_IRQHandler ; !< 11, DMA1 Channel 1 + DCD DMA1_Channel2_IRQHandler ; !< 12, DMA1 Channel 2 + DCD DMA1_Channel3_IRQHandler ; !< 13, DMA1 Channel 3 + DCD DMA1_Channel4_IRQHandler ; !< 14, DMA1 Channel 4 + DCD DMA1_Channel5_IRQHandler ; !< 15, DMA1 Channel 5 + DCD DMA1_Channel6_IRQHandler ; !< 16, DMA1 Channel 6 + DCD DMA1_Channel7_IRQHandler ; !< 17, DMA1 Channel 7 + DCD ADC1_2_IRQHandler ; !< 18, ADC1 & ADC2 + DCD CAN1_TX_IRQHandler ; !< 19, CAN1 TX + DCD CAN1_RX0_IRQHandler ; !< 20, CAN1 RX0 + DCD CAN1_RX1_IRQHandler ; !< 21, CAN1 RX1 + DCD CAN1_SCE_IRQHandler ; !< 22, CAN1 SCE + DCD EINT9_5_IRQHandler ; !< 23, EINT Line 9..5 + DCD TMR1_BRK_IRQHandler ; !< 24, TMR1 Break + DCD TMR1_UP_IRQHandler ; !< 25, TMR1 Update + DCD TMR1_TRG_COM_IRQHandler ; !< 26, TMR1 Trigger and Commutation + DCD TMR1_CC_IRQHandler ; !< 27, TMR1 Capture Compare + DCD TMR2_IRQHandler ; !< 28, TMR2 + DCD TMR3_IRQHandler ; !< 29, TMR3 + DCD TMR4_IRQHandler ; !< 30, TMR4 + DCD I2C1_EV_IRQHandler ; !< 31, I2C1 Event + DCD I2C1_ER_IRQHandler ; !< 32, I2C1 Error + DCD I2C2_EV_IRQHandler ; !< 33, I2C2 Event + DCD I2C2_ER_IRQHandler ; !< 34, I2C2 Error + DCD SPI1_IRQHandler ; !< 35, SPI1 + DCD SPI2_IRQHandler ; !< 36, SPI2 + DCD USART1_IRQHandler ; !< 37, USART1 + DCD USART2_IRQHandler ; !< 38, USART2 + DCD USART3_IRQHandler ; !< 39, USART3 + DCD EINT15_10_IRQHandler ; !< 40, EINT Line 15..10 + DCD RTCAlarm_IRQHandler ; !< 41, RTC Alarm through EINT Line + DCD OTG_FS_WKUP_IRQHandler ; !< 42, USBD Wakeup from suspend + DCD 0 ; !< 43, Reserved + DCD 0 ; !< 44, Reserved + DCD 0 ; !< 45, Reserved + DCD 0 ; !< 46, Reserved + DCD 0 ; !< 47, Reserved + DCD 0 ; !< 48, Reserved + DCD 0 ; !< 49, Reserved + DCD TMR5_IRQHandler ; !< 50, TMR5 + DCD SPI3_IRQHandler ; !< 51, SPI3 + DCD UART4_IRQHandler ; !< 52, UART4 + DCD UART5_IRQHandler ; !< 53, UART5 + DCD TMR6_IRQHandler ; !< 54, TMR6 + DCD TMR7_IRQHandler ; !< 55, TMR7 + DCD DMA2_Channel1_IRQHandler ; !< 56, DMA2 Channel1 + DCD DMA2_Channel2_IRQHandler ; !< 57, DMA2 Channel2 + DCD DMA2_Channel3_IRQHandler ; !< 58, DMA2 Channel3 + DCD DMA2_Channel4_IRQHandler ; !< 59, DMA2 Channel4 + DCD DMA2_Channel5_IRQHandler ; !< 60, DMA2 Channel5 + DCD ETH_IRQHandler ; !< 61, ETH + DCD ETH_WKUP_IRQHandler ; !< 62, ETH Wake up + DCD CAN2_TX_IRQHandler ; !< 63, CAN2 TX + DCD CAN2_RX0_IRQHandler ; !< 64, CAN2 RX0 + DCD CAN2_RX1_IRQHandler ; !< 65, CAN2 RX1 + DCD CAN2_SCE_IRQHandler ; !< 66, CAN2 SCE + DCD OTG_FS_IRQHandler ; !< 67, OTG FS +{%- endif %} +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + +; Handler Configuration + AREA |.text|, CODE, READONLY + +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT __main + IMPORT SystemInit + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +Default_Handler PROC + EXPORT NMI_Handler [WEAK] + EXPORT HardFault_Handler [WEAK] + EXPORT MemManage_Handler [WEAK] + EXPORT BusFault_Handler [WEAK] + EXPORT UsageFault_Handler [WEAK] + EXPORT SVC_Handler [WEAK] + EXPORT DebugMon_Handler [WEAK] + EXPORT PendSV_Handler [WEAK] + EXPORT SysTick_Handler [WEAK] +{%- if info.class == "APM32F10X_MD" %} + EXPORT WWDT_IRQHandler [WEAK] + EXPORT PVD_IRQHandler [WEAK] + EXPORT TAMPER_IRQHandler [WEAK] + EXPORT RTC_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCM_IRQHandler [WEAK] + EXPORT EINT0_IRQHandler [WEAK] + EXPORT EINT1_IRQHandler [WEAK] + EXPORT EINT2_IRQHandler [WEAK] + EXPORT EINT3_IRQHandler [WEAK] + EXPORT EINT4_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_IRQHandler [WEAK] + EXPORT DMA1_Channel3_IRQHandler [WEAK] + EXPORT DMA1_Channel4_IRQHandler [WEAK] + EXPORT DMA1_Channel5_IRQHandler [WEAK] + EXPORT DMA1_Channel6_IRQHandler [WEAK] + EXPORT DMA1_Channel7_IRQHandler [WEAK] + EXPORT ADC1_2_IRQHandler [WEAK] + EXPORT USBD1_HP_CAN1_TX_IRQHandler [WEAK] + EXPORT USBD1_LP_CAN1_RX0_IRQHandler [WEAK] + EXPORT CAN1_RX1_IRQHandler [WEAK] + EXPORT CAN1_SCE_IRQHandler [WEAK] + EXPORT EINT9_5_IRQHandler [WEAK] + EXPORT TMR1_BRK_IRQHandler [WEAK] + EXPORT TMR1_UP_IRQHandler [WEAK] + EXPORT TMR1_TRG_COM_IRQHandler [WEAK] + EXPORT TMR1_CC_IRQHandler [WEAK] + EXPORT TMR2_IRQHandler [WEAK] + EXPORT TMR3_IRQHandler [WEAK] + EXPORT TMR4_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EINT15_10_IRQHandler [WEAK] + EXPORT RTCAlarm_IRQHandler [WEAK] + EXPORT USBDWakeUp_IRQHandler [WEAK] + EXPORT FPU_IRQHandler [WEAK] + EXPORT QSPI_IRQHandler [WEAK] + EXPORT USBD2_HP_IRQHandler [WEAK] + EXPORT USBD2_LP_IRQHandler [WEAK] +{%- elif info.class == "APM32F10X_HD" %} + EXPORT WWDT_IRQHandler [WEAK] + EXPORT PVD_IRQHandler [WEAK] + EXPORT TAMPER_IRQHandler [WEAK] + EXPORT RTC_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCM_IRQHandler [WEAK] + EXPORT EINT0_IRQHandler [WEAK] + EXPORT EINT1_IRQHandler [WEAK] + EXPORT EINT2_IRQHandler [WEAK] + EXPORT EINT3_IRQHandler [WEAK] + EXPORT EINT4_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_IRQHandler [WEAK] + EXPORT DMA1_Channel3_IRQHandler [WEAK] + EXPORT DMA1_Channel4_IRQHandler [WEAK] + EXPORT DMA1_Channel5_IRQHandler [WEAK] + EXPORT DMA1_Channel6_IRQHandler [WEAK] + EXPORT DMA1_Channel7_IRQHandler [WEAK] + EXPORT ADC1_2_IRQHandler [WEAK] + EXPORT USBD1_HP_CAN1_TX_IRQHandler [WEAK] + EXPORT USBD1_LP_CAN1_RX0_IRQHandler [WEAK] + EXPORT CAN1_RX1_IRQHandler [WEAK] + EXPORT CAN1_SCE_IRQHandler [WEAK] + EXPORT EINT9_5_IRQHandler [WEAK] + EXPORT TMR1_BRK_IRQHandler [WEAK] + EXPORT TMR1_UP_IRQHandler [WEAK] + EXPORT TMR1_TRG_COM_IRQHandler [WEAK] + EXPORT TMR1_CC_IRQHandler [WEAK] + EXPORT TMR2_IRQHandler [WEAK] + EXPORT TMR3_IRQHandler [WEAK] + EXPORT TMR4_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EINT15_10_IRQHandler [WEAK] + EXPORT RTCAlarm_IRQHandler [WEAK] + EXPORT USBDWakeUp_IRQHandler [WEAK] + EXPORT TMR8_BRK_IRQHandler [WEAK] + EXPORT TMR8_UP_IRQHandler [WEAK] + EXPORT TMR8_TRG_COM_IRQHandler [WEAK] + EXPORT TMR8_CC_IRQHandler [WEAK] + EXPORT ADC3_IRQHandler [WEAK] + EXPORT EMMC_IRQHandler [WEAK] + EXPORT SDIO_IRQHandler [WEAK] + EXPORT TMR5_IRQHandler [WEAK] + EXPORT SPI3_IRQHandler [WEAK] + EXPORT UART4_IRQHandler [WEAK] + EXPORT UART5_IRQHandler [WEAK] + EXPORT TMR6_IRQHandler [WEAK] + EXPORT TMR7_IRQHandler [WEAK] + EXPORT DMA2_Channel1_IRQHandler [WEAK] + EXPORT DMA2_Channel2_IRQHandler [WEAK] + EXPORT DMA2_Channel3_IRQHandler [WEAK] + EXPORT DMA2_Channel4_5_IRQHandler [WEAK] + EXPORT USBD2_HP_CAN2_TX_IRQHandler [WEAK] + EXPORT USBD2_LP_CAN2_RX0_IRQHandler [WEAK] + EXPORT CAN2_RX1_IRQHandler [WEAK] + EXPORT CAN2_SCE_IRQHandler [WEAK] +{%- elif info.class == "APM32F10X_CL" %} + EXPORT WWDT_IRQHandler [WEAK] + EXPORT PVD_IRQHandler [WEAK] + EXPORT TAMPER_IRQHandler [WEAK] + EXPORT RTC_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCM_IRQHandler [WEAK] + EXPORT EINT0_IRQHandler [WEAK] + EXPORT EINT1_IRQHandler [WEAK] + EXPORT EINT2_IRQHandler [WEAK] + EXPORT EINT3_IRQHandler [WEAK] + EXPORT EINT4_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_IRQHandler [WEAK] + EXPORT DMA1_Channel3_IRQHandler [WEAK] + EXPORT DMA1_Channel4_IRQHandler [WEAK] + EXPORT DMA1_Channel5_IRQHandler [WEAK] + EXPORT DMA1_Channel6_IRQHandler [WEAK] + EXPORT DMA1_Channel7_IRQHandler [WEAK] + EXPORT ADC1_2_IRQHandler [WEAK] + EXPORT CAN1_TX_IRQHandler [WEAK] + EXPORT CAN1_RX0_IRQHandler [WEAK] + EXPORT CAN1_RX1_IRQHandler [WEAK] + EXPORT CAN1_SCE_IRQHandler [WEAK] + EXPORT EINT9_5_IRQHandler [WEAK] + EXPORT TMR1_BRK_IRQHandler [WEAK] + EXPORT TMR1_UP_IRQHandler [WEAK] + EXPORT TMR1_TRG_COM_IRQHandler [WEAK] + EXPORT TMR1_CC_IRQHandler [WEAK] + EXPORT TMR2_IRQHandler [WEAK] + EXPORT TMR3_IRQHandler [WEAK] + EXPORT TMR4_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EINT15_10_IRQHandler [WEAK] + EXPORT RTCAlarm_IRQHandler [WEAK] + EXPORT OTG_FS_WKUP_IRQHandler [WEAK] + EXPORT TMR5_IRQHandler [WEAK] + EXPORT SPI3_IRQHandler [WEAK] + EXPORT UART4_IRQHandler [WEAK] + EXPORT UART5_IRQHandler [WEAK] + EXPORT TMR6_IRQHandler [WEAK] + EXPORT TMR7_IRQHandler [WEAK] + EXPORT DMA2_Channel1_IRQHandler [WEAK] + EXPORT DMA2_Channel2_IRQHandler [WEAK] + EXPORT DMA2_Channel3_IRQHandler [WEAK] + EXPORT DMA2_Channel4_IRQHandler [WEAK] + EXPORT DMA2_Channel5_IRQHandler [WEAK] + EXPORT ETH_IRQHandler [WEAK] + EXPORT ETH_WKUP_IRQHandler [WEAK] + EXPORT CAN2_TX_IRQHandler [WEAK] + EXPORT CAN2_RX0_IRQHandler [WEAK] + EXPORT CAN2_RX1_IRQHandler [WEAK] + EXPORT CAN2_SCE_IRQHandler [WEAK] + EXPORT OTG_FS_IRQHandler [WEAK] +{%- endif %} + +NMI_Handler +HardFault_Handler +MemManage_Handler +BusFault_Handler +UsageFault_Handler +SVC_Handler +DebugMon_Handler +PendSV_Handler +SysTick_Handler +{%- if info.class == "APM32F10X_MD" %} +WWDT_IRQHandler +PVD_IRQHandler +TAMPER_IRQHandler +RTC_IRQHandler +FLASH_IRQHandler +RCM_IRQHandler +EINT0_IRQHandler +EINT1_IRQHandler +EINT2_IRQHandler +EINT3_IRQHandler +EINT4_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_IRQHandler +DMA1_Channel3_IRQHandler +DMA1_Channel4_IRQHandler +DMA1_Channel5_IRQHandler +DMA1_Channel6_IRQHandler +DMA1_Channel7_IRQHandler +ADC1_2_IRQHandler +USBD1_HP_CAN1_TX_IRQHandler +USBD1_LP_CAN1_RX0_IRQHandler +CAN1_RX1_IRQHandler +CAN1_SCE_IRQHandler +EINT9_5_IRQHandler +TMR1_BRK_IRQHandler +TMR1_UP_IRQHandler +TMR1_TRG_COM_IRQHandler +TMR1_CC_IRQHandler +TMR2_IRQHandler +TMR3_IRQHandler +TMR4_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EINT15_10_IRQHandler +RTCAlarm_IRQHandler +USBDWakeUp_IRQHandler +FPU_IRQHandler +QSPI_IRQHandler +USBD2_HP_IRQHandler +USBD2_LP_IRQHandler +{%- elif info.class == "APM32F10X_HD" %} +WWDT_IRQHandler +PVD_IRQHandler +TAMPER_IRQHandler +RTC_IRQHandler +FLASH_IRQHandler +RCM_IRQHandler +EINT0_IRQHandler +EINT1_IRQHandler +EINT2_IRQHandler +EINT3_IRQHandler +EINT4_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_IRQHandler +DMA1_Channel3_IRQHandler +DMA1_Channel4_IRQHandler +DMA1_Channel5_IRQHandler +DMA1_Channel6_IRQHandler +DMA1_Channel7_IRQHandler +ADC1_2_IRQHandler +USBD1_HP_CAN1_TX_IRQHandler +USBD1_LP_CAN1_RX0_IRQHandler +CAN1_RX1_IRQHandler +CAN1_SCE_IRQHandler +EINT9_5_IRQHandler +TMR1_BRK_IRQHandler +TMR1_UP_IRQHandler +TMR1_TRG_COM_IRQHandler +TMR1_CC_IRQHandler +TMR2_IRQHandler +TMR3_IRQHandler +TMR4_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EINT15_10_IRQHandler +RTCAlarm_IRQHandler +USBDWakeUp_IRQHandler +TMR8_BRK_IRQHandler +TMR8_UP_IRQHandler +TMR8_TRG_COM_IRQHandler +TMR8_CC_IRQHandler +ADC3_IRQHandler +EMMC_IRQHandler +SDIO_IRQHandler +TMR5_IRQHandler +SPI3_IRQHandler +UART4_IRQHandler +UART5_IRQHandler +TMR6_IRQHandler +TMR7_IRQHandler +DMA2_Channel1_IRQHandler +DMA2_Channel2_IRQHandler +DMA2_Channel3_IRQHandler +DMA2_Channel4_5_IRQHandler +USBD2_HP_CAN2_TX_IRQHandler +USBD2_LP_CAN2_RX0_IRQHandler +CAN2_RX1_IRQHandler +CAN2_SCE_IRQHandler +{%- elif info.class == "APM32F10X_CL" %} +WWDT_IRQHandler +PVD_IRQHandler +TAMPER_IRQHandler +RTC_IRQHandler +FLASH_IRQHandler +RCM_IRQHandler +EINT0_IRQHandler +EINT1_IRQHandler +EINT2_IRQHandler +EINT3_IRQHandler +EINT4_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_IRQHandler +DMA1_Channel3_IRQHandler +DMA1_Channel4_IRQHandler +DMA1_Channel5_IRQHandler +DMA1_Channel6_IRQHandler +DMA1_Channel7_IRQHandler +ADC1_2_IRQHandler +CAN1_TX_IRQHandler +CAN1_RX0_IRQHandler +CAN1_RX1_IRQHandler +CAN1_SCE_IRQHandler +EINT9_5_IRQHandler +TMR1_BRK_IRQHandler +TMR1_UP_IRQHandler +TMR1_TRG_COM_IRQHandler +TMR1_CC_IRQHandler +TMR2_IRQHandler +TMR3_IRQHandler +TMR4_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EINT15_10_IRQHandler +RTCAlarm_IRQHandler +OTG_FS_WKUP_IRQHandler +TMR5_IRQHandler +SPI3_IRQHandler +UART4_IRQHandler +UART5_IRQHandler +TMR6_IRQHandler +TMR7_IRQHandler +DMA2_Channel1_IRQHandler +DMA2_Channel2_IRQHandler +DMA2_Channel3_IRQHandler +DMA2_Channel4_IRQHandler +DMA2_Channel5_IRQHandler +ETH_IRQHandler +ETH_WKUP_IRQHandler +CAN2_TX_IRQHandler +CAN2_RX0_IRQHandler +CAN2_RX1_IRQHandler +CAN2_SCE_IRQHandler +OTG_FS_IRQHandler +{%- endif %} + + B . + ENDP + ALIGN + +; User Stack and Heap initialization + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, = (Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END diff --git a/tools/generator/templates/startup_gcc.S.j2 b/tools/generator/templates/startup_gcc.S.j2 index 80a9336..113dc77 100644 --- a/tools/generator/templates/startup_gcc.S.j2 +++ b/tools/generator/templates/startup_gcc.S.j2 @@ -1,9 +1,9 @@ {# - # Licensed under the GNU General Public License v. 3 (the "License") + # Licensed under the Apache License v. 2 (the "License") # You may not use this file except in compliance with the License. # You may obtain a copy of the License at # - # https://www.gnu.org/licenses/gpl-3.0.html + # https://www.apache.org/licenses/LICENSE-2.0.html # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, @@ -21,21 +21,23 @@ # ------------ ---------- ----------------------------------------------- # 2024-12-14 xqyjlj initial version #} + +{%- set info = CSP.project|chip_info %} /** * ***************************************************************************** - * @author: {{CSP.author}} - * @file: {{CSP.file}} - * @brief: {{CSP.brief}} - * @version: {{CSP.version}} - * @hal: {{CSP.project.vendor}}.{{CSP.project.gen.hal}}@{{ CSP.project.gen.halVersion }} - * @project: {{CSP.project.name}} - * @targetChip: {{CSP.project.targetChip}} - * @time: {{CSP.time}} + * @author: {{ CSP.author }} + * @file: {{ CSP.file }} + * @brief: {{ CSP.brief }} + * @version: {{ CSP.version }} + * @hal: {{ CSP.project.vendor }}.{{ CSP.project.gen.hal }}@{{ CSP.project.gen.halVersion }} + * @project: {{ CSP.project.name }} + * @targetChip: {{ CSP.project.targetChip }} + * @time: {{ CSP.time }} * * ***************************************************************************** * @attention * - * Copyright (C) {{year}} csp software. + * Copyright (C) {{ year }} csp software. * All rights reserved. * * ***************************************************************************** @@ -50,7 +52,9 @@ .word __data_end__ .word __bss_start__ .word __bss_end__ +.word __default_stack__ +/*!< Reset_Handler */ .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function @@ -89,5 +93,770 @@ l_loop_clear_bss: bl main bx lr -.size Reset_Handler, .-Reset_Handler + .size Reset_Handler, .-Reset_Handler + +/*!< Default_Handler */ + .section .text.Default_Handler,"ax",%progbits + .weak Default_Handler + .type Default_Handler, %function +Default_Handler: + b . + + .size Default_Handler, .-Default_Handler + +/*!< Default_Handler */ + .section .isr_vector,"a",%progbits + .type g_apm32_vectors, %object + .size g_apm32_vectors, .-g_apm32_vectors +g_apm32_vectors: + .word __default_stack__ /*!< Top of Stack */ + .word Reset_Handler /*!< -15, Reset Handler */ + .word NMI_Handler /*!< -14, NMI Handler */ + .word HardFault_Handler /*!< -13, Hard Fault Handler */ + .word MemManage_Handler /*!< -12, MPU Fault Handler */ + .word BusFault_Handler /*!< -11, Bus Fault Handler */ + .word UsageFault_Handler /*!< -10, Usage Fault Handler */ + .word 0 /*!< -9, Reserved */ + .word 0 /*!< -8, Reserved */ + .word 0 /*!< -7, Reserved */ + .word 0 /*!< -6, Reserved */ + .word SVC_Handler /*!< -5, SVCall Handler */ + .word DebugMon_Handler /*!< -4, Debug Monitor Handler */ + .word 0 /*!< -3, Reserved */ + .word PendSV_Handler /*!< -2, PendSV Handler */ + .word SysTick_Handler /*!< -1, SysTick Handler */ +{%- if info.class == "APM32F10X_MD" %} + .word WWDT_IRQHandler /*!< 0, Window Watchdog */ + .word PVD_IRQHandler /*!< 1, PVD through EINT Line detect */ + .word TAMPER_IRQHandler /*!< 2, Tamper */ + .word RTC_IRQHandler /*!< 3, RTC */ + .word FLASH_IRQHandler /*!< 4, Flash */ + .word RCM_IRQHandler /*!< 5, RCM */ + .word EINT0_IRQHandler /*!< 6, EINT Line 0 */ + .word EINT1_IRQHandler /*!< 7, EINT Line 1 */ + .word EINT2_IRQHandler /*!< 8, EINT Line 2 */ + .word EINT3_IRQHandler /*!< 9, EINT Line 3 */ + .word EINT4_IRQHandler /*!< 10, EINT Line 4 */ + .word DMA1_Channel1_IRQHandler /*!< 11, DMA1 Channel 1 */ + .word DMA1_Channel2_IRQHandler /*!< 12, DMA1 Channel 2 */ + .word DMA1_Channel3_IRQHandler /*!< 13, DMA1 Channel 3 */ + .word DMA1_Channel4_IRQHandler /*!< 14, DMA1 Channel 4 */ + .word DMA1_Channel5_IRQHandler /*!< 15, DMA1 Channel 5 */ + .word DMA1_Channel6_IRQHandler /*!< 16, DMA1 Channel 6 */ + .word DMA1_Channel7_IRQHandler /*!< 17, DMA1 Channel 7 */ + .word ADC1_2_IRQHandler /*!< 18, ADC1_2 */ + .word USBD1_HP_CAN1_TX_IRQHandler /*!< 19, USBD1 High Priority or CAN1 TX */ + .word USBD1_LP_CAN1_RX0_IRQHandler /*!< 20, USBD1 Low Priority or CAN1 RX0 */ + .word CAN1_RX1_IRQHandler /*!< 21, CAN1 RX1 */ + .word CAN1_SCE_IRQHandler /*!< 22, CAN1 SCE */ + .word EINT9_5_IRQHandler /*!< 23, EINT Line 9..5 */ + .word TMR1_BRK_IRQHandler /*!< 24, TMR1 Break */ + .word TMR1_UP_IRQHandler /*!< 25, TMR1 Update */ + .word TMR1_TRG_COM_IRQHandler /*!< 26, TMR1 Trigger and Commutation */ + .word TMR1_CC_IRQHandler /*!< 27, TMR1 Capture Compare */ + .word TMR2_IRQHandler /*!< 28, TMR2 */ + .word TMR3_IRQHandler /*!< 29, TMR3 */ + .word TMR4_IRQHandler /*!< 30, TMR4 */ + .word I2C1_EV_IRQHandler /*!< 31, I2C1 Event */ + .word I2C1_ER_IRQHandler /*!< 32, I2C1 Error */ + .word I2C2_EV_IRQHandler /*!< 33, I2C2 Event */ + .word I2C2_ER_IRQHandler /*!< 34, I2C2 Error */ + .word SPI1_IRQHandler /*!< 35, SPI1 */ + .word SPI2_IRQHandler /*!< 36, SPI2 */ + .word USART1_IRQHandler /*!< 37, USART1 */ + .word USART2_IRQHandler /*!< 38, USART2 */ + .word USART3_IRQHandler /*!< 39, USART3 */ + .word EINT15_10_IRQHandler /*!< 40, EINT Line 15..10 */ + .word RTC_Alarm_IRQHandler /*!< 41, RTC Alarm through EINT Line */ + .word USBDWakeUp_IRQHandler /*!< 42, USBD Wakeup from suspend */ + .word FPU_IRQHandler /*!< 43, FPU */ + .word QSPI_IRQHandler /*!< 44, QSPI */ + .word USBD2_HP_IRQHandler /*!< 45, USBD2 High Priority */ + .word USBD2_LP_IRQHandler /*!< 46, USBD2 Low Priority */ +{%- elif info.class == "APM32F10X_HD" %} + .word WWDT_IRQHandler /*!< 0, Window Watchdog */ + .word PVD_IRQHandler /*!< 1, PVD through EINT Line detect */ + .word TAMPER_IRQHandler /*!< 2, Tamper */ + .word RTC_IRQHandler /*!< 3, RTC */ + .word FLASH_IRQHandler /*!< 4, Flash */ + .word RCM_IRQHandler /*!< 5, RCM */ + .word EINT0_IRQHandler /*!< 6, EINT Line 0 */ + .word EINT1_IRQHandler /*!< 7, EINT Line 1 */ + .word EINT2_IRQHandler /*!< 8, EINT Line 2 */ + .word EINT3_IRQHandler /*!< 9, EINT Line 3 */ + .word EINT4_IRQHandler /*!< 10, EINT Line 4 */ + .word DMA1_Channel1_IRQHandler /*!< 11, DMA1 Channel 1 */ + .word DMA1_Channel2_IRQHandler /*!< 12, DMA1 Channel 2 */ + .word DMA1_Channel3_IRQHandler /*!< 13, DMA1 Channel 3 */ + .word DMA1_Channel4_IRQHandler /*!< 14, DMA1 Channel 4 */ + .word DMA1_Channel5_IRQHandler /*!< 15, DMA1 Channel 5 */ + .word DMA1_Channel6_IRQHandler /*!< 16, DMA1 Channel 6 */ + .word DMA1_Channel7_IRQHandler /*!< 17, DMA1 Channel 7 */ + .word ADC1_2_IRQHandler /*!< 18, ADC1 & ADC2 */ + .word USBD1_HP_CAN1_TX_IRQHandler /*!< 19, USBD1 High Priority or CAN1 TX */ + .word USBD1_LP_CAN1_RX0_IRQHandler /*!< 20, USBD1 Low Priority or CAN1 RX0 */ + .word CAN1_RX1_IRQHandler /*!< 21, CAN1 RX1 */ + .word CAN1_SCE_IRQHandler /*!< 22, CAN1 SCE */ + .word EINT9_5_IRQHandler /*!< 23, EINT Line 9..5 */ + .word TMR1_BRK_IRQHandler /*!< 24, TMR1 Break */ + .word TMR1_UP_IRQHandler /*!< 25, TMR1 Update */ + .word TMR1_TRG_COM_IRQHandler /*!< 26, TMR1 Trigger and Commutation */ + .word TMR1_CC_IRQHandler /*!< 27, TMR1 Capture Compare */ + .word TMR2_IRQHandler /*!< 28, TMR2 */ + .word TMR3_IRQHandler /*!< 29, TMR3 */ + .word TMR4_IRQHandler /*!< 30, TMR4 */ + .word I2C1_EV_IRQHandler /*!< 31, I2C1 Event */ + .word I2C1_ER_IRQHandler /*!< 32, I2C1 Error */ + .word I2C2_EV_IRQHandler /*!< 33, I2C2 Event */ + .word I2C2_ER_IRQHandler /*!< 34, I2C2 Error */ + .word SPI1_IRQHandler /*!< 35, SPI1 */ + .word SPI2_IRQHandler /*!< 36, SPI2 */ + .word USART1_IRQHandler /*!< 37, USART1 */ + .word USART2_IRQHandler /*!< 38, USART2 */ + .word USART3_IRQHandler /*!< 39, USART3 */ + .word EINT15_10_IRQHandler /*!< 40, EINT Line 15..10 */ + .word RTC_Alarm_IRQHandler /*!< 41, RTC Alarm through EINT Line */ + .word USBDWakeUp_IRQHandler /*!< 42, USBD Wakeup from suspend */ + .word TMR8_BRK_IRQHandler /*!< 43, TMR8 Break */ + .word TMR8_UP_IRQHandler /*!< 44, TMR8 Update */ + .word TMR8_TRG_COM_IRQHandler /*!< 45, TMR8 Trigger and Commutation */ + .word TMR8_CC_IRQHandler /*!< 46, TMR8 Capture Compare */ + .word ADC3_IRQHandler /*!< 47, ADC3 */ + .word FSMC_IRQHandler /*!< 48, EMMC */ + .word SDIO_IRQHandler /*!< 49, SDIO */ + .word TMR5_IRQHandler /*!< 50, TMR5 */ + .word SPI3_IRQHandler /*!< 51, SPI3 */ + .word UART4_IRQHandler /*!< 52, UART4 */ + .word UART5_IRQHandler /*!< 53, UART5 */ + .word TMR6_IRQHandler /*!< 54, TMR6 */ + .word TMR7_IRQHandler /*!< 55, TMR7 */ + .word DMA2_Channel1_IRQHandler /*!< 56, DMA2 Channel1 */ + .word DMA2_Channel2_IRQHandler /*!< 57, DMA2 Channel2 */ + .word DMA2_Channel3_IRQHandler /*!< 58, DMA2 Channel3 */ + .word DMA2_Channel4_5_IRQHandler /*!< 59, DMA2 Channel4 & Channel5 */ + .word 0 /*!< 60, Reserved */ + .word USBD2_HP_CAN2_TX_IRQHandler /*!< 61, USBD2 High Priority or CAN2 TX */ + .word USBD2_LP_CAN2_RX0_IRQHandler /*!< 62, USBD2 Low Priority or CAN2 RX0 */ + .word CAN2_RX1_IRQHandler /*!< 63, CAN2 RX1 */ + .word CAN2_SCE_IRQHandler /*!< 64, CAN2 SCE */ +{%- elif info.class == "APM32F10X_CL" %} + .word WWDT_IRQHandler /*!< 0, Window Watchdog */ + .word PVD_IRQHandler /*!< 1, PVD through EINT Line detect */ + .word TAMPER_IRQHandler /*!< 2, Tamper */ + .word RTC_IRQHandler /*!< 3, RTC */ + .word FLASH_IRQHandler /*!< 4, Flash */ + .word RCM_IRQHandler /*!< 5, RCM */ + .word EINT0_IRQHandler /*!< 6, EINT Line 0 */ + .word EINT1_IRQHandler /*!< 7, EINT Line 1 */ + .word EINT2_IRQHandler /*!< 8, EINT Line 2 */ + .word EINT3_IRQHandler /*!< 9, EINT Line 3 */ + .word EINT4_IRQHandler /*!< 10, EINT Line 4 */ + .word DMA1_Channel1_IRQHandler /*!< 11, DMA1 Channel 1 */ + .word DMA1_Channel2_IRQHandler /*!< 12, DMA1 Channel 2 */ + .word DMA1_Channel3_IRQHandler /*!< 13, DMA1 Channel 3 */ + .word DMA1_Channel4_IRQHandler /*!< 14, DMA1 Channel 4 */ + .word DMA1_Channel5_IRQHandler /*!< 15, DMA1 Channel 5 */ + .word DMA1_Channel6_IRQHandler /*!< 16, DMA1 Channel 6 */ + .word DMA1_Channel7_IRQHandler /*!< 17, DMA1 Channel 7 */ + .word ADC1_2_IRQHandler /*!< 18, ADC1 & ADC2 */ + .word CAN1_TX_IRQHandler /*!< 19, CAN1 TX */ + .word CAN1_RX0_IRQHandler /*!< 20, CAN1 RX0 */ + .word CAN1_RX1_IRQHandler /*!< 21, CAN1 RX1 */ + .word CAN1_SCE_IRQHandler /*!< 22, CAN1 SCE */ + .word EINT9_5_IRQHandler /*!< 23, EINT Line 9..5 */ + .word TMR1_BRK_IRQHandler /*!< 24, TMR1 Break */ + .word TMR1_UP_IRQHandler /*!< 25, TMR1 Update */ + .word TMR1_TRG_COM_IRQHandler /*!< 26, TMR1 Trigger and Commutation */ + .word TMR1_CC_IRQHandler /*!< 27, TMR1 Capture Compare */ + .word TMR2_IRQHandler /*!< 28, TMR2 */ + .word TMR3_IRQHandler /*!< 29, TMR3 */ + .word TMR4_IRQHandler /*!< 30, TMR4 */ + .word I2C1_EV_IRQHandler /*!< 31, I2C1 Event */ + .word I2C1_ER_IRQHandler /*!< 32, I2C1 Error */ + .word I2C2_EV_IRQHandler /*!< 33, I2C2 Event */ + .word I2C2_ER_IRQHandler /*!< 34, I2C2 Error */ + .word SPI1_IRQHandler /*!< 35, SPI1 */ + .word SPI2_IRQHandler /*!< 36, SPI2 */ + .word USART1_IRQHandler /*!< 37, USART1 */ + .word USART2_IRQHandler /*!< 38, USART2 */ + .word USART3_IRQHandler /*!< 39, USART3 */ + .word EINT15_10_IRQHandler /*!< 40, EINT Line 15..10 */ + .word RTC_Alarm_IRQHandler /*!< 41, RTC Alarm through EINT Line */ + .word OTG_FS_WKUP_IRQHandler /*!< 42, USBD Wakeup from suspend */ + .word 0 /*!< 43, Reserved */ + .word 0 /*!< 44, Reserved */ + .word 0 /*!< 45, Reserved */ + .word 0 /*!< 46, Reserved */ + .word 0 /*!< 47, Reserved */ + .word 0 /*!< 48, Reserved */ + .word 0 /*!< 49, Reserved */ + .word TMR5_IRQHandler /*!< 50, TMR5 */ + .word SPI3_IRQHandler /*!< 51, SPI3 */ + .word UART4_IRQHandler /*!< 52, UART4 */ + .word UART5_IRQHandler /*!< 53, UART5 */ + .word TMR6_IRQHandler /*!< 54, TMR6 */ + .word TMR7_IRQHandler /*!< 55, TMR7 */ + .word DMA2_Channel1_IRQHandler /*!< 56, DMA2 Channel1 */ + .word DMA2_Channel2_IRQHandler /*!< 57, DMA2 Channel2 */ + .word DMA2_Channel3_IRQHandler /*!< 58, DMA2 Channel3 */ + .word DMA2_Channel4_IRQHandler /*!< 59, DMA2 Channel4 */ + .word DMA2_Channel5_IRQHandler /*!< 60, DMA2 Channel5 */ + .word ETH_IRQHandler /*!< 61, ETH */ + .word ETH_WKUP_IRQHandler /*!< 62, ETH Wake up */ + .word CAN2_TX_IRQHandler /*!< 63, CAN2 TX */ + .word CAN2_RX0_IRQHandler /*!< 64, CAN2 RX0 */ + .word CAN2_RX1_IRQHandler /*!< 65, CAN2 RX1 */ + .word CAN2_SCE_IRQHandler /*!< 66, CAN2 SCE */ + .word OTG_FS_IRQHandler /*!< 67, OTG FS */ +{%- endif %} +{# #} + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler +{# #} +{%- if info.class == "APM32F10X_MD" %} + .weak WWDT_IRQHandler + .thumb_set WWDT_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMPER_IRQHandler + .thumb_set TAMPER_IRQHandler,Default_Handler + + .weak RTC_IRQHandler + .thumb_set RTC_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCM_IRQHandler + .thumb_set RCM_IRQHandler,Default_Handler + + .weak EINT0_IRQHandler + .thumb_set EINT0_IRQHandler,Default_Handler + + .weak EINT1_IRQHandler + .thumb_set EINT1_IRQHandler,Default_Handler + + .weak EINT2_IRQHandler + .thumb_set EINT2_IRQHandler,Default_Handler + + .weak EINT3_IRQHandler + .thumb_set EINT3_IRQHandler,Default_Handler + + .weak EINT4_IRQHandler + .thumb_set EINT4_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_IRQHandler + .thumb_set DMA1_Channel2_IRQHandler,Default_Handler + + .weak DMA1_Channel3_IRQHandler + .thumb_set DMA1_Channel3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_IRQHandler + .thumb_set DMA1_Channel4_IRQHandler,Default_Handler + + .weak DMA1_Channel5_IRQHandler + .thumb_set DMA1_Channel5_IRQHandler,Default_Handler + + .weak DMA1_Channel6_IRQHandler + .thumb_set DMA1_Channel6_IRQHandler,Default_Handler + + .weak DMA1_Channel7_IRQHandler + .thumb_set DMA1_Channel7_IRQHandler,Default_Handler + + .weak ADC1_2_IRQHandler + .thumb_set ADC1_2_IRQHandler,Default_Handler + + .weak USBD1_HP_CAN1_TX_IRQHandler + .thumb_set USBD1_HP_CAN1_TX_IRQHandler,Default_Handler + + .weak USBD1_LP_CAN1_RX0_IRQHandler + .thumb_set USBD1_LP_CAN1_RX0_IRQHandler,Default_Handler + + .weak CAN1_RX1_IRQHandler + .thumb_set CAN1_RX1_IRQHandler,Default_Handler + + .weak CAN1_SCE_IRQHandler + .thumb_set CAN1_SCE_IRQHandler,Default_Handler + + .weak EINT9_5_IRQHandler + .thumb_set EINT9_5_IRQHandler,Default_Handler + + .weak TMR1_BRK_IRQHandler + .thumb_set TMR1_BRK_IRQHandler,Default_Handler + + .weak TMR1_UP_IRQHandler + .thumb_set TMR1_UP_IRQHandler,Default_Handler + + .weak TMR1_TRG_COM_IRQHandler + .thumb_set TMR1_TRG_COM_IRQHandler,Default_Handler + + .weak TMR1_CC_IRQHandler + .thumb_set TMR1_CC_IRQHandler,Default_Handler + + .weak TMR2_IRQHandler + .thumb_set TMR2_IRQHandler,Default_Handler + + .weak TMR3_IRQHandler + .thumb_set TMR3_IRQHandler,Default_Handler + + .weak TMR4_IRQHandler + .thumb_set TMR4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EINT15_10_IRQHandler + .thumb_set EINT15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak USBDWakeUp_IRQHandler + .thumb_set USBDWakeUp_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + + .weak QSPI_IRQHandler + .thumb_set QSPI_IRQHandler,Default_Handler + + .weak USBD2_HP_IRQHandler + .thumb_set USBD2_HP_IRQHandler,Default_Handler + + .weak USBD2_LP_IRQHandler + .thumb_set USBD2_LP_IRQHandler,Default_Handler +{%- elif info.class == "APM32F10X_HD" %} + .weak WWDT_IRQHandler + .thumb_set WWDT_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMPER_IRQHandler + .thumb_set TAMPER_IRQHandler,Default_Handler + + .weak RTC_IRQHandler + .thumb_set RTC_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCM_IRQHandler + .thumb_set RCM_IRQHandler,Default_Handler + + .weak EINT0_IRQHandler + .thumb_set EINT0_IRQHandler,Default_Handler + + .weak EINT1_IRQHandler + .thumb_set EINT1_IRQHandler,Default_Handler + + .weak EINT2_IRQHandler + .thumb_set EINT2_IRQHandler,Default_Handler + + .weak EINT3_IRQHandler + .thumb_set EINT3_IRQHandler,Default_Handler + + .weak EINT4_IRQHandler + .thumb_set EINT4_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_IRQHandler + .thumb_set DMA1_Channel2_IRQHandler,Default_Handler + + .weak DMA1_Channel3_IRQHandler + .thumb_set DMA1_Channel3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_IRQHandler + .thumb_set DMA1_Channel4_IRQHandler,Default_Handler + + .weak DMA1_Channel5_IRQHandler + .thumb_set DMA1_Channel5_IRQHandler,Default_Handler + + .weak DMA1_Channel6_IRQHandler + .thumb_set DMA1_Channel6_IRQHandler,Default_Handler + + .weak DMA1_Channel7_IRQHandler + .thumb_set DMA1_Channel7_IRQHandler,Default_Handler + + .weak ADC1_2_IRQHandler + .thumb_set ADC1_2_IRQHandler,Default_Handler + + .weak USBD1_HP_CAN1_TX_IRQHandler + .thumb_set USBD1_HP_CAN1_TX_IRQHandler,Default_Handler + + .weak USBD1_LP_CAN1_RX0_IRQHandler + .thumb_set USBD1_LP_CAN1_RX0_IRQHandler,Default_Handler + + .weak CAN1_RX1_IRQHandler + .thumb_set CAN1_RX1_IRQHandler,Default_Handler + + .weak CAN1_SCE_IRQHandler + .thumb_set CAN1_SCE_IRQHandler,Default_Handler + + .weak EINT9_5_IRQHandler + .thumb_set EINT9_5_IRQHandler,Default_Handler + + .weak TMR1_BRK_IRQHandler + .thumb_set TMR1_BRK_IRQHandler,Default_Handler + + .weak TMR1_UP_IRQHandler + .thumb_set TMR1_UP_IRQHandler,Default_Handler + + .weak TMR1_TRG_COM_IRQHandler + .thumb_set TMR1_TRG_COM_IRQHandler,Default_Handler + + .weak TMR1_CC_IRQHandler + .thumb_set TMR1_CC_IRQHandler,Default_Handler + + .weak TMR2_IRQHandler + .thumb_set TMR2_IRQHandler,Default_Handler + + .weak TMR3_IRQHandler + .thumb_set TMR3_IRQHandler,Default_Handler + + .weak TMR4_IRQHandler + .thumb_set TMR4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EINT15_10_IRQHandler + .thumb_set EINT15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak USBDWakeUp_IRQHandler + .thumb_set USBDWakeUp_IRQHandler,Default_Handler + + .weak TMR8_BRK_IRQHandler + .thumb_set TMR8_BRK_IRQHandler,Default_Handler + + .weak TMR8_UP_IRQHandler + .thumb_set TMR8_UP_IRQHandler,Default_Handler + + .weak TMR8_TRG_COM_IRQHandler + .thumb_set TMR8_TRG_COM_IRQHandler,Default_Handler + + .weak TMR8_CC_IRQHandler + .thumb_set TMR8_CC_IRQHandler,Default_Handler + + .weak ADC3_IRQHandler + .thumb_set ADC3_IRQHandler,Default_Handler + + .weak FSMC_IRQHandler + .thumb_set FSMC_IRQHandler,Default_Handler + + .weak SDIO_IRQHandler + .thumb_set SDIO_IRQHandler,Default_Handler + + .weak TMR5_IRQHandler + .thumb_set TMR5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TMR6_IRQHandler + .thumb_set TMR6_IRQHandler,Default_Handler + + .weak TMR7_IRQHandler + .thumb_set TMR7_IRQHandler,Default_Handler + + .weak DMA2_Channel1_IRQHandler + .thumb_set DMA2_Channel1_IRQHandler,Default_Handler + + .weak DMA2_Channel2_IRQHandler + .thumb_set DMA2_Channel2_IRQHandler,Default_Handler + + .weak DMA2_Channel3_IRQHandler + .thumb_set DMA2_Channel3_IRQHandler,Default_Handler + + .weak DMA2_Channel4_5_IRQHandler + .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler + + .weak USBD2_HP_CAN2_TX_IRQHandler + .thumb_set USBD2_HP_CAN2_TX_IRQHandler,Default_Handler + + .weak USBD2_LP_CAN2_RX0_IRQHandler + .thumb_set USBD2_LP_CAN2_RX0_IRQHandler,Default_Handler + + .weak CAN2_RX1_IRQHandler + .thumb_set CAN2_RX1_IRQHandler,Default_Handler + + .weak CAN2_SCE_IRQHandler + .thumb_set CAN2_SCE_IRQHandler,Default_Handler +{%- elif info.class == "APM32F10X_CL" %} + .weak WWDT_IRQHandler + .thumb_set WWDT_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMPER_IRQHandler + .thumb_set TAMPER_IRQHandler,Default_Handler + + .weak RTC_IRQHandler + .thumb_set RTC_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCM_IRQHandler + .thumb_set RCM_IRQHandler,Default_Handler + + .weak EINT0_IRQHandler + .thumb_set EINT0_IRQHandler,Default_Handler + + .weak EINT1_IRQHandler + .thumb_set EINT1_IRQHandler,Default_Handler + + .weak EINT2_IRQHandler + .thumb_set EINT2_IRQHandler,Default_Handler + + .weak EINT3_IRQHandler + .thumb_set EINT3_IRQHandler,Default_Handler + + .weak EINT4_IRQHandler + .thumb_set EINT4_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_IRQHandler + .thumb_set DMA1_Channel2_IRQHandler,Default_Handler + + .weak DMA1_Channel3_IRQHandler + .thumb_set DMA1_Channel3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_IRQHandler + .thumb_set DMA1_Channel4_IRQHandler,Default_Handler + + .weak DMA1_Channel5_IRQHandler + .thumb_set DMA1_Channel5_IRQHandler,Default_Handler + + .weak DMA1_Channel6_IRQHandler + .thumb_set DMA1_Channel6_IRQHandler,Default_Handler + + .weak DMA1_Channel7_IRQHandler + .thumb_set DMA1_Channel7_IRQHandler,Default_Handler + + .weak ADC1_2_IRQHandler + .thumb_set ADC1_2_IRQHandler,Default_Handler + + .weak USBD_HP_CAN1_TX_IRQHandler + .thumb_set USBD_HP_CAN1_TX_IRQHandler,Default_Handler + + .weak USBD_LP_CAN1_RX0_IRQHandler + .thumb_set USBD_LP_CAN1_RX0_IRQHandler,Default_Handler + + .weak CAN1_TX_IRQHandler + .thumb_set CAN1_TX_IRQHandler,Default_Handler + + .weak CAN1_RX0_IRQHandler + .thumb_set CAN1_RX0_IRQHandler,Default_Handler + + .weak CAN1_RX1_IRQHandler + .thumb_set CAN1_RX1_IRQHandler,Default_Handler + + .weak CAN1_SCE_IRQHandler + .thumb_set CAN1_SCE_IRQHandler,Default_Handler + + .weak EINT9_5_IRQHandler + .thumb_set EINT9_5_IRQHandler,Default_Handler + + .weak TMR1_BRK_IRQHandler + .thumb_set TMR1_BRK_IRQHandler,Default_Handler + + .weak TMR1_UP_IRQHandler + .thumb_set TMR1_UP_IRQHandler,Default_Handler + + .weak TMR1_TRG_COM_IRQHandler + .thumb_set TMR1_TRG_COM_IRQHandler,Default_Handler + + .weak TMR1_CC_IRQHandler + .thumb_set TMR1_CC_IRQHandler,Default_Handler + + .weak TMR2_IRQHandler + .thumb_set TMR2_IRQHandler,Default_Handler + + .weak TMR3_IRQHandler + .thumb_set TMR3_IRQHandler,Default_Handler + + .weak TMR4_IRQHandler + .thumb_set TMR4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EINT15_10_IRQHandler + .thumb_set EINT15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak OTG_FS_WKUP_IRQHandler + .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler + + .weak TMR5_IRQHandler + .thumb_set TMR5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TMR6_IRQHandler + .thumb_set TMR6_IRQHandler,Default_Handler + + .weak TMR7_IRQHandler + .thumb_set TMR7_IRQHandler,Default_Handler + + .weak DMA2_Channel1_IRQHandler + .thumb_set DMA2_Channel1_IRQHandler,Default_Handler + + .weak DMA2_Channel2_IRQHandler + .thumb_set DMA2_Channel2_IRQHandler,Default_Handler + + .weak DMA2_Channel3_IRQHandler + .thumb_set DMA2_Channel3_IRQHandler,Default_Handler + + .weak DMA2_Channel4_IRQHandler + .thumb_set DMA2_Channel4_IRQHandler,Default_Handler + + .weak DMA2_Channel5_IRQHandler + .thumb_set DMA2_Channel5_IRQHandler,Default_Handler + + .weak ETH_IRQHandler + .thumb_set ETH_IRQHandler,Default_Handler + + .weak ETH_WKUP_IRQHandler + .thumb_set ETH_WKUP_IRQHandler,Default_Handler + + .weak CAN2_TX_IRQHandler + .thumb_set CAN2_TX_IRQHandler,Default_Handler + + .weak CAN2_RX0_IRQHandler + .thumb_set CAN2_RX0_IRQHandler,Default_Handler + + .weak CAN2_RX1_IRQHandler + .thumb_set CAN2_RX1_IRQHandler,Default_Handler + + .weak CAN2_SCE_IRQHandler + .thumb_set CAN2_SCE_IRQHandler,Default_Handler + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Default_Handler +{%- endif %} diff --git a/tools/generator/templates/startup_iar.s.j2 b/tools/generator/templates/startup_iar.s.j2 index 2eba9ba..554f2ad 100644 --- a/tools/generator/templates/startup_iar.s.j2 +++ b/tools/generator/templates/startup_iar.s.j2 @@ -1,9 +1,9 @@ {# - # Licensed under the GNU General Public License v. 3 (the "License") + # Licensed under the Apache License v. 2 (the "License") # You may not use this file except in compliance with the License. # You may obtain a copy of the License at # - # https://www.gnu.org/licenses/gpl-3.0.html + # https://www.apache.org/licenses/LICENSE-2.0.html # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, diff --git a/tools/generator/templates/sys.c.j2 b/tools/generator/templates/sys.c.j2 new file mode 100644 index 0000000..f766c40 --- /dev/null +++ b/tools/generator/templates/sys.c.j2 @@ -0,0 +1,43 @@ +{# + # Licensed under the Apache License v. 2 (the "License") + # You may not use this file except in compliance with the License. + # You may obtain a copy of the License at + # + # https://www.apache.org/licenses/LICENSE-2.0.html + # + # Unless required by applicable law or agreed to in writing, software + # distributed under the License is distributed on an "AS IS" BASIS, + # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + # See the License for the specific language governing permissions and + # limitations under the License. + # + # Copyright (C) 2022-2024 xqyjlj + # + # @author xqyjlj + # @file sys.c.j2 + # + # Change Logs: + # Date Author Notes + # ------------ ---------- ----------------------------------------------- + # 2024-04-12 xqyjlj initial version + # + #} +{%- extends "csp-file-base.c.j2" %} + +{%- block includes %} +#include "csp/sys.h" +{%- endblock %} + +{%- block function_body %} +void csp_sys_init(void) +{ +{%- set sys_debug = CSP.project|sys_ctrl_debug_t %} +{%- set clocks = CSP.project|sys_clocks() %} + +{%- if clocks|length() > 0 %} + RCM_EnableAPB2PeriphClock({{ clocks|join(" | ") }}); +{# #} +{%- endif %} + GPIO_ConfigPinRemap({{ CSP.project|sys_debug() }}); +} +{%- endblock %} diff --git a/tools/generator/templates/sys.h.j2 b/tools/generator/templates/sys.h.j2 new file mode 100644 index 0000000..cdcab82 --- /dev/null +++ b/tools/generator/templates/sys.h.j2 @@ -0,0 +1,38 @@ +{# + # Licensed under the Apache License v. 2 (the "License") + # You may not use this file except in compliance with the License. + # You may obtain a copy of the License at + # + # https://www.apache.org/licenses/LICENSE-2.0.html + # + # Unless required by applicable law or agreed to in writing, software + # distributed under the License is distributed on an "AS IS" BASIS, + # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + # See the License for the specific language governing permissions and + # limitations under the License. + # + # Copyright (C) 2022-2024 xqyjlj + # + # @author xqyjlj + # @file sys.h.j2 + # + # Change Logs: + # Date Author Notes + # ------------ ---------- ----------------------------------------------- + # 2024-04-12 xqyjlj initial version + # + #} +{%- extends "csp-file-base.h.j2" %} + +{%- block includes %} +#include "apm32f10x.h" +#include "apm32f10x_gpio.h" +#include "apm32f10x_rcm.h" +{%- endblock %} + +{%- block functions_prototypes %} +/** + * @brief configure sys + */ +void csp_sys_init(void); +{%- endblock %} diff --git a/tools/generator/templates/system_apm32f10x.c.j2 b/tools/generator/templates/system_apm32f10x.c.j2 index 09852c4..35dc965 100644 --- a/tools/generator/templates/system_apm32f10x.c.j2 +++ b/tools/generator/templates/system_apm32f10x.c.j2 @@ -1,9 +1,9 @@ {# - # Licensed under the GNU General Public License v. 3 (the "License") + # Licensed under the Apache License v. 2 (the "License") # You may not use this file except in compliance with the License. # You may obtain a copy of the License at # - # https://www.gnu.org/licenses/gpl-3.0.html + # https://www.apache.org/licenses/LICENSE-2.0.html # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, @@ -29,8 +29,7 @@ #include "apm32f10x.h" #include "apm32f10x_rcm.h" #include "system_apm32f10x.h" -{% endblock %} - +{% endblock includes %} {%- block define %} @@ -41,12 +40,12 @@ #if !defined (HSI_VALUE) # define HSI_VALUE (8000000U) /*!< Default value of the Internal oscillator in Hz. */ #endif -{% endblock %} +{% endblock define %} {%- block variables %} uint32_t SystemCoreClock = 0; -{% endblock %} +{% endblock variables %} {%- block function_body %} @@ -152,4 +151,4 @@ void SystemCoreClockUpdate(void) SystemCoreClock = sysClock; } -{% endblock %} +{% endblock function_body %} diff --git a/tools/generator/templates/uart.c.j2 b/tools/generator/templates/uart.c.j2 new file mode 100644 index 0000000..01afa23 --- /dev/null +++ b/tools/generator/templates/uart.c.j2 @@ -0,0 +1,118 @@ +{# + # Licensed under the Apache License v. 2 (the "License") + # You may not use this file except in compliance with the License. + # You may obtain a copy of the License at + # + # https://www.apache.org/licenses/LICENSE-2.0.html + # + # Unless required by applicable law or agreed to in writing, software + # distributed under the License is distributed on an "AS IS" BASIS, + # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + # See the License for the specific language governing permissions and + # limitations under the License. + # + # Copyright (C) 2025-2025 xqyjlj + # + # @author xqyjlj + # @file uart.c.j2 + # + # Change Logs: + # Date Author Notes + # ------------ ---------- ----------------------------------------------- + # 2025-11-16 xqyjlj initial version + #} +{%- extends "csp-file-base.c.j2" %} + +{%- set module = CSP.module %} +{%- set mode = CSP.project|uart_ctrl_mode_t(module) %} +{%- set name = CSP.module|lower() %} + +{%- block includes %} +#include "csp/{{ name }}.h" +{%- endblock %} + +{%- block function_body %} +{# +{%- set tx_io = CSP.project|usart_io(module + ":TX") %} +{%- set rx_io = CSP.project|usart_io(module + ":RX") %} +{%- set ck_io = CSP.project|usart_io(module + ":CK") %} +#} +void csp_{{ module|lower() }}_init(void) +{ + // GPIO_Config_T gpio_config = {0}; + USART_Config_T uart_config = {0}; +{# #} + /*!< enable the {{ module }} clock. */ + RCM_EnableAPB1PeriphClock(RCM_APB1_PERIPH_{{ module }}); +{# + RCM_EnableAPB2PeriphClock({{ CSP.project|usart_io_clocks(tx_io, rx_io, ck_io)|join(" | ") }}); +#} + // TODO: io +{# #} + uart_config.baudRate = {{ CSP.project|uart_baud_rate_t(module, 115200) }}U; + uart_config.hardwareFlow = USART_HARDWARE_FLOW_NONE; + uart_config.mode = {{ CSP.project|uart_mode(module) }}; + uart_config.parity = {{ CSP.project|uart_parity(module) }}; + uart_config.stopBits = {{ CSP.project|uart_stop_bits(module) }}; + uart_config.wordLength = {{ CSP.project|uart_word_length(module) }}; + USART_Config({{ module }}, &uart_config); + +{%- if mode == "half_duplex_single_wire_mode" %} +{# #} + USART_EnableHalfDuplex({{ module }}); +{%- elif mode == "ir_da" %} +{# #} + USART_ConfigIrDA({{ module }}, {{ CSP.project|uart_ir_da_mode(module) }}); + USART_ConfigPrescaler({{ module }}, {{ CSP.project|uart_prescaler_t(module) }}U); + USART_EnableIrDA({{ module }}); +{%- elif mode == "multiprocessor_communication" %} +{# #} + USART_ConfigWakeUp({{ module }}, {{ CSP.project|uart_wake_up_methode(module) }}); + + {%- if CSP.project|uart_wake_up_methode_t(instance) == "addressmark" %} + USART_Address({{ module }}, {{ CSP.project|uart_address_t(module) }}U); + {%- endif %} + +{%- endif %} +{# #} + USART_Enable({{ module }}); + +{%- if mode == "lin" %} +{# #} + USART_ConfigLINBreakDetectLength({{ module }}, {{ CSP.project|uart_break_detect_length(module) }}); + USART_EnableLIN({{ module }}); +{%- endif %} +} + +int32_t csp_{{ name }}_write(const void *buffer, uint32_t length) +{ + uint32_t i = 0; + const uint8_t *buf = (const uint8_t *)buffer; + + for (i = 0; i < length; i++) + { + while (({{ module }}->STS & USART_FLAG_TXBE) == 0U) + { + } + {{ module }}->DATA_B.DATA = buf[i]; + } + + return 0; +} + +int32_t csp_{{ name }}_read(void *buffer, uint32_t length) +{ + uint32_t i = 0; + uint8_t *buf = (uint8_t *)buffer; + + for (i = 0; i < length; i++) + { + while (({{ module }}->STS & USART_FLAG_RXBNE) == 0U) + { + } + buf[i] = {{ module }}->DATA_B.DATA; + } + + return 0; +} +{%- endblock %} diff --git a/tools/generator/templates/uart.h.j2 b/tools/generator/templates/uart.h.j2 new file mode 100644 index 0000000..e16abf7 --- /dev/null +++ b/tools/generator/templates/uart.h.j2 @@ -0,0 +1,59 @@ +{# + # Licensed under the Apache License v. 2 (the "License") + # You may not use this file except in compliance with the License. + # You may obtain a copy of the License at + # + # https://www.apache.org/licenses/LICENSE-2.0.html + # + # Unless required by applicable law or agreed to in writing, software + # distributed under the License is distributed on an "AS IS" BASIS, + # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + # See the License for the specific language governing permissions and + # limitations under the License. + # + # Copyright (C) 2025-2025 xqyjlj + # + # @author xqyjlj + # @file uart.h.j2 + # + # Change Logs: + # Date Author Notes + # ------------ ---------- ----------------------------------------------- + # 2025-11-16 xqyjlj initial version + #} +{%- extends "csp-file-base.h.j2" %} + +{%- block includes %} +#include "apm32f10x.h" +#include "apm32f10x_eint.h" +#include "apm32f10x_gpio.h" +#include "apm32f10x_misc.h" +#include "apm32f10x_usart.h" +#include "apm32f10x_rcm.h" +{%- endblock %} + +{%- set module = CSP.module %} +{%- set name = CSP.module|lower() %} + +{%- block functions_prototypes %} +/** + * @brief configure {{ module }} + */ +void csp_{{ name }}_init(void); + +/** + * @brief send {{ module }} data sequence. + * @param[in] *buffer buffer pointer. + * @param[in] length buffer size. + * @return int32_t + */ +int32_t csp_{{ name }}_write(const void *buffer, uint32_t length); + +/** + * @brief receive {{ module }} data sequence. + * @param[out] *buffer buffer pointer. + * @param[in] length buffer size. + * @return int32_t + */ +int32_t csp_{{ name }}_read(void *buffer, uint32_t length); +{%- endblock %} diff --git a/tools/generator/templates/usart.c.j2 b/tools/generator/templates/usart.c.j2 new file mode 100644 index 0000000..bd2133a --- /dev/null +++ b/tools/generator/templates/usart.c.j2 @@ -0,0 +1,155 @@ +{# + # Licensed under the Apache License v. 2 (the "License") + # You may not use this file except in compliance with the License. + # You may obtain a copy of the License at + # + # https://www.apache.org/licenses/LICENSE-2.0.html + # + # Unless required by applicable law or agreed to in writing, software + # distributed under the License is distributed on an "AS IS" BASIS, + # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + # See the License for the specific language governing permissions and + # limitations under the License. + # + # Copyright (C) 2022-2024 xqyjlj + # + # @author xqyjlj + # @file usart.c.j2 + # + # Change Logs: + # Date Author Notes + # ------------ ---------- ----------------------------------------------- + # 2024-04-01 xqyjlj initial version + # + #} +{%- extends "csp-file-base.c.j2" %} + +{%- set module = CSP.module %} +{%- set mode = CSP.project|usart_ctrl_mode_t(module) %} +{%- set name = CSP.module|lower() %} + +{%- block includes %} +#include "csp/{{ name }}.h" +{%- endblock %} + +{%- block function_body %} +{# +{%- set tx_io = CSP.project|usart_io(module + ":TX") %} +{%- set rx_io = CSP.project|usart_io(module + ":RX") %} +{%- set ck_io = CSP.project|usart_io(module + ":CK") %} +#} +void csp_{{ name }}_init(void) +{ + // GPIO_Config_T gpio_config = {0}; + USART_Config_T usart_config = {0}; +{%- if mode == "synchronous" %} + USART_ClockConfig_T usart_clock_config = {0}; +{%- endif %} +{# #} + /*!< enable the {{ module }} clock. */ +{%- if module == "USART1" %} + RCM_EnableAPB2PeriphClock(RCM_APB2_PERIPH_{{ module }}); +{%- else %} + RCM_EnableAPB1PeriphClock(RCM_APB1_PERIPH_{{ module }}); +{%- endif %} +{# + RCM_EnableAPB2PeriphClock({{ CSP.project|usart_io_clocks(tx_io, rx_io, ck_io)|join(" | ") }}); +#} + // TODO: io +{# #} + usart_config.baudRate = {{ CSP.project|usart_baud_rate_t(module, 115200) }}U; + usart_config.hardwareFlow = {{ CSP.project|usart_ctrl_hardware_flow_control_rs232(module) }}; + usart_config.mode = {{ CSP.project|usart_mode(module) }}; + usart_config.parity = {{ CSP.project|usart_parity(module) }}; + usart_config.stopBits = {{ CSP.project|usart_stop_bits(module) }}; + usart_config.wordLength = {{ CSP.project|usart_word_length(module) }}; + USART_Config({{ module }}, &usart_config); + +{%- if mode == "half_duplex_single_wire_mode" %} +{# #} + USART_EnableHalfDuplex({{ module }}); +{%- elif mode == "ir_da" %} +{# #} + USART_ConfigIrDA({{ module }}, {{ CSP.project|usart_ir_da_mode(module) }}); + USART_ConfigPrescaler({{ module }}, {{ CSP.project|usart_prescaler_t(module) }}U); + USART_EnableIrDA({{ module }}); +{%- elif mode == "multiprocessor_communication" %} +{# #} + USART_ConfigWakeUp({{ module }}, {{ CSP.project|usart_wake_up_methode(module) }}); + + {%- if CSP.project|usart_wake_up_methode_t(instance) == "addressmark" %} + USART_Address({{ module }}, {{ CSP.project|usart_address_t(module) }}U); + {%- endif %} + +{%- elif mode == "synchronous" %} +{# #} + usart_clock_config.clock = USART_CLKEN_ENABLE; + usart_clock_config.polarity = {{ CSP.project|usart_clk_polarity(module) }}; + usart_clock_config.phase = {{ CSP.project|usart_clk_phase(module) }}; + usart_clock_config.lastBit = {{ CSP.project|usart_clk_last_bit(module) }}; + USART_ConfigClock({{ module }}, &usart_clock_config); +{%- elif mode == "smart_card" %} +{# #} + USART_ConfigGuardTime({{ module }}, {{ CSP.project|usart_guard_time_t(module) }}U); + {%- if CSP.project|usart_nack_state_t(instance) == "enable" %} + USART_EnableSmartCardNACK({{ module }}); + {%- endif %} + USART_EnableSmartCard({{ module }}); +{%- elif mode == "smart_card_with_clock" %} +{# #} + USART_ConfigGuardTime({{ module }}, {{ CSP.project|usart_guard_time_t(module) }}U); + {%- if CSP.project|usart_nack_state_t(instance) == "enable" %} + USART_EnableSmartCardNACK({{ module }}); + {%- endif %} + + usart_clock_config.clock = USART_CLKEN_ENABLE; + usart_clock_config.polarity = {{ CSP.project|usart_clk_polarity(module) }}; + usart_clock_config.phase = {{ CSP.project|usart_clk_phase(module) }}; + usart_clock_config.lastBit = {{ CSP.project|usart_clk_last_bit(module) }}; + USART_ConfigClock({{ module }}, &usart_clock_config); + + USART_ConfigPrescaler({{ module }}, {{ CSP.project|usart_prescaler_t(module) }}U); + USART_EnableSmartCard({{ module }}); +{%- endif %} +{# #} + USART_Enable({{ module }}); + +{%- if mode == "lin" %} +{# #} + USART_ConfigLINBreakDetectLength({{ module }}, {{ CSP.project|usart_break_detect_length(module) }}); + USART_EnableLIN({{ module }}); +{%- endif %} +} + +int32_t csp_{{ name }}_write(const void *buffer, uint32_t length) +{ + uint32_t i = 0; + const uint8_t *buf = (const uint8_t *)buffer; + + for (i = 0; i < length; i++) + { + while (({{ module }}->STS & USART_FLAG_TXBE) == 0U) + { + } + {{ module }}->DATA_B.DATA = buf[i]; + } + + return 0; +} + +int32_t csp_{{ name }}_read(void *buffer, uint32_t length) +{ + uint32_t i = 0; + uint8_t *buf = (uint8_t *)buffer; + + for (i = 0; i < length; i++) + { + while (({{ module }}->STS & USART_FLAG_RXBNE) == 0U) + { + } + buf[i] = {{ module }}->DATA_B.DATA; + } + + return 0; +} +{%- endblock %} diff --git a/tools/generator/templates/usart.h.j2 b/tools/generator/templates/usart.h.j2 new file mode 100644 index 0000000..cf5fa99 --- /dev/null +++ b/tools/generator/templates/usart.h.j2 @@ -0,0 +1,60 @@ +{# + # Licensed under the Apache License v. 2 (the "License") + # You may not use this file except in compliance with the License. + # You may obtain a copy of the License at + # + # https://www.apache.org/licenses/LICENSE-2.0.html + # + # Unless required by applicable law or agreed to in writing, software + # distributed under the License is distributed on an "AS IS" BASIS, + # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + # See the License for the specific language governing permissions and + # limitations under the License. + # + # Copyright (C) 2022-2024 xqyjlj + # + # @author xqyjlj + # @file usart.h.j2 + # + # Change Logs: + # Date Author Notes + # ------------ ---------- ----------------------------------------------- + # 2024-04-01 xqyjlj initial version + # + #} +{%- extends "csp-file-base.h.j2" %} + +{%- block includes %} +#include "apm32f10x.h" +#include "apm32f10x_eint.h" +#include "apm32f10x_gpio.h" +#include "apm32f10x_misc.h" +#include "apm32f10x_usart.h" +#include "apm32f10x_rcm.h" +{%- endblock %} + +{%- set module = CSP.module %} +{%- set name = CSP.module|lower() %} + +{%- block functions_prototypes %} +/** + * @brief configure {{ module }} + */ +void csp_{{ name }}_init(void); + +/** + * @brief send {{ module }} data sequence. + * @param[in] *buffer buffer pointer. + * @param[in] length buffer size. + * @return int32_t + */ +int32_t csp_{{ name }}_write(const void *buffer, uint32_t length); + +/** + * @brief receive {{ module }} data sequence. + * @param[out] *buffer buffer pointer. + * @param[in] length buffer size. + * @return int32_t + */ +int32_t csp_{{ name }}_read(void *buffer, uint32_t length); +{%- endblock %} diff --git a/tools/generator/templates/wwdt.c.j2 b/tools/generator/templates/wwdt.c.j2 new file mode 100644 index 0000000..e410dce --- /dev/null +++ b/tools/generator/templates/wwdt.c.j2 @@ -0,0 +1,46 @@ +{# + # Licensed under the Apache License v. 2 (the "License") + # You may not use this file except in compliance with the License. + # You may obtain a copy of the License at + # + # https://www.apache.org/licenses/LICENSE-2.0.html + # + # Unless required by applicable law or agreed to in writing, software + # distributed under the License is distributed on an "AS IS" BASIS, + # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + # See the License for the specific language governing permissions and + # limitations under the License. + # + # Copyright (C) 2022-2024 xqyjlj + # + # @author xqyjlj + # @file wwdt.c.j2 + # + # Change Logs: + # Date Author Notes + # ------------ ---------- ----------------------------------------------- + # 2024-04-01 xqyjlj initial version + # + #} +{%- extends "csp-file-base.c.j2" %} + +{%- block includes %} +#include "csp/wwdt.h" +{%- endblock %} + +{%- block function_body %} +void csp_wwdt_init(void) +{ + /*!< enable the WWDT clock. */ + RCM_EnableAPB1PeriphClock(RCM_APB1_PERIPH_WWDT); + + WWDT_Enable({{ CSP.project|wwdt_counter_t(64) }}U); + WWDT_ConfigTimebase({{ CSP.project|wwdt_prescaler() }}); + WWDT_ConfigWindowData({{ CSP.project|wwdt_window_t(64) }}U); +{%- if CSP.project|wwdt_ewi_mode_t() == "enable" %} +{# #} + /*!< enable the early wakeup interrupt. */ + WWDT_EnableEWI(); +{%- endif %} +} +{%- endblock %} diff --git a/tools/generator/templates/wwdt.h.j2 b/tools/generator/templates/wwdt.h.j2 new file mode 100644 index 0000000..b8d13ec --- /dev/null +++ b/tools/generator/templates/wwdt.h.j2 @@ -0,0 +1,39 @@ +{# + # Licensed under the Apache License v. 2 (the "License") + # You may not use this file except in compliance with the License. + # You may obtain a copy of the License at + # + # https://www.apache.org/licenses/LICENSE-2.0.html + # + # Unless required by applicable law or agreed to in writing, software + # distributed under the License is distributed on an "AS IS" BASIS, + # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + # See the License for the specific language governing permissions and + # limitations under the License. + # + # Copyright (C) 2022-2024 xqyjlj + # + # @author xqyjlj + # @file wwdt.h.j2 + # + # Change Logs: + # Date Author Notes + # ------------ ---------- ----------------------------------------------- + # 2024-04-01 xqyjlj initial version + # + #} +{%- extends "csp-file-base.h.j2" %} + +{%- block includes %} +#include "apm32f10x.h" +#include "apm32f10x_misc.h" +#include "apm32f10x_rcm.h" +#include "apm32f10x_wwdt.h" +{%- endblock %} + +{%- block functions_prototypes %} +/** + * @brief configure wwdt + */ +void csp_wwdt_init(void); +{%- endblock %} diff --git a/tools/generator/templates/xmake.lua.j2 b/tools/generator/templates/xmake.lua.j2 index 88c8509..fbe7b52 100644 --- a/tools/generator/templates/xmake.lua.j2 +++ b/tools/generator/templates/xmake.lua.j2 @@ -1,9 +1,9 @@ {# - # Licensed under the GNU General Public License v. 3 (the "License") + # Licensed under the Apache License v. 2 (the "License") # You may not use this file except in compliance with the License. # You may obtain a copy of the License at # - # https://www.gnu.org/licenses/gpl-3.0.html + # https://www.apache.org/licenses/LICENSE-2.0.html # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, @@ -20,6 +20,7 @@ # Date Author Notes # ------------ ---------- ----------------------------------------------- # 2024-03-22 xqyjlj initial version + # 2025-10-10 xqyjlj improve xmake configuration # #} {%- extends "csp-file-base.xmake.lua.j2" %} @@ -39,7 +40,7 @@ set_config("cpu", "cortex-m3") {%- endblock %} {%- block toolchains %} -toolchain("arm-none-eabi") +toolchain("gcc-arm-none-eabi") do set_kind("standalone") set_toolset("cc", "arm-none-eabi-gcc") @@ -50,35 +51,67 @@ do set_toolset("objcopy", "arm-none-eabi-objcopy") set_toolset("size", "arm-none-eabi-size") {%- if CSP.toolchainsPath %} - set_sdkdir("{{ CSP.toolchainsPath }}") + local toolchain_path = os.getenv("CSP_TOOLCHAIN_PATH") or "{{ CSP.toolchainsPath }}" + set_sdkdir(toolchain_path) {%- endif %} end toolchain_end() {%- endblock %} {%- block flags %} -add_cxxflags("-mcpu=cortex-m3", "-mthumb", "-mthumb-interwork", "-ffunction-sections", "-fdata-sections", "-fno-common", "-fmessage-length=0", "-Wall", "-std=c++11", {force = true}) -add_cflags("-mcpu=cortex-m3", "-mthumb", "-mthumb-interwork", "-ffunction-sections", "-fdata-sections", "-fno-common", "-fmessage-length=0", "-Wall", "-std=gnu99", {force = true}) -add_asflags("-mcpu=cortex-m3", "-mthumb", "-mthumb-interwork", "-ffunction-sections", "-fdata-sections", "-fno-common", "-fmessage-length=0", "-Wall", "-x", "assembler-with-cpp", {force = true}) -add_ldflags("-mcpu=cortex-m3", "-mthumb", "-mthumb-interwork", "-specs=nano.specs", "-specs=nosys.specs", "-Wl,--gc-sections,--print-memory-usage", "-T{{ CSP.project.targetChip }}.lds", {force = true}) -add_defines("{{ CSP.project|builder_defines|join('", "') }}", {force = true}) +local common_flags = { + "-mcpu=cortex-m3", + "-mthumb", + "-mthumb-interwork", + "-ffunction-sections", + "-fdata-sections", + "-fno-common", + "-fmessage-length=0", + "-Wall" +} +local cxx_flags = table.join(common_flags, {"-std=c++11"}) +local c_flags = table.join(common_flags, {"-std=gnu99"}) +local as_flags = table.join(common_flags, {"-x", "assembler-with-cpp"}) +local linker_script = path.join(os.projectdir(), "{{ CSP.project.targetChip }}.lds") +local ld_flags = { + "-mcpu=cortex-m3", + "-mthumb", + "-mthumb-interwork", + "-specs=nano.specs", + "-specs=nosys.specs", + "-Wl,--gc-sections,--print-memory-usage", + "-T" .. linker_script +} +local defines = { +{%- for define in CSP.project|builder_defines %} + "{{ define }}", +{%- endfor %} +} {%- endblock %} {%- block target_configs %} - set_languages("c99") - set_languages("cxx11") + set_languages("c99", "cxx11") + set_extension(".elf") - set_toolchains("arm-none-eabi") + set_toolchains("gcc-arm-none-eabi") add_rules("asm") + + add_cxxflags(cxx_flags, {force = true}) + add_cflags(c_flags, {force = true}) + add_asflags(as_flags, {force = true}) + add_ldflags(ld_flags, {force = true}) + add_defines(defines, {force = true}) {%- endblock %} {%- block target_files %} {%- for file in CSP.project|builder_src_files %} - add_files("{{file}}") + add_files("{{ file }}") {%- endfor %} {# #} - add_files("{{ CSP.project|builder_startup_file }}") +{%- if CSP.project.gen.toolchains == "gcc-arm-none-eabi" %} + add_files("startup_gcc.S") +{%- endif %} {# #} {%- for dir in CSP.project|builder_inc_dirs %} add_includedirs("{{ dir }}", {public = true}) @@ -99,6 +132,8 @@ add_defines("{{ CSP.project|builder_defines|join('", "') }}", {force = true}) local objcopy, _ = target:tool("objcopy") local size, _ = target:tool("size") + os.mkdir(artifact_dir) + if objcopy then local hex = path.join(artifact_dir, target:name() .. ".hex") os.vrunv(objcopy, {"-O", "ihex", target:targetfile(), hex}) From efcf7e1f0783f7758a4f708222e76028c9f5cbbf Mon Sep 17 00:00:00 2001 From: xqyjlj Date: Tue, 18 Nov 2025 16:31:26 +0800 Subject: [PATCH 3/4] =?UTF-8?q?=E2=9C=A8=20feat:=20=E6=9B=B4=E6=96=B0?= =?UTF-8?q?=E7=A4=BA=E4=BE=8B=E6=96=87=E4=BB=B6=E9=85=8D=E7=BD=AE?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: xqyjlj --- examples/led/led.csp | 159 ++++++++++++++++++++++++------------------- 1 file changed, 90 insertions(+), 69 deletions(-) diff --git a/examples/led/led.csp b/examples/led/led.csp index d045d18..dee1afa 100644 --- a/examples/led/led.csp +++ b/examples/led/led.csp @@ -1,94 +1,115 @@ configs: + CRC: + crc_ctrl_state_t: false GPIO: PE5: - geehy.gpio_level_t: geehy.gpio_level_low - geehy.gpio_mode_t: geehy.gpio_mode_output - geehy.gpio_output_type_t: geehy.gpio_output_pp - geehy.gpio_speed_t: geehy.gpio_speed_2mhz + gpio_mode_t: output_pp + gpio_speed_t: low + gpio_state_t: reset PE6: - geehy.gpio_level_t: geehy.gpio_level_low - geehy.gpio_mode_t: geehy.gpio_mode_output - geehy.gpio_output_type_t: geehy.gpio_output_pp - geehy.gpio_speed_t: geehy.gpio_speed_2mhz + gpio_mode_t: output_pp + gpio_speed_t: low + gpio_state_t: reset + IWDT: + iwdt_ctrl_state_t: false RCM: - geehy.rcm_adc_clk_div_t: geehy.rcm_adc_clk_div8 - geehy.rcm_adc_clk_out_t: 12000000.0 - geehy.rcm_ahb_div_sdio_t: geehy.rcm_ahb_div_sdio_div2 - geehy.rcm_ahb_div_t: geehy.rcm_ahb_div1 - geehy.rcm_apb1_div_t: geehy.rcm_apb1_div1 - geehy.rcm_apb1_peripherals_out_t: 96000000.0 - geehy.rcm_apb1_timers_mul_t: geehy.rcm_apb1_timers_mul1 - geehy.rcm_apb1_timers_out_t: 96000000.0 - geehy.rcm_apb2_div_t: geehy.rcm_apb2_div1 - geehy.rcm_apb2_peripherals_out_t: 96000000.0 - geehy.rcm_apb2_timers_mul_t: geehy.rcm_apb2_timers_mul1 - geehy.rcm_apb2_timers_out_t: 96000000.0 - geehy.rcm_css_t: geehy.rcm_css_disable - geehy.rcm_emmc_clk_out_t: 96000000.0 - geehy.rcm_fclk_out_t: 96000000.0 - geehy.rcm_flash_latency_t: geehy.rcm_flash_latency_3 - geehy.rcm_fmc_clk_value_t: 8000000.0 - geehy.rcm_fpu_clk_div_t: geehy.rcm_fpu_clk_div1 - geehy.rcm_fpu_clk_out_t: 96000000.0 - geehy.rcm_hclk_out_t: 96000000.0 - geehy.rcm_hclk_t: 96000000.0 - geehy.rcm_hse_clock_source_t: geehy.rcm_hse_clock_source_disable - geehy.rcm_hse_div_pll_t: geehy.rcm_hse_div_pll_div1 - geehy.rcm_hse_div_rtc_t: geehy.rcm_hse_div_rtc_div128 - geehy.rcm_hse_value_t: 8000000 - geehy.rcm_hsi_calibration_t: 16 - geehy.rcm_hsi_div_pll_t: geehy.rcm_hsi_div_pll_div2 - geehy.rcm_hsi_value_t: 8000000 - geehy.rcm_i2s2_clk_freq_value_t: 96000000.0 - geehy.rcm_i2s3_clk_freq_value_t: 96000000.0 - geehy.rcm_iwdg_clk_t: 40000.0 - geehy.rcm_lse_clock_source_t: geehy.rcm_lse_clock_source_disable - geehy.rcm_lse_value_t: 32768 - geehy.rcm_lsi_value_t: 40000 - geehy.rcm_mco_clk_selector_t: geehy.rcm_mco_clk_pll_div2_t - geehy.rcm_mco_clk_t: 48000000.0 - geehy.rcm_mco_enabled_t: false - geehy.rcm_mco_out_t: 48000000.0 - geehy.rcm_pll_clk_selector_t: geehy.rcm_pll_hse_t - geehy.rcm_pll_div_mco_t: geehy.rcm_pll_div_mco_div2 - geehy.rcm_pll_mul_t: geehy.rcm_pll_mul12 - geehy.rcm_pll_t: 8000000.0 - geehy.rcm_prefetch_buffer_enabled_t: geehy.rcm_prefetch_buffer_enable - geehy.rcm_rtc_clk_selector_t: geehy.rcm_rtc_clk_lsi_t - geehy.rcm_rtc_clk_t: 40000 - geehy.rcm_sdio_ahb_clk_out_t: 48000000.0 - geehy.rcm_sdio_clk_out_t: 96000000.0 - geehy.rcm_sys_clk_freq_value_t: 96000000.0 - geehy.rcm_sys_timer_clk_div_t: geehy.rcm_sys_timer_clk_div1 - geehy.rcm_sys_timer_clk_out_t: 96000000.0 - geehy.rcm_system_clk_selector_t: geehy.rcm_system_clk_pll_t - geehy.rcm_usb_clk_div_t: geehy.rcm_usb_clk_div2 - geehy.rcm_usb_clk_out_t: 48000000.0 - pin: + rcm_adc_clk_div_t: /1 + rcm_adc_clk_out_t: 4000000 + rcm_ahb_clk_div_hclk_t: /1 + rcm_apb1_div_t: /1 + rcm_apb1_peripherals_out_t: 8000000 + rcm_apb1_timers_mul_t: "*1" + rcm_apb1_timers_out_t: 8000000 + rcm_apb2_div_t: /1 + rcm_apb2_peripherals_out_t: 8000000 + rcm_apb2_timers_mul_t: "*1" + rcm_apb2_timers_out_t: 8000000 + rcm_dmc_clk_out_t: 8000000 + rcm_fclk_out_t: 8000000 + rcm_flash_latency_t: "3" + rcm_fmc_clk_output_t: 8000000 + rcm_fpu_clk_div_t: /1 + rcm_fpu_clk_out_t: 8000000 + rcm_hclk_div_sys_timer_clk_t: /1 + rcm_hclk_out_t: 8000000 + rcm_hclk_t: 8000000 + rcm_hse_clk_div_pll_t: /1 + rcm_hse_clk_div_rtc_t: /128 + rcm_hse_clk_input_t: 8000000 + rcm_hse_clock_source_t: disable + rcm_hsi_calibration_t: 16 + rcm_hsi_clk_div_pll_t: "2" + rcm_hsi_clk_input_t: 8000000 + rcm_i2s_clk_out_t: 8000000 + rcm_iwdt_clk_output_t: 40000 + rcm_lse_clk_input_t: 32768 + rcm_lse_clock_source_t: disable + rcm_lsi_clk_input_t: 40000 + rcm_mco_clk_mux_t: hsi + rcm_mco_clk_out_t: 8000000 + rcm_mco_enabled_t: disabled + rcm_pll_clk_div_mco_clk_t: /2 + rcm_pll_clk_mul_t: "*2" + rcm_pll_clk_mux_t: hsi_div2 + rcm_pll_clk_t: 4000000 + rcm_prefetch_buffer_enabled_t: rcm_prefetch_buffer_enable + rcm_rtc_clk_mux_t: lsi + rcm_rtc_clk_output_t: 40000 + rcm_sdio_clk_out_t: 8000000 + rcm_sdram_clk_div_t: /1 + rcm_sdram_clk_out_t: 8000000 + rcm_smc_clk_out_t: 8000000 + rcm_sys_clk_t: 8000000 + rcm_sys_timer_clk_out_t: 8000000 + rcm_system_clk_mux_t: hsi + rcm_usb_clk_div_t: /1 + rcm_usb_clk_out_t: 48000000 + SYS: + sys_ctrl_debug_t: no_debug + sys_ctrl_time_base_t: sys_tick + sys_ctrl_wake_up0_t: disable + UART4: + uart_ctrl_mode_t: disable + UART5: + uart_ctrl_mode_t: disable + USART1: + usart_ctrl_hardware_flow_control_rs232_t: disable + usart_ctrl_mode_t: disable + USART2: + usart_ctrl_hardware_flow_control_rs232_t: disable + usart_ctrl_mode_t: disable + USART3: + usart_ctrl_hardware_flow_control_rs232_t: disable + usart_ctrl_mode_t: disable + WWDT: + wwdt_ctrl_state_t: false + pins: PE5: function: GPIO:Output label: LED3 locked: true + mode: "" PE6: function: GPIO:Output label: LED2 locked: true + mode: "" gen: builder: CMake builderVersion: v3.7 - copyLibrary: true hal: csp_hal_apm32f1 halVersion: latest linker: - defaultHeapSize: 512 - defaultStackSize: 1024 - toolchains: arm-none-eabi + heapSize: 512 + stackSize: 1024 + toolchains: gcc-arm-none-eabi toolchainsVersion: 10.3.1 useToolchainsPackage: true modules: -- RCM -- GPIO + - GPIO + - RCM + - SYS name: led targetChip: APM32F103ZET6 vendor: Geehy -version: 0.0.2 +version: 0.1.0 From 8d88cbda1883bb3a271db6e717578c9ee76b8071 Mon Sep 17 00:00:00 2001 From: xqyjlj Date: Tue, 18 Nov 2025 16:34:33 +0800 Subject: [PATCH 4/4] =?UTF-8?q?=F0=9F=90=8E=20ci:=20=E6=9B=B4=E6=96=B0ci?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: xqyjlj --- .github/workflows/build.yml | 77 +++++++++++++++++ .github/workflows/build_release.yml | 128 ---------------------------- .github/workflows/mirror.yml | 5 +- .github/workflows/release.yml | 60 +++++++++++++ 4 files changed, 140 insertions(+), 130 deletions(-) create mode 100644 .github/workflows/build.yml delete mode 100644 .github/workflows/build_release.yml create mode 100644 .github/workflows/release.yml diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml new file mode 100644 index 0000000..c2b2622 --- /dev/null +++ b/.github/workflows/build.yml @@ -0,0 +1,77 @@ +# Licensed under the Apache License v. 2 (the "License") +# You may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# https://www.apache.org/licenses/LICENSE-2.0.html +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# Copyright (C) 2025-2025 xqyjlj +# +# @author xqyjlj +# @file build_release.yml +# +# Change Logs: +# Date Author Notes +# ------------ ---------- ----------------------------------------------- +# 2025-01-16 xqyjlj initial version +# + +name: build + +on: + push: + pull_request: + +jobs: + build: + name: 🧪 build + runs-on: ubuntu-latest + strategy: + matrix: + include: + - target: examples/led + file: led.csp + steps: + - name: ⬇️ checkout csp_hal_apm32f1 + uses: actions/checkout@v5 + with: + submodules: true + + - name: ⬇️ install csp-server + uses: csplink/action_setup_csp@master + + - name: ⬇️ install csp package + shell: bash + run: | + csp-server --version + wget https://github.com/csplink/toolchains/releases/download/arm-none-eabi/gcc-arm-none-eabi-10.3.1.linux.csppack -O gcc-arm-none-eabi.linux.csppack + csp-server install gcc-arm-none-eabi.linux.csppack + csp-server install . + + - name: 👷 build + shell: bash + run: | + pushd ${{ matrix.target }} + csp-server gen ${{ matrix.file }} + mkdir -pv build.cmake + pushd build.cmake + cmake .. + make -j$(nproc) VERBOSE=1 + mkdir -pv artifact + mv *.elf artifact + mv *.bin artifact + mv *.hex artifact + mv *.map artifact + popd + popd + + - name: ⬆️ upload artifact + uses: actions/upload-artifact@v5 + with: + name: artifact + path: ${{ matrix.target }}/build.cmake/artifact diff --git a/.github/workflows/build_release.yml b/.github/workflows/build_release.yml deleted file mode 100644 index 9f348b1..0000000 --- a/.github/workflows/build_release.yml +++ /dev/null @@ -1,128 +0,0 @@ -# Licensed under the GNU General Public License v. 3 (the "License") -# You may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# https://www.gnu.org/licenses/gpl-3.0.html -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -# Copyright (C) 2025-2025 xqyjlj -# -# @author xqyjlj -# @file build_release.yml -# -# Change Logs: -# Date Author Notes -# ------------ ---------- ----------------------------------------------- -# 2025-01-16 xqyjlj initial version -# - -name: build_release - -on: - push: - pull_request: - -jobs: - build: - name: 🧪 build - runs-on: ubuntu-latest - strategy: - matrix: - include: - - target: examples/led - file: led.csp - env: - QT_ASSUME_STDERR_HAS_CONSOLE: 1 - QT_QPA_PLATFORM: "offscreen" - - steps: - - name: ⬇️ checkout csp_hal_apm32f1 - uses: actions/checkout@v5 - with: - submodules: true - - - name: ⬇️ init env packages - shell: bash - run: | - sudo apt update - sudo apt install libegl1-mesa-dev libegl1 wget - - - name: ⬇️ install csp - uses: csplink/action_setup_csp@master - - - name: ⬇️ install csp package - shell: bash - run: | - csp --version - wget https://github.com/csplink/toolchains/releases/download/arm-none-eabi/gcc-arm-none-eabi-10.3.1.linux.csppack -O gcc-arm-none-eabi.linux.csppack - csp install -p gcc-arm-none-eabi.linux.csppack - csp install -p . - - - name: 👷 build - shell: bash - run: | - pushd ${{ matrix.target }} - csp gen -f ${{ matrix.file }} - mkdir -pv build.cmake - pushd build.cmake - cmake .. -DCMAKE_BUILD_TYPE=Release - make -j$(nproc) VERBOSE=1 - mkdir -pv cross/arm/release - mv *.elf cross/arm/release/ - mv *.bin cross/arm/release/ - mv *.hex cross/arm/release/ - mv *.map cross/arm/release/ - - cmake .. -DCMAKE_BUILD_TYPE=Debug - make -j$(nproc) VERBOSE=1 - mkdir -pv cross/arm/debug - mv *.elf cross/arm/debug/ - mv *.bin cross/arm/debug/ - mv *.hex cross/arm/debug/ - mv *.map cross/arm/debug/ - popd - popd - - - name: ⬆️ upload artifact - uses: actions/upload-artifact@v5 - with: - name: artifact - path: ${{ matrix.target }}/build.cmake/cross/arm - release: - name: ⬆️ release - runs-on: ubuntu-latest - needs: [ build ] - if: startsWith(github.ref, 'refs/tags/') - steps: - - name: ⬇️ checkout csp_hal_apm32f1 - uses: actions/checkout@v5 - with: - submodules: true - - - name: ⬇️ init env packages - shell: bash - run: | - sudo apt update - sudo apt install 7zip - - - name: 👷 deploy - shell: bash - run: | - sed -i 's/latest/${{ github.ref_name }}/g' ./csp_hal_apm32f1.csppdsc - source tools/deploy.sh && deploy csp_hal_apm32f1-${{ github.ref_name }} - 7z a -t7z -mx=9 -m0=lzma2 -mf=off csp_hal_apm32f1-${{ github.ref_name }}.csppack csp_hal_apm32f1-${{ github.ref_name }} - - - name: ⬆️ create release - uses: softprops/action-gh-release@v2 - with: - name: csp_hal_apm32f1 ${{ github.ref_name }} - draft: true - prerelease: true - token: ${{ secrets.RELEASE_TOKEN }} - files: | - csp_hal_apm32f1-${{ github.ref_name }}.csppack diff --git a/.github/workflows/mirror.yml b/.github/workflows/mirror.yml index e3e6bf0..da8b32b 100644 --- a/.github/workflows/mirror.yml +++ b/.github/workflows/mirror.yml @@ -1,8 +1,8 @@ -# Licensed under the GNU General Public License v. 3 (the "License") +# Licensed under the Apache License v. 2 (the "License") # You may not use this file except in compliance with the License. # You may obtain a copy of the License at # -# https://www.gnu.org/licenses/gpl-3.0.html +# https://www.apache.org/licenses/LICENSE-2.0.html # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, @@ -37,6 +37,7 @@ jobs: mirror: name: 💕 mirror to another location runs-on: ubuntu-latest + if: ${{ github.repository_owner == 'csplink' }} steps: - name: 💕 mirror uses: csplink/action_git_mirror/@master diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml new file mode 100644 index 0000000..4e8eebc --- /dev/null +++ b/.github/workflows/release.yml @@ -0,0 +1,60 @@ +# Licensed under the Apache License v. 2 (the "License") +# You may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# https://www.apache.org/licenses/LICENSE-2.0.html +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# Copyright (C) 2025-2025 xqyjlj +# +# @author xqyjlj +# @file build_release.yml +# +# Change Logs: +# Date Author Notes +# ------------ ---------- ----------------------------------------------- +# 2025-01-16 xqyjlj initial version +# + +name: release + +on: + push: + pull_request: + +jobs: + release: + name: ⬆️ release + runs-on: ubuntu-latest + if: startsWith(github.ref, 'refs/tags/') + steps: + - name: ⬇️ checkout csp_hal_apm32f1 + uses: actions/checkout@v5 + with: + submodules: true + + - name: ⬇️ install csp-server + uses: csplink/action_setup_csp@master + + - name: 👷 deploy + shell: bash + run: | + csp-server --version + sed -i 's/latest/${{ github.ref_name }}/g' ./csp_hal_apm32f1.csppdsc + csp-server make-pkg . + file csp_hal_apm32f1-${{ github.ref_name }}.csppack + + - name: ⬆️ create release + uses: softprops/action-gh-release@v2 + with: + name: csp_hal_apm32f1 ${{ github.ref_name }} + draft: true + prerelease: true + token: ${{ secrets.RELEASE_TOKEN }} + files: | + csp_hal_apm32f1-${{ github.ref_name }}.csppack