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larrchjgunthorpe
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RDMA/hns: Fix 0-length sge calculation error
One RC SQ WQE can store 2 sges but UD can't, so ignore 2 valid sges of wr.sglist for RC which have been filled in WQE before setting extended sge. Either of RC and UD can not contain 0-length sges, so these 0-length sges should be skipped. Fixes: 54d6638 ("RDMA/hns: Optimize WQE buffer size calculating process") Link: https://lore.kernel.org/r/1606558959-48510-2-git-send-email-liweihang@huawei.com Signed-off-by: Lang Cheng <chenglang@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Reviewed-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
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drivers/infiniband/hw/hns/hns_roce_hw_v2.c

Lines changed: 10 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -214,25 +214,20 @@ static int fill_ext_sge_inl_data(struct hns_roce_qp *qp,
214214
return 0;
215215
}
216216

217-
static void set_extend_sge(struct hns_roce_qp *qp, const struct ib_send_wr *wr,
218-
unsigned int *sge_ind, unsigned int valid_num_sge)
217+
static void set_extend_sge(struct hns_roce_qp *qp, struct ib_sge *sge,
218+
unsigned int *sge_ind, unsigned int cnt)
219219
{
220220
struct hns_roce_v2_wqe_data_seg *dseg;
221-
unsigned int cnt = valid_num_sge;
222-
struct ib_sge *sge = wr->sg_list;
223221
unsigned int idx = *sge_ind;
224222

225-
if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) {
226-
cnt -= HNS_ROCE_SGE_IN_WQE;
227-
sge += HNS_ROCE_SGE_IN_WQE;
228-
}
229-
230223
while (cnt > 0) {
231224
dseg = hns_roce_get_extend_sge(qp, idx & (qp->sge.sge_cnt - 1));
232-
set_data_seg_v2(dseg, sge);
233-
idx++;
225+
if (likely(sge->length)) {
226+
set_data_seg_v2(dseg, sge);
227+
idx++;
228+
cnt--;
229+
}
234230
sge++;
235-
cnt--;
236231
}
237232

238233
*sge_ind = idx;
@@ -340,7 +335,8 @@ static int set_rwqe_data_seg(struct ib_qp *ibqp, const struct ib_send_wr *wr,
340335
}
341336
}
342337

343-
set_extend_sge(qp, wr, sge_ind, valid_num_sge);
338+
set_extend_sge(qp, wr->sg_list + i, sge_ind,
339+
valid_num_sge - HNS_ROCE_SGE_IN_WQE);
344340
}
345341

346342
roce_set_field(rc_sq_wqe->byte_16,
@@ -503,7 +499,7 @@ static inline int set_ud_wqe(struct hns_roce_qp *qp,
503499
if (ret)
504500
return ret;
505501

506-
set_extend_sge(qp, wr, &curr_idx, valid_num_sge);
502+
set_extend_sge(qp, wr->sg_list, &curr_idx, valid_num_sge);
507503

508504
/*
509505
* The pipeline can sequentially post all valid WQEs into WQ buffer,

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