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Ingo Molnar
committed
Merge branch 'x86/cpu' into perf/core, to pick up dependent commits
We are going to fix perf-events fallout of changes in tip:x86/cpu, so merge in that branch first. Signed-off-by: Ingo Molnar <mingo@kernel.org>
2 parents 690ca3a + 2eda374 commit 10ed2b1

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39 files changed

+726
-494
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‎arch/x86/events/intel/cstate.c‎

Lines changed: 72 additions & 72 deletions
Original file line numberDiff line numberDiff line change
@@ -696,78 +696,78 @@ static const struct cstate_model srf_cstates __initconst = {
696696

697697

698698
static const struct x86_cpu_id intel_cstates_match[] __initconst = {
699-
X86_MATCH_INTEL_FAM6_MODEL(NEHALEM, &nhm_cstates),
700-
X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EP, &nhm_cstates),
701-
X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EX, &nhm_cstates),
702-
703-
X86_MATCH_INTEL_FAM6_MODEL(WESTMERE, &nhm_cstates),
704-
X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EP, &nhm_cstates),
705-
X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EX, &nhm_cstates),
706-
707-
X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &snb_cstates),
708-
X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &snb_cstates),
709-
710-
X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE, &snb_cstates),
711-
X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &snb_cstates),
712-
713-
X86_MATCH_INTEL_FAM6_MODEL(HASWELL, &snb_cstates),
714-
X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &snb_cstates),
715-
X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G, &snb_cstates),
716-
717-
X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L, &hswult_cstates),
718-
719-
X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, &slm_cstates),
720-
X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_D, &slm_cstates),
721-
X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, &slm_cstates),
722-
723-
X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, &snb_cstates),
724-
X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &snb_cstates),
725-
X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, &snb_cstates),
726-
X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &snb_cstates),
727-
728-
X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &snb_cstates),
729-
X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &snb_cstates),
730-
X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &snb_cstates),
731-
732-
X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &hswult_cstates),
733-
X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &hswult_cstates),
734-
X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &hswult_cstates),
735-
X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &hswult_cstates),
736-
737-
X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L, &cnl_cstates),
738-
739-
X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &knl_cstates),
740-
X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &knl_cstates),
741-
742-
X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &glm_cstates),
743-
X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D, &glm_cstates),
744-
X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &glm_cstates),
745-
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &glm_cstates),
746-
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, &glm_cstates),
747-
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, &glm_cstates),
748-
X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &adl_cstates),
749-
X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT_X, &srf_cstates),
750-
X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT, &grr_cstates),
751-
752-
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &icl_cstates),
753-
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &icl_cstates),
754-
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &icx_cstates),
755-
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &icx_cstates),
756-
X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &icx_cstates),
757-
X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &icx_cstates),
758-
X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_X, &icx_cstates),
759-
X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_D, &icx_cstates),
760-
761-
X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &icl_cstates),
762-
X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &icl_cstates),
763-
X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, &icl_cstates),
764-
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &adl_cstates),
765-
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &adl_cstates),
766-
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &adl_cstates),
767-
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &adl_cstates),
768-
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &adl_cstates),
769-
X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE, &adl_cstates),
770-
X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, &adl_cstates),
699+
X86_MATCH_VFM(INTEL_NEHALEM, &nhm_cstates),
700+
X86_MATCH_VFM(INTEL_NEHALEM_EP, &nhm_cstates),
701+
X86_MATCH_VFM(INTEL_NEHALEM_EX, &nhm_cstates),
702+
703+
X86_MATCH_VFM(INTEL_WESTMERE, &nhm_cstates),
704+
X86_MATCH_VFM(INTEL_WESTMERE_EP, &nhm_cstates),
705+
X86_MATCH_VFM(INTEL_WESTMERE_EX, &nhm_cstates),
706+
707+
X86_MATCH_VFM(INTEL_SANDYBRIDGE, &snb_cstates),
708+
X86_MATCH_VFM(INTEL_SANDYBRIDGE_X, &snb_cstates),
709+
710+
X86_MATCH_VFM(INTEL_IVYBRIDGE, &snb_cstates),
711+
X86_MATCH_VFM(INTEL_IVYBRIDGE_X, &snb_cstates),
712+
713+
X86_MATCH_VFM(INTEL_HASWELL, &snb_cstates),
714+
X86_MATCH_VFM(INTEL_HASWELL_X, &snb_cstates),
715+
X86_MATCH_VFM(INTEL_HASWELL_G, &snb_cstates),
716+
717+
X86_MATCH_VFM(INTEL_HASWELL_L, &hswult_cstates),
718+
719+
X86_MATCH_VFM(INTEL_ATOM_SILVERMONT, &slm_cstates),
720+
X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_D, &slm_cstates),
721+
X86_MATCH_VFM(INTEL_ATOM_AIRMONT, &slm_cstates),
722+
723+
X86_MATCH_VFM(INTEL_BROADWELL, &snb_cstates),
724+
X86_MATCH_VFM(INTEL_BROADWELL_D, &snb_cstates),
725+
X86_MATCH_VFM(INTEL_BROADWELL_G, &snb_cstates),
726+
X86_MATCH_VFM(INTEL_BROADWELL_X, &snb_cstates),
727+
728+
X86_MATCH_VFM(INTEL_SKYLAKE_L, &snb_cstates),
729+
X86_MATCH_VFM(INTEL_SKYLAKE, &snb_cstates),
730+
X86_MATCH_VFM(INTEL_SKYLAKE_X, &snb_cstates),
731+
732+
X86_MATCH_VFM(INTEL_KABYLAKE_L, &hswult_cstates),
733+
X86_MATCH_VFM(INTEL_KABYLAKE, &hswult_cstates),
734+
X86_MATCH_VFM(INTEL_COMETLAKE_L, &hswult_cstates),
735+
X86_MATCH_VFM(INTEL_COMETLAKE, &hswult_cstates),
736+
737+
X86_MATCH_VFM(INTEL_CANNONLAKE_L, &cnl_cstates),
738+
739+
X86_MATCH_VFM(INTEL_XEON_PHI_KNL, &knl_cstates),
740+
X86_MATCH_VFM(INTEL_XEON_PHI_KNM, &knl_cstates),
741+
742+
X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, &glm_cstates),
743+
X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_D, &glm_cstates),
744+
X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_PLUS, &glm_cstates),
745+
X86_MATCH_VFM(INTEL_ATOM_TREMONT_D, &glm_cstates),
746+
X86_MATCH_VFM(INTEL_ATOM_TREMONT, &glm_cstates),
747+
X86_MATCH_VFM(INTEL_ATOM_TREMONT_L, &glm_cstates),
748+
X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, &adl_cstates),
749+
X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X, &srf_cstates),
750+
X86_MATCH_VFM(INTEL_ATOM_CRESTMONT, &grr_cstates),
751+
752+
X86_MATCH_VFM(INTEL_ICELAKE_L, &icl_cstates),
753+
X86_MATCH_VFM(INTEL_ICELAKE, &icl_cstates),
754+
X86_MATCH_VFM(INTEL_ICELAKE_X, &icx_cstates),
755+
X86_MATCH_VFM(INTEL_ICELAKE_D, &icx_cstates),
756+
X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, &icx_cstates),
757+
X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, &icx_cstates),
758+
X86_MATCH_VFM(INTEL_GRANITERAPIDS_X, &icx_cstates),
759+
X86_MATCH_VFM(INTEL_GRANITERAPIDS_D, &icx_cstates),
760+
761+
X86_MATCH_VFM(INTEL_TIGERLAKE_L, &icl_cstates),
762+
X86_MATCH_VFM(INTEL_TIGERLAKE, &icl_cstates),
763+
X86_MATCH_VFM(INTEL_ROCKETLAKE, &icl_cstates),
764+
X86_MATCH_VFM(INTEL_ALDERLAKE, &adl_cstates),
765+
X86_MATCH_VFM(INTEL_ALDERLAKE_L, &adl_cstates),
766+
X86_MATCH_VFM(INTEL_RAPTORLAKE, &adl_cstates),
767+
X86_MATCH_VFM(INTEL_RAPTORLAKE_P, &adl_cstates),
768+
X86_MATCH_VFM(INTEL_RAPTORLAKE_S, &adl_cstates),
769+
X86_MATCH_VFM(INTEL_METEORLAKE, &adl_cstates),
770+
X86_MATCH_VFM(INTEL_METEORLAKE_L, &adl_cstates),
771771
{ },
772772
};
773773
MODULE_DEVICE_TABLE(x86cpu, intel_cstates_match);

‎arch/x86/events/intel/lbr.c‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,7 @@
22
#include <linux/perf_event.h>
33
#include <linux/types.h>
44

5+
#include <asm/cpu_device_id.h>
56
#include <asm/perf_event.h>
67
#include <asm/msr.h>
78

@@ -1457,7 +1458,7 @@ void __init intel_pmu_lbr_init_atom(void)
14571458
* to have an operational LBR which can freeze
14581459
* on PMU interrupt
14591460
*/
1460-
if (boot_cpu_data.x86_model == 28
1461+
if (boot_cpu_data.x86_vfm == INTEL_ATOM_BONNELL
14611462
&& boot_cpu_data.x86_stepping < 10) {
14621463
pr_cont("LBR disabled due to erratum");
14631464
return;

‎arch/x86/events/intel/pt.c‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,7 @@
2222
#include <asm/insn.h>
2323
#include <asm/io.h>
2424
#include <asm/intel_pt.h>
25-
#include <asm/intel-family.h>
25+
#include <asm/cpu_device_id.h>
2626

2727
#include "../perf_event.h"
2828
#include "pt.h"
@@ -211,11 +211,11 @@ static int __init pt_pmu_hw_init(void)
211211
}
212212

213213
/* model-specific quirks */
214-
switch (boot_cpu_data.x86_model) {
215-
case INTEL_FAM6_BROADWELL:
216-
case INTEL_FAM6_BROADWELL_D:
217-
case INTEL_FAM6_BROADWELL_G:
218-
case INTEL_FAM6_BROADWELL_X:
214+
switch (boot_cpu_data.x86_vfm) {
215+
case INTEL_BROADWELL:
216+
case INTEL_BROADWELL_D:
217+
case INTEL_BROADWELL_G:
218+
case INTEL_BROADWELL_X:
219219
/* not setting BRANCH_EN will #GP, erratum BDM106 */
220220
pt_pmu.branch_en_always_on = true;
221221
break;

‎arch/x86/events/intel/uncore.c‎

Lines changed: 50 additions & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -1829,56 +1829,56 @@ static const struct intel_uncore_init_fun generic_uncore_init __initconst = {
18291829
};
18301830

18311831
static const struct x86_cpu_id intel_uncore_match[] __initconst = {
1832-
X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EP, &nhm_uncore_init),
1833-
X86_MATCH_INTEL_FAM6_MODEL(NEHALEM, &nhm_uncore_init),
1834-
X86_MATCH_INTEL_FAM6_MODEL(WESTMERE, &nhm_uncore_init),
1835-
X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EP, &nhm_uncore_init),
1836-
X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &snb_uncore_init),
1837-
X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE, &ivb_uncore_init),
1838-
X86_MATCH_INTEL_FAM6_MODEL(HASWELL, &hsw_uncore_init),
1839-
X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L, &hsw_uncore_init),
1840-
X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G, &hsw_uncore_init),
1841-
X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, &bdw_uncore_init),
1842-
X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, &bdw_uncore_init),
1843-
X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &snbep_uncore_init),
1844-
X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EX, &nhmex_uncore_init),
1845-
X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EX, &nhmex_uncore_init),
1846-
X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &ivbep_uncore_init),
1847-
X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &hswep_uncore_init),
1848-
X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &bdx_uncore_init),
1849-
X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &bdx_uncore_init),
1850-
X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &knl_uncore_init),
1851-
X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &knl_uncore_init),
1852-
X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &skl_uncore_init),
1853-
X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &skl_uncore_init),
1854-
X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &skx_uncore_init),
1855-
X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &skl_uncore_init),
1856-
X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &skl_uncore_init),
1857-
X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &skl_uncore_init),
1858-
X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &skl_uncore_init),
1859-
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &icl_uncore_init),
1860-
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_NNPI, &icl_uncore_init),
1861-
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &icl_uncore_init),
1862-
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &icx_uncore_init),
1863-
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &icx_uncore_init),
1864-
X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &tgl_l_uncore_init),
1865-
X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &tgl_uncore_init),
1866-
X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, &rkl_uncore_init),
1867-
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &adl_uncore_init),
1868-
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &adl_uncore_init),
1869-
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &adl_uncore_init),
1870-
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &adl_uncore_init),
1871-
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &adl_uncore_init),
1872-
X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE, &mtl_uncore_init),
1873-
X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, &mtl_uncore_init),
1874-
X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &spr_uncore_init),
1875-
X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &spr_uncore_init),
1876-
X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_X, &gnr_uncore_init),
1877-
X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_D, &gnr_uncore_init),
1878-
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &snr_uncore_init),
1879-
X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &adl_uncore_init),
1880-
X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT_X, &gnr_uncore_init),
1881-
X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT, &gnr_uncore_init),
1832+
X86_MATCH_VFM(INTEL_NEHALEM_EP, &nhm_uncore_init),
1833+
X86_MATCH_VFM(INTEL_NEHALEM, &nhm_uncore_init),
1834+
X86_MATCH_VFM(INTEL_WESTMERE, &nhm_uncore_init),
1835+
X86_MATCH_VFM(INTEL_WESTMERE_EP, &nhm_uncore_init),
1836+
X86_MATCH_VFM(INTEL_SANDYBRIDGE, &snb_uncore_init),
1837+
X86_MATCH_VFM(INTEL_IVYBRIDGE, &ivb_uncore_init),
1838+
X86_MATCH_VFM(INTEL_HASWELL, &hsw_uncore_init),
1839+
X86_MATCH_VFM(INTEL_HASWELL_L, &hsw_uncore_init),
1840+
X86_MATCH_VFM(INTEL_HASWELL_G, &hsw_uncore_init),
1841+
X86_MATCH_VFM(INTEL_BROADWELL, &bdw_uncore_init),
1842+
X86_MATCH_VFM(INTEL_BROADWELL_G, &bdw_uncore_init),
1843+
X86_MATCH_VFM(INTEL_SANDYBRIDGE_X, &snbep_uncore_init),
1844+
X86_MATCH_VFM(INTEL_NEHALEM_EX, &nhmex_uncore_init),
1845+
X86_MATCH_VFM(INTEL_WESTMERE_EX, &nhmex_uncore_init),
1846+
X86_MATCH_VFM(INTEL_IVYBRIDGE_X, &ivbep_uncore_init),
1847+
X86_MATCH_VFM(INTEL_HASWELL_X, &hswep_uncore_init),
1848+
X86_MATCH_VFM(INTEL_BROADWELL_X, &bdx_uncore_init),
1849+
X86_MATCH_VFM(INTEL_BROADWELL_D, &bdx_uncore_init),
1850+
X86_MATCH_VFM(INTEL_XEON_PHI_KNL, &knl_uncore_init),
1851+
X86_MATCH_VFM(INTEL_XEON_PHI_KNM, &knl_uncore_init),
1852+
X86_MATCH_VFM(INTEL_SKYLAKE, &skl_uncore_init),
1853+
X86_MATCH_VFM(INTEL_SKYLAKE_L, &skl_uncore_init),
1854+
X86_MATCH_VFM(INTEL_SKYLAKE_X, &skx_uncore_init),
1855+
X86_MATCH_VFM(INTEL_KABYLAKE_L, &skl_uncore_init),
1856+
X86_MATCH_VFM(INTEL_KABYLAKE, &skl_uncore_init),
1857+
X86_MATCH_VFM(INTEL_COMETLAKE_L, &skl_uncore_init),
1858+
X86_MATCH_VFM(INTEL_COMETLAKE, &skl_uncore_init),
1859+
X86_MATCH_VFM(INTEL_ICELAKE_L, &icl_uncore_init),
1860+
X86_MATCH_VFM(INTEL_ICELAKE_NNPI, &icl_uncore_init),
1861+
X86_MATCH_VFM(INTEL_ICELAKE, &icl_uncore_init),
1862+
X86_MATCH_VFM(INTEL_ICELAKE_D, &icx_uncore_init),
1863+
X86_MATCH_VFM(INTEL_ICELAKE_X, &icx_uncore_init),
1864+
X86_MATCH_VFM(INTEL_TIGERLAKE_L, &tgl_l_uncore_init),
1865+
X86_MATCH_VFM(INTEL_TIGERLAKE, &tgl_uncore_init),
1866+
X86_MATCH_VFM(INTEL_ROCKETLAKE, &rkl_uncore_init),
1867+
X86_MATCH_VFM(INTEL_ALDERLAKE, &adl_uncore_init),
1868+
X86_MATCH_VFM(INTEL_ALDERLAKE_L, &adl_uncore_init),
1869+
X86_MATCH_VFM(INTEL_RAPTORLAKE, &adl_uncore_init),
1870+
X86_MATCH_VFM(INTEL_RAPTORLAKE_P, &adl_uncore_init),
1871+
X86_MATCH_VFM(INTEL_RAPTORLAKE_S, &adl_uncore_init),
1872+
X86_MATCH_VFM(INTEL_METEORLAKE, &mtl_uncore_init),
1873+
X86_MATCH_VFM(INTEL_METEORLAKE_L, &mtl_uncore_init),
1874+
X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, &spr_uncore_init),
1875+
X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, &spr_uncore_init),
1876+
X86_MATCH_VFM(INTEL_GRANITERAPIDS_X, &gnr_uncore_init),
1877+
X86_MATCH_VFM(INTEL_GRANITERAPIDS_D, &gnr_uncore_init),
1878+
X86_MATCH_VFM(INTEL_ATOM_TREMONT_D, &snr_uncore_init),
1879+
X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, &adl_uncore_init),
1880+
X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X, &gnr_uncore_init),
1881+
X86_MATCH_VFM(INTEL_ATOM_CRESTMONT, &gnr_uncore_init),
18821882
{},
18831883
};
18841884
MODULE_DEVICE_TABLE(x86cpu, intel_uncore_match);

‎arch/x86/events/intel/uncore_nhmex.c‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
22
/* Nehalem-EX/Westmere-EX uncore support */
3+
#include <asm/cpu_device_id.h>
34
#include "uncore.h"
45

56
/* NHM-EX event control */
@@ -1217,7 +1218,7 @@ static struct intel_uncore_type *nhmex_msr_uncores[] = {
12171218

12181219
void nhmex_uncore_cpu_init(void)
12191220
{
1220-
if (boot_cpu_data.x86_model == 46)
1221+
if (boot_cpu_data.x86_vfm == INTEL_NEHALEM_EX)
12211222
uncore_nhmex = true;
12221223
else
12231224
nhmex_uncore_mbox.event_descs = wsmex_uncore_mbox_events;

‎arch/x86/events/intel/uncore_snbep.c‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
22
/* SandyBridge-EP/IvyTown uncore support */
3+
#include <asm/cpu_device_id.h>
34
#include "uncore.h"
45
#include "uncore_discovery.h"
56

@@ -3285,7 +3286,7 @@ void bdx_uncore_cpu_init(void)
32853286
uncore_msr_uncores = bdx_msr_uncores;
32863287

32873288
/* Detect systems with no SBOXes */
3288-
if ((boot_cpu_data.x86_model == 86) || hswep_has_limit_sbox(BDX_PCU_DID))
3289+
if (boot_cpu_data.x86_vfm == INTEL_BROADWELL_D || hswep_has_limit_sbox(BDX_PCU_DID))
32893290
uncore_msr_uncores[BDX_MSR_UNCORE_SBOX] = NULL;
32903291

32913292
hswep_uncore_pcu.constraints = bdx_uncore_pcu_constraints;
@@ -5394,7 +5395,7 @@ static int icx_iio_get_topology(struct intel_uncore_type *type)
53945395
static void icx_iio_set_mapping(struct intel_uncore_type *type)
53955396
{
53965397
/* Detect ICX-D system. This case is not supported */
5397-
if (boot_cpu_data.x86_model == INTEL_FAM6_ICELAKE_D) {
5398+
if (boot_cpu_data.x86_vfm == INTEL_ICELAKE_D) {
53985399
pmu_clear_mapping_attr(type->attr_update, &icx_iio_mapping_group);
53995400
return;
54005401
}

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