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Alex Elderdavem330
Alex Elder
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davem330
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net: ipa: add a parameter to aggregation registers
Starting with IPA v5.0, a single IPA instance can have more than 32 endpoints defined. To handle this, each register that holds a bitmap of IPA endpoints is replicated as needed to represent the available endpoints. To prepare for this, registers that represent endpoint IDs in a bit mask will be defined to have a parameter, with a stride value of 4 bytes. The first 32 endpoints are represented in the first 32-bit register, then the next (up to) 32 endpoints at an offset 4 bytes higher. When accessing such a register, the endpoint ID divided by 32 determines the offset, and the endpoint ID modulo 32 defines the endpoint's bit position within the register. The first two registers we'll update for this are STATE_AGGR_ACTIVE and AGGR_FORCE_CLOSE. Until more than 32 endpoints are supported, this change has no practical effect. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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+22
-16
lines changed

7 files changed

+22
-16
lines changed

‎drivers/net/ipa/ipa_endpoint.c‎

Lines changed: 10 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -350,29 +350,35 @@ ipa_endpoint_program_delay(struct ipa_endpoint *endpoint, bool enable)
350350

351351
static bool ipa_endpoint_aggr_active(struct ipa_endpoint *endpoint)
352352
{
353-
u32 mask = BIT(endpoint->endpoint_id);
353+
u32 endpoint_id = endpoint->endpoint_id;
354+
u32 mask = BIT(endpoint_id % 32);
354355
struct ipa *ipa = endpoint->ipa;
356+
u32 unit = endpoint_id / 32;
355357
const struct ipa_reg *reg;
356358
u32 val;
357359

360+
/* This works until we actually have more than 32 endpoints */
358361
WARN_ON(!(mask & ipa->available));
359362

360363
reg = ipa_reg(ipa, STATE_AGGR_ACTIVE);
361-
val = ioread32(ipa->reg_virt + ipa_reg_offset(reg));
364+
val = ioread32(ipa->reg_virt + ipa_reg_n_offset(reg, unit));
362365

363366
return !!(val & mask);
364367
}
365368

366369
static void ipa_endpoint_force_close(struct ipa_endpoint *endpoint)
367370
{
368-
u32 mask = BIT(endpoint->endpoint_id);
371+
u32 endpoint_id = endpoint->endpoint_id;
372+
u32 mask = BIT(endpoint_id % 32);
369373
struct ipa *ipa = endpoint->ipa;
374+
u32 unit = endpoint_id / 32;
370375
const struct ipa_reg *reg;
371376

377+
/* This works until we actually have more than 32 endpoints */
372378
WARN_ON(!(mask & ipa->available));
373379

374380
reg = ipa_reg(ipa, AGGR_FORCE_CLOSE);
375-
iowrite32(mask, ipa->reg_virt + ipa_reg_offset(reg));
381+
iowrite32(mask, ipa->reg_virt + ipa_reg_n_offset(reg, unit));
376382
}
377383

378384
/**

‎drivers/net/ipa/reg/ipa_reg-v3.1.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -103,7 +103,7 @@ static const u32 ipa_reg_filt_rout_hash_flush_fmask[] = {
103103
IPA_REG_FIELDS(FILT_ROUT_HASH_FLUSH, filt_rout_hash_flush, 0x0000090);
104104

105105
/* Valid bits defined by ipa->available */
106-
IPA_REG(STATE_AGGR_ACTIVE, state_aggr_active, 0x0000010c);
106+
IPA_REG_STRIDE(STATE_AGGR_ACTIVE, state_aggr_active, 0x0000010c, 0x0004);
107107

108108
IPA_REG(IPA_BCR, ipa_bcr, 0x000001d0);
109109

@@ -116,7 +116,7 @@ static const u32 ipa_reg_local_pkt_proc_cntxt_fmask[] = {
116116
IPA_REG_FIELDS(LOCAL_PKT_PROC_CNTXT, local_pkt_proc_cntxt, 0x000001e8);
117117

118118
/* Valid bits defined by ipa->available */
119-
IPA_REG(AGGR_FORCE_CLOSE, aggr_force_close, 0x000001ec);
119+
IPA_REG_STRIDE(AGGR_FORCE_CLOSE, aggr_force_close, 0x000001ec, 0x0004);
120120

121121
static const u32 ipa_reg_counter_cfg_fmask[] = {
122122
[EOT_COAL_GRANULARITY] = GENMASK(3, 0),

‎drivers/net/ipa/reg/ipa_reg-v3.5.1.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -108,7 +108,7 @@ static const u32 ipa_reg_filt_rout_hash_flush_fmask[] = {
108108
IPA_REG_FIELDS(FILT_ROUT_HASH_FLUSH, filt_rout_hash_flush, 0x0000090);
109109

110110
/* Valid bits defined by ipa->available */
111-
IPA_REG(STATE_AGGR_ACTIVE, state_aggr_active, 0x0000010c);
111+
IPA_REG_STRIDE(STATE_AGGR_ACTIVE, state_aggr_active, 0x0000010c, 0x0004);
112112

113113
IPA_REG(IPA_BCR, ipa_bcr, 0x000001d0);
114114

@@ -121,7 +121,7 @@ static const u32 ipa_reg_local_pkt_proc_cntxt_fmask[] = {
121121
IPA_REG_FIELDS(LOCAL_PKT_PROC_CNTXT, local_pkt_proc_cntxt, 0x000001e8);
122122

123123
/* Valid bits defined by ipa->available */
124-
IPA_REG(AGGR_FORCE_CLOSE, aggr_force_close, 0x000001ec);
124+
IPA_REG_STRIDE(AGGR_FORCE_CLOSE, aggr_force_close, 0x000001ec, 0x0004);
125125

126126
static const u32 ipa_reg_counter_cfg_fmask[] = {
127127
/* Bits 0-3 reserved */

‎drivers/net/ipa/reg/ipa_reg-v4.11.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -140,7 +140,7 @@ static const u32 ipa_reg_filt_rout_hash_flush_fmask[] = {
140140
IPA_REG_FIELDS(FILT_ROUT_HASH_FLUSH, filt_rout_hash_flush, 0x000014c);
141141

142142
/* Valid bits defined by ipa->available */
143-
IPA_REG(STATE_AGGR_ACTIVE, state_aggr_active, 0x000000b4);
143+
IPA_REG_STRIDE(STATE_AGGR_ACTIVE, state_aggr_active, 0x000000b4, 0x0004);
144144

145145
static const u32 ipa_reg_local_pkt_proc_cntxt_fmask[] = {
146146
[IPA_BASE_ADDR] = GENMASK(17, 0),
@@ -151,7 +151,7 @@ static const u32 ipa_reg_local_pkt_proc_cntxt_fmask[] = {
151151
IPA_REG_FIELDS(LOCAL_PKT_PROC_CNTXT, local_pkt_proc_cntxt, 0x000001e8);
152152

153153
/* Valid bits defined by ipa->available */
154-
IPA_REG(AGGR_FORCE_CLOSE, aggr_force_close, 0x000001ec);
154+
IPA_REG_STRIDE(AGGR_FORCE_CLOSE, aggr_force_close, 0x000001ec, 0x0004);
155155

156156
static const u32 ipa_reg_ipa_tx_cfg_fmask[] = {
157157
/* Bits 0-1 reserved */

‎drivers/net/ipa/reg/ipa_reg-v4.2.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -132,7 +132,7 @@ static const u32 ipa_reg_filt_rout_hash_flush_fmask[] = {
132132
IPA_REG_FIELDS(FILT_ROUT_HASH_FLUSH, filt_rout_hash_flush, 0x000014c);
133133

134134
/* Valid bits defined by ipa->available */
135-
IPA_REG(STATE_AGGR_ACTIVE, state_aggr_active, 0x000000b4);
135+
IPA_REG_STRIDE(STATE_AGGR_ACTIVE, state_aggr_active, 0x000000b4, 0x0004);
136136

137137
IPA_REG(IPA_BCR, ipa_bcr, 0x000001d0);
138138

@@ -145,7 +145,7 @@ static const u32 ipa_reg_local_pkt_proc_cntxt_fmask[] = {
145145
IPA_REG_FIELDS(LOCAL_PKT_PROC_CNTXT, local_pkt_proc_cntxt, 0x000001e8);
146146

147147
/* Valid bits defined by ipa->available */
148-
IPA_REG(AGGR_FORCE_CLOSE, aggr_force_close, 0x000001ec);
148+
IPA_REG_STRIDE(AGGR_FORCE_CLOSE, aggr_force_close, 0x000001ec, 0x0004);
149149

150150
static const u32 ipa_reg_counter_cfg_fmask[] = {
151151
/* Bits 0-3 reserved */

‎drivers/net/ipa/reg/ipa_reg-v4.5.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -134,7 +134,7 @@ static const u32 ipa_reg_filt_rout_hash_flush_fmask[] = {
134134
IPA_REG_FIELDS(FILT_ROUT_HASH_FLUSH, filt_rout_hash_flush, 0x000014c);
135135

136136
/* Valid bits defined by ipa->available */
137-
IPA_REG(STATE_AGGR_ACTIVE, state_aggr_active, 0x000000b4);
137+
IPA_REG_STRIDE(STATE_AGGR_ACTIVE, state_aggr_active, 0x000000b4, 0x0004);
138138

139139
static const u32 ipa_reg_local_pkt_proc_cntxt_fmask[] = {
140140
[IPA_BASE_ADDR] = GENMASK(17, 0),
@@ -145,7 +145,7 @@ static const u32 ipa_reg_local_pkt_proc_cntxt_fmask[] = {
145145
IPA_REG_FIELDS(LOCAL_PKT_PROC_CNTXT, local_pkt_proc_cntxt, 0x000001e8);
146146

147147
/* Valid bits defined by ipa->available */
148-
IPA_REG(AGGR_FORCE_CLOSE, aggr_force_close, 0x000001ec);
148+
IPA_REG_STRIDE(AGGR_FORCE_CLOSE, aggr_force_close, 0x000001ec, 0x0004);
149149

150150
static const u32 ipa_reg_ipa_tx_cfg_fmask[] = {
151151
/* Bits 0-1 reserved */

‎drivers/net/ipa/reg/ipa_reg-v4.9.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -139,7 +139,7 @@ static const u32 ipa_reg_filt_rout_hash_flush_fmask[] = {
139139
IPA_REG_FIELDS(FILT_ROUT_HASH_FLUSH, filt_rout_hash_flush, 0x000014c);
140140

141141
/* Valid bits defined by ipa->available */
142-
IPA_REG(STATE_AGGR_ACTIVE, state_aggr_active, 0x000000b4);
142+
IPA_REG_STRIDE(STATE_AGGR_ACTIVE, state_aggr_active, 0x000000b4, 0x0004);
143143

144144
static const u32 ipa_reg_local_pkt_proc_cntxt_fmask[] = {
145145
[IPA_BASE_ADDR] = GENMASK(17, 0),
@@ -150,7 +150,7 @@ static const u32 ipa_reg_local_pkt_proc_cntxt_fmask[] = {
150150
IPA_REG_FIELDS(LOCAL_PKT_PROC_CNTXT, local_pkt_proc_cntxt, 0x000001e8);
151151

152152
/* Valid bits defined by ipa->available */
153-
IPA_REG(AGGR_FORCE_CLOSE, aggr_force_close, 0x000001ec);
153+
IPA_REG_STRIDE(AGGR_FORCE_CLOSE, aggr_force_close, 0x000001ec, 0x0004);
154154

155155
static const u32 ipa_reg_ipa_tx_cfg_fmask[] = {
156156
/* Bits 0-1 reserved */

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