@@ -2974,16 +2974,13 @@ static int spi_nor_spimem_check_pp(struct spi_nor *nor,
29742974 * spi_nor_spimem_adjust_hwcaps - Find optimal Read/Write protocol
29752975 * based on SPI controller capabilities
29762976 * @nor: pointer to a 'struct spi_nor'
2977- * @params: pointer to the 'struct spi_nor_flash_parameter'
2978- * representing SPI NOR flash capabilities
29792977 * @hwcaps: pointer to resulting capabilities after adjusting
29802978 * according to controller and flash's capability
29812979 */
29822980static void
2983- spi_nor_spimem_adjust_hwcaps (struct spi_nor * nor ,
2984- const struct spi_nor_flash_parameter * params ,
2985- u32 * hwcaps )
2981+ spi_nor_spimem_adjust_hwcaps (struct spi_nor * nor , u32 * hwcaps )
29862982{
2983+ struct spi_nor_flash_parameter * params = & nor -> params ;
29872984 unsigned int cap ;
29882985
29892986 /* DTR modes are not supported yet, mask them all. */
@@ -4129,16 +4126,13 @@ static int spi_nor_parse_sfdp(struct spi_nor *nor,
41294126 return err ;
41304127}
41314128
4132- static int spi_nor_init_params (struct spi_nor * nor ,
4133- struct spi_nor_flash_parameter * params )
4129+ static int spi_nor_init_params (struct spi_nor * nor )
41344130{
4131+ struct spi_nor_flash_parameter * params = & nor -> params ;
41354132 struct spi_nor_erase_map * map = & nor -> erase_map ;
41364133 const struct flash_info * info = nor -> info ;
41374134 u8 i , erase_mask ;
41384135
4139- /* Set legacy flash parameters as default. */
4140- memset (params , 0 , sizeof (* params ));
4141-
41424136 /* Set SPI NOR sizes. */
41434137 params -> size = (u64 )info -> sector_size * info -> n_sectors ;
41444138 params -> page_size = info -> page_size ;
@@ -4255,7 +4249,6 @@ static int spi_nor_init_params(struct spi_nor *nor,
42554249}
42564250
42574251static int spi_nor_select_read (struct spi_nor * nor ,
4258- const struct spi_nor_flash_parameter * params ,
42594252 u32 shared_hwcaps )
42604253{
42614254 int cmd , best_match = fls (shared_hwcaps & SNOR_HWCAPS_READ_MASK ) - 1 ;
@@ -4268,7 +4261,7 @@ static int spi_nor_select_read(struct spi_nor *nor,
42684261 if (cmd < 0 )
42694262 return - EINVAL ;
42704263
4271- read = & params -> reads [cmd ];
4264+ read = & nor -> params . reads [cmd ];
42724265 nor -> read_opcode = read -> opcode ;
42734266 nor -> read_proto = read -> proto ;
42744267
@@ -4287,7 +4280,6 @@ static int spi_nor_select_read(struct spi_nor *nor,
42874280}
42884281
42894282static int spi_nor_select_pp (struct spi_nor * nor ,
4290- const struct spi_nor_flash_parameter * params ,
42914283 u32 shared_hwcaps )
42924284{
42934285 int cmd , best_match = fls (shared_hwcaps & SNOR_HWCAPS_PP_MASK ) - 1 ;
@@ -4300,7 +4292,7 @@ static int spi_nor_select_pp(struct spi_nor *nor,
43004292 if (cmd < 0 )
43014293 return - EINVAL ;
43024294
4303- pp = & params -> page_programs [cmd ];
4295+ pp = & nor -> params . page_programs [cmd ];
43044296 nor -> program_opcode = pp -> opcode ;
43054297 nor -> write_proto = pp -> proto ;
43064298 return 0 ;
@@ -4407,9 +4399,9 @@ static int spi_nor_select_erase(struct spi_nor *nor, u32 wanted_size)
44074399}
44084400
44094401static int spi_nor_setup (struct spi_nor * nor ,
4410- const struct spi_nor_flash_parameter * params ,
44114402 const struct spi_nor_hwcaps * hwcaps )
44124403{
4404+ struct spi_nor_flash_parameter * params = & nor -> params ;
44134405 u32 ignored_mask , shared_mask ;
44144406 bool enable_quad_io ;
44154407 int err ;
@@ -4426,7 +4418,7 @@ static int spi_nor_setup(struct spi_nor *nor,
44264418 * need to discard some of them based on what the SPI
44274419 * controller actually supports (using spi_mem_supports_op()).
44284420 */
4429- spi_nor_spimem_adjust_hwcaps (nor , params , & shared_mask );
4421+ spi_nor_spimem_adjust_hwcaps (nor , & shared_mask );
44304422 } else {
44314423 /*
44324424 * SPI n-n-n protocols are not supported when the SPI
@@ -4442,15 +4434,15 @@ static int spi_nor_setup(struct spi_nor *nor,
44424434 }
44434435
44444436 /* Select the (Fast) Read command. */
4445- err = spi_nor_select_read (nor , params , shared_mask );
4437+ err = spi_nor_select_read (nor , shared_mask );
44464438 if (err ) {
44474439 dev_err (nor -> dev ,
44484440 "can't select read settings supported by both the SPI controller and memory.\n" );
44494441 return err ;
44504442 }
44514443
44524444 /* Select the Page Program command. */
4453- err = spi_nor_select_pp (nor , params , shared_mask );
4445+ err = spi_nor_select_pp (nor , shared_mask );
44544446 if (err ) {
44554447 dev_err (nor -> dev ,
44564448 "can't select write settings supported by both the SPI controller and memory.\n" );
@@ -4553,11 +4545,11 @@ static const struct flash_info *spi_nor_match_id(const char *name)
45534545int spi_nor_scan (struct spi_nor * nor , const char * name ,
45544546 const struct spi_nor_hwcaps * hwcaps )
45554547{
4556- struct spi_nor_flash_parameter params ;
45574548 const struct flash_info * info = NULL ;
45584549 struct device * dev = nor -> dev ;
45594550 struct mtd_info * mtd = & nor -> mtd ;
45604551 struct device_node * np = spi_nor_get_flash_node (nor );
4552+ struct spi_nor_flash_parameter * params = & nor -> params ;
45614553 int ret ;
45624554 int i ;
45634555
@@ -4639,7 +4631,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
46394631 nor -> clear_sr_bp = spi_nor_clear_sr_bp ;
46404632
46414633 /* Parse the Serial Flash Discoverable Parameters table. */
4642- ret = spi_nor_init_params (nor , & params );
4634+ ret = spi_nor_init_params (nor );
46434635 if (ret )
46444636 return ret ;
46454637
@@ -4649,7 +4641,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
46494641 mtd -> type = MTD_NORFLASH ;
46504642 mtd -> writesize = 1 ;
46514643 mtd -> flags = MTD_CAP_NORFLASH ;
4652- mtd -> size = params . size ;
4644+ mtd -> size = params -> size ;
46534645 mtd -> _erase = spi_nor_erase ;
46544646 mtd -> _read = spi_nor_read ;
46554647 mtd -> _resume = spi_nor_resume ;
@@ -4688,26 +4680,26 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
46884680 mtd -> flags |= MTD_NO_ERASE ;
46894681
46904682 mtd -> dev .parent = dev ;
4691- nor -> page_size = params . page_size ;
4683+ nor -> page_size = params -> page_size ;
46924684 mtd -> writebufsize = nor -> page_size ;
46934685
46944686 if (np ) {
46954687 /* If we were instantiated by DT, use it */
46964688 if (of_property_read_bool (np , "m25p,fast-read" ))
4697- params . hwcaps .mask |= SNOR_HWCAPS_READ_FAST ;
4689+ params -> hwcaps .mask |= SNOR_HWCAPS_READ_FAST ;
46984690 else
4699- params . hwcaps .mask &= ~SNOR_HWCAPS_READ_FAST ;
4691+ params -> hwcaps .mask &= ~SNOR_HWCAPS_READ_FAST ;
47004692 } else {
47014693 /* If we weren't instantiated by DT, default to fast-read */
4702- params . hwcaps .mask |= SNOR_HWCAPS_READ_FAST ;
4694+ params -> hwcaps .mask |= SNOR_HWCAPS_READ_FAST ;
47034695 }
47044696
47054697 if (of_property_read_bool (np , "broken-flash-reset" ))
47064698 nor -> flags |= SNOR_F_BROKEN_RESET ;
47074699
47084700 /* Some devices cannot do fast-read, no matter what DT tells us */
47094701 if (info -> flags & SPI_NOR_NO_FR )
4710- params . hwcaps .mask &= ~SNOR_HWCAPS_READ_FAST ;
4702+ params -> hwcaps .mask &= ~SNOR_HWCAPS_READ_FAST ;
47114703
47124704 /*
47134705 * Configure the SPI memory:
@@ -4716,7 +4708,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
47164708 * - set the SPI protocols for register and memory accesses.
47174709 * - set the Quad Enable bit if needed (required by SPI x-y-4 protos).
47184710 */
4719- ret = spi_nor_setup (nor , & params , hwcaps );
4711+ ret = spi_nor_setup (nor , hwcaps );
47204712 if (ret )
47214713 return ret ;
47224714
0 commit comments