@@ -768,6 +768,46 @@ int vc4_hvs_debugfs_init(struct drm_minor *minor)
768768 return 0 ;
769769}
770770
771+ struct vc4_hvs * __vc4_hvs_alloc (struct vc4_dev * vc4 , struct platform_device * pdev )
772+ {
773+ struct drm_device * drm = & vc4 -> base ;
774+ struct vc4_hvs * hvs ;
775+
776+ hvs = drmm_kzalloc (drm , sizeof (* hvs ), GFP_KERNEL );
777+ if (!hvs )
778+ return ERR_PTR (- ENOMEM );
779+
780+ hvs -> vc4 = vc4 ;
781+ hvs -> pdev = pdev ;
782+
783+ spin_lock_init (& hvs -> mm_lock );
784+
785+ /* Set up the HVS display list memory manager. We never
786+ * overwrite the setup from the bootloader (just 128b out of
787+ * our 16K), since we don't want to scramble the screen when
788+ * transitioning from the firmware's boot setup to runtime.
789+ */
790+ drm_mm_init (& hvs -> dlist_mm ,
791+ HVS_BOOTLOADER_DLIST_END ,
792+ (SCALER_DLIST_SIZE >> 2 ) - HVS_BOOTLOADER_DLIST_END );
793+
794+ /* Set up the HVS LBM memory manager. We could have some more
795+ * complicated data structure that allowed reuse of LBM areas
796+ * between planes when they don't overlap on the screen, but
797+ * for now we just allocate globally.
798+ */
799+ if (!vc4 -> is_vc5 )
800+ /* 48k words of 2x12-bit pixels */
801+ drm_mm_init (& hvs -> lbm_mm , 0 , 48 * 1024 );
802+ else
803+ /* 60k words of 4x12-bit pixels */
804+ drm_mm_init (& hvs -> lbm_mm , 0 , 60 * 1024 );
805+
806+ vc4 -> hvs = hvs ;
807+
808+ return hvs ;
809+ }
810+
771811static int vc4_hvs_bind (struct device * dev , struct device * master , void * data )
772812{
773813 struct platform_device * pdev = to_platform_device (dev );
@@ -778,11 +818,9 @@ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data)
778818 u32 dispctrl ;
779819 u32 reg ;
780820
781- hvs = drmm_kzalloc (drm , sizeof (* hvs ), GFP_KERNEL );
782- if (!hvs )
783- return - ENOMEM ;
784- hvs -> vc4 = vc4 ;
785- hvs -> pdev = pdev ;
821+ hvs = __vc4_hvs_alloc (vc4 , NULL );
822+ if (IS_ERR (hvs ))
823+ return PTR_ERR (hvs );
786824
787825 hvs -> regs = vc4_ioremap_regs (pdev , 0 );
788826 if (IS_ERR (hvs -> regs ))
@@ -835,29 +873,6 @@ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data)
835873 else
836874 hvs -> dlist = hvs -> regs + SCALER5_DLIST_START ;
837875
838- spin_lock_init (& hvs -> mm_lock );
839-
840- /* Set up the HVS display list memory manager. We never
841- * overwrite the setup from the bootloader (just 128b out of
842- * our 16K), since we don't want to scramble the screen when
843- * transitioning from the firmware's boot setup to runtime.
844- */
845- drm_mm_init (& hvs -> dlist_mm ,
846- HVS_BOOTLOADER_DLIST_END ,
847- (SCALER_DLIST_SIZE >> 2 ) - HVS_BOOTLOADER_DLIST_END );
848-
849- /* Set up the HVS LBM memory manager. We could have some more
850- * complicated data structure that allowed reuse of LBM areas
851- * between planes when they don't overlap on the screen, but
852- * for now we just allocate globally.
853- */
854- if (!vc4 -> is_vc5 )
855- /* 48k words of 2x12-bit pixels */
856- drm_mm_init (& hvs -> lbm_mm , 0 , 48 * 1024 );
857- else
858- /* 60k words of 4x12-bit pixels */
859- drm_mm_init (& hvs -> lbm_mm , 0 , 60 * 1024 );
860-
861876 /* Upload filter kernels. We only have the one for now, so we
862877 * keep it around for the lifetime of the driver.
863878 */
@@ -867,8 +882,6 @@ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data)
867882 if (ret )
868883 return ret ;
869884
870- vc4 -> hvs = hvs ;
871-
872885 reg = HVS_READ (SCALER_DISPECTRL );
873886 reg &= ~SCALER_DISPECTRL_DSP2_MUX_MASK ;
874887 HVS_WRITE (SCALER_DISPECTRL ,
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