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nbd168davem330
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net: ethernet: mtk_eth_soc: add support for Wireless Ethernet Dispatch (WED)
The Wireless Ethernet Dispatch subsystem on the MT7622 SoC can be configured to intercept and handle access to the DMA queues and PCIe interrupts for a MT7615/MT7915 wireless card. It can manage the internal WDMA (Wireless DMA) controller, which allows ethernet packets to be passed from the packet switch engine (PSE) to the wireless card, bypassing the CPU entirely. This can be used to implement hardware flow offloading from ethernet to WLAN. Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: David S. Miller <davem@davemloft.net>
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drivers/net/ethernet/mediatek/Kconfig

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@@ -7,6 +7,10 @@ config NET_VENDOR_MEDIATEK
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if NET_VENDOR_MEDIATEK
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config NET_MEDIATEK_SOC_WED
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depends on ARCH_MEDIATEK || COMPILE_TEST
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def_bool NET_MEDIATEK_SOC != n
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config NET_MEDIATEK_SOC
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tristate "MediaTek SoC Gigabit Ethernet support"
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depends on NET_DSA || !NET_DSA

drivers/net/ethernet/mediatek/Makefile

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@@ -5,4 +5,9 @@
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obj-$(CONFIG_NET_MEDIATEK_SOC) += mtk_eth.o
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mtk_eth-y := mtk_eth_soc.o mtk_sgmii.o mtk_eth_path.o mtk_ppe.o mtk_ppe_debugfs.o mtk_ppe_offload.o
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mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed.o
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ifdef CONFIG_DEBUG_FS
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mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed_debugfs.o
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endif
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obj-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed_ops.o
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obj-$(CONFIG_NET_MEDIATEK_STAR_EMAC) += mtk_star_emac.o

drivers/net/ethernet/mediatek/mtk_eth_soc.c

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@@ -24,6 +24,7 @@
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#include <net/dsa.h>
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#include "mtk_eth_soc.h"
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#include "mtk_wed.h"
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static int mtk_msg_level = -1;
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module_param_named(msg_level, mtk_msg_level, int, 0);
@@ -3170,6 +3171,22 @@ static int mtk_probe(struct platform_device *pdev)
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}
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}
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for (i = 0;; i++) {
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struct device_node *np = of_parse_phandle(pdev->dev.of_node,
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"mediatek,wed", i);
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static const u32 wdma_regs[] = {
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MTK_WDMA0_BASE,
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MTK_WDMA1_BASE
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};
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void __iomem *wdma;
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if (!np || i >= ARRAY_SIZE(wdma_regs))
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break;
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wdma = eth->base + wdma_regs[i];
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mtk_wed_add_hw(np, eth, wdma, i);
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}
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for (i = 0; i < 3; i++) {
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if (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_INT) && i > 0)
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eth->irq[i] = eth->irq[0];

drivers/net/ethernet/mediatek/mtk_eth_soc.h

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@@ -295,6 +295,9 @@
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#define MTK_GDM1_TX_GPCNT 0x2438
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#define MTK_STAT_OFFSET 0x40
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#define MTK_WDMA0_BASE 0x2800
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#define MTK_WDMA1_BASE 0x2c00
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/* QDMA descriptor txd4 */
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#define TX_DMA_CHKSUM (0x7 << 29)
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#define TX_DMA_TSO BIT(28)

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