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davem330davem330
committed
Merge branch 'hns3-next'
Huazhong Tan says: ==================== net: hns3: updates for -next There are some updates for the HNS3 ethernet driver. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2 parents 77d0cab + c155e22 commit aafe885

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11 files changed

+96
-38
lines changed

11 files changed

+96
-38
lines changed

‎drivers/net/ethernet/hisilicon/hns3/hnae3.h‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -42,8 +42,9 @@
4242
#define HNAE3_DEV_ID_50GE_RDMA 0xA224
4343
#define HNAE3_DEV_ID_50GE_RDMA_MACSEC 0xA225
4444
#define HNAE3_DEV_ID_100G_RDMA_MACSEC 0xA226
45-
#define HNAE3_DEV_ID_100G_VF 0xA22E
46-
#define HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF 0xA22F
45+
#define HNAE3_DEV_ID_200G_RDMA 0xA228
46+
#define HNAE3_DEV_ID_VF 0xA22E
47+
#define HNAE3_DEV_ID_RDMA_DCB_PFC_VF 0xA22F
4748

4849
#define HNAE3_CLASS_NAME_SIZE 16
4950

@@ -152,6 +153,7 @@ enum hnae3_hw_error_type {
152153
HNAE3_PPU_POISON_ERROR,
153154
HNAE3_CMDQ_ECC_ERROR,
154155
HNAE3_IMP_RD_POISON_ERROR,
156+
HNAE3_ROCEE_AXI_RESP_ERROR,
155157
};
156158

157159
enum hnae3_reset_type {

‎drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ static int hns3_dbg_queue_info(struct hnae3_handle *h,
1919
struct hns3_enet_ring *ring;
2020
u32 base_add_l, base_add_h;
2121
u32 queue_num, queue_max;
22-
u32 value, i = 0;
22+
u32 value, i;
2323
int cnt;
2424

2525
if (!priv->ring) {
@@ -264,6 +264,7 @@ static void hns3_dbg_help(struct hnae3_handle *h)
264264
dev_info(&h->pdev->dev, "dump qs shaper [qs id]\n");
265265
dev_info(&h->pdev->dev, "dump uc mac list <func id>\n");
266266
dev_info(&h->pdev->dev, "dump mc mac list <func id>\n");
267+
dev_info(&h->pdev->dev, "dump intr\n");
267268

268269
memset(printf_buf, 0, HNS3_DBG_BUF_LEN);
269270
strncat(printf_buf, "dump reg [[bios common] [ssu <port_id>]",

‎drivers/net/ethernet/hisilicon/hns3/hns3_enet.c‎

Lines changed: 11 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -81,8 +81,10 @@ static const struct pci_device_id hns3_pci_tbl[] = {
8181
HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
8282
{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),
8383
HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
84-
{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_VF), 0},
85-
{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF),
84+
{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_200G_RDMA),
85+
HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
86+
{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_VF), 0},
87+
{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_RDMA_DCB_PFC_VF),
8688
HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
8789
/* required last entry */
8890
{0, }
@@ -1254,7 +1256,7 @@ static bool hns3_skb_need_linearized(struct sk_buff *skb, unsigned int *bd_size,
12541256

12551257
void hns3_shinfo_pack(struct skb_shared_info *shinfo, __u32 *size)
12561258
{
1257-
int i = 0;
1259+
int i;
12581260

12591261
for (i = 0; i < MAX_SKB_FRAGS; i++)
12601262
size[i] = skb_frag_size(&shinfo->frags[i]);
@@ -2044,9 +2046,10 @@ bool hns3_is_phys_func(struct pci_dev *pdev)
20442046
case HNAE3_DEV_ID_50GE_RDMA:
20452047
case HNAE3_DEV_ID_50GE_RDMA_MACSEC:
20462048
case HNAE3_DEV_ID_100G_RDMA_MACSEC:
2049+
case HNAE3_DEV_ID_200G_RDMA:
20472050
return true;
2048-
case HNAE3_DEV_ID_100G_VF:
2049-
case HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF:
2051+
case HNAE3_DEV_ID_VF:
2052+
case HNAE3_DEV_ID_RDMA_DCB_PFC_VF:
20502053
return false;
20512054
default:
20522055
dev_warn(&pdev->dev, "un-recognized pci device-id %u",
@@ -3511,7 +3514,7 @@ static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
35113514
struct hnae3_ring_chain_node vector_ring_chain;
35123515
struct hnae3_handle *h = priv->ae_handle;
35133516
struct hns3_enet_tqp_vector *tqp_vector;
3514-
int ret = 0;
3517+
int ret;
35153518
int i;
35163519

35173520
hns3_nic_set_cpumask(priv);
@@ -4600,6 +4603,8 @@ static const struct hns3_hw_error_info hns3_hw_err[] = {
46004603
.msg = "IMP CMDQ error" },
46014604
{ .type = HNAE3_IMP_RD_POISON_ERROR,
46024605
.msg = "IMP RD poison" },
4606+
{ .type = HNAE3_ROCEE_AXI_RESP_ERROR,
4607+
.msg = "ROCEE AXI RESP error" },
46034608
};
46044609

46054610
static void hns3_process_hw_error(struct hnae3_handle *handle,

‎drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -261,7 +261,7 @@ int hclge_cmd_send(struct hclge_hw *hw, struct hclge_desc *desc, int num)
261261
bool complete = false;
262262
u32 timeout = 0;
263263
int handle = 0;
264-
int retval = 0;
264+
int retval;
265265
int ntc;
266266

267267
spin_lock_bh(&hw->cmq.csq.lock);

‎drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -491,6 +491,8 @@ struct hclge_pf_res_cmd {
491491
#define HCLGE_CFG_RSS_SIZE_M GENMASK(31, 24)
492492
#define HCLGE_CFG_SPEED_ABILITY_S 0
493493
#define HCLGE_CFG_SPEED_ABILITY_M GENMASK(7, 0)
494+
#define HCLGE_CFG_SPEED_ABILITY_EXT_S 10
495+
#define HCLGE_CFG_SPEED_ABILITY_EXT_M GENMASK(15, 10)
494496
#define HCLGE_CFG_UMV_TBL_SPACE_S 16
495497
#define HCLGE_CFG_UMV_TBL_SPACE_M GENMASK(31, 16)
496498

‎drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c‎

Lines changed: 17 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -428,17 +428,13 @@ static void hclge_dbg_dump_reg_cmd(struct hclge_dev *hdev, const char *cmd_buf)
428428
}
429429
}
430430

431-
static void hclge_title_idx_print(struct hclge_dev *hdev, bool flag, int index,
432-
char *title_buf, char *true_buf,
433-
char *false_buf)
431+
static void hclge_print_tc_info(struct hclge_dev *hdev, bool flag, int index)
434432
{
435433
if (flag)
436-
dev_info(&hdev->pdev->dev, "%s(%d): %s weight: %u\n",
437-
title_buf, index, true_buf,
438-
hdev->tm_info.pg_info[0].tc_dwrr[index]);
434+
dev_info(&hdev->pdev->dev, "tc(%d): no sp mode weight: %u\n",
435+
index, hdev->tm_info.pg_info[0].tc_dwrr[index]);
439436
else
440-
dev_info(&hdev->pdev->dev, "%s(%d): %s\n", title_buf, index,
441-
false_buf);
437+
dev_info(&hdev->pdev->dev, "tc(%d): sp mode\n", index);
442438
}
443439

444440
static void hclge_dbg_dump_tc(struct hclge_dev *hdev)
@@ -469,8 +465,7 @@ static void hclge_dbg_dump_tc(struct hclge_dev *hdev)
469465
ets_weight->weight_offset);
470466

471467
for (i = 0; i < HNAE3_MAX_TC; i++)
472-
hclge_title_idx_print(hdev, ets_weight->tc_weight[i], i,
473-
"tc", "no sp mode", "sp mode");
468+
hclge_print_tc_info(hdev, ets_weight->tc_weight[i], i);
474469
}
475470

476471
static void hclge_dbg_dump_tm_pg(struct hclge_dev *hdev)
@@ -1170,6 +1165,14 @@ static void hclge_dbg_dump_serv_info(struct hclge_dev *hdev)
11701165
hdev->serv_processed_cnt);
11711166
}
11721167

1168+
static void hclge_dbg_dump_interrupt(struct hclge_dev *hdev)
1169+
{
1170+
dev_info(&hdev->pdev->dev, "num_nic_msi: %u\n", hdev->num_nic_msi);
1171+
dev_info(&hdev->pdev->dev, "num_roce_msi: %u\n", hdev->num_roce_msi);
1172+
dev_info(&hdev->pdev->dev, "num_msi_used: %u\n", hdev->num_msi_used);
1173+
dev_info(&hdev->pdev->dev, "num_msi_left: %u\n", hdev->num_msi_left);
1174+
}
1175+
11731176
static void hclge_dbg_get_m7_stats_info(struct hclge_dev *hdev)
11741177
{
11751178
struct hclge_desc *desc_src, *desc_tmp;
@@ -1494,6 +1497,7 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf)
14941497
#define DUMP_REG "dump reg"
14951498
#define DUMP_TM_MAP "dump tm map"
14961499
#define DUMP_LOOPBACK "dump loopback"
1500+
#define DUMP_INTERRUPT "dump intr"
14971501

14981502
struct hclge_vport *vport = hclge_get_vport(handle);
14991503
struct hclge_dev *hdev = vport->back;
@@ -1541,6 +1545,9 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf)
15411545
hclge_dbg_dump_mac_list(hdev,
15421546
&cmd_buf[sizeof("dump mc mac list")],
15431547
false);
1548+
} else if (strncmp(cmd_buf, DUMP_INTERRUPT,
1549+
strlen(DUMP_INTERRUPT)) == 0) {
1550+
hclge_dbg_dump_interrupt(hdev);
15441551
} else {
15451552
dev_info(&hdev->pdev->dev, "unknown command\n");
15461553
return -EINVAL;

‎drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1507,6 +1507,8 @@ hclge_log_and_clear_rocee_ras_error(struct hclge_dev *hdev)
15071507

15081508
reset_type = HNAE3_FUNC_RESET;
15091509

1510+
hclge_report_hw_error(hdev, HNAE3_ROCEE_AXI_RESP_ERROR);
1511+
15101512
ret = hclge_log_rocee_axi_error(hdev);
15111513
if (ret)
15121514
return HNAE3_GLOBAL_RESET;

‎drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c‎

Lines changed: 48 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -84,6 +84,7 @@ static const struct pci_device_id ae_algo_pci_tbl[] = {
8484
{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA), 0},
8585
{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC), 0},
8686
{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC), 0},
87+
{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_200G_RDMA), 0},
8788
/* required last entry */
8889
{0, }
8990
};
@@ -622,7 +623,7 @@ static u8 *hclge_tqps_get_strings(struct hnae3_handle *handle, u8 *data)
622623
{
623624
struct hnae3_knic_private_info *kinfo = &handle->kinfo;
624625
u8 *buff = data;
625-
int i = 0;
626+
int i;
626627

627628
for (i = 0; i < kinfo->num_tqps; i++) {
628629
struct hclge_tqp *tqp = container_of(handle->kinfo.tqp[i],
@@ -965,6 +966,9 @@ static int hclge_parse_speed(int speed_cmd, int *speed)
965966
case 5:
966967
*speed = HCLGE_MAC_SPEED_100G;
967968
break;
969+
case 8:
970+
*speed = HCLGE_MAC_SPEED_200G;
971+
break;
968972
default:
969973
return -EINVAL;
970974
}
@@ -1004,6 +1008,9 @@ static int hclge_check_port_speed(struct hnae3_handle *handle, u32 speed)
10041008
case HCLGE_MAC_SPEED_100G:
10051009
speed_bit = HCLGE_SUPPORT_100G_BIT;
10061010
break;
1011+
case HCLGE_MAC_SPEED_200G:
1012+
speed_bit = HCLGE_SUPPORT_200G_BIT;
1013+
break;
10071014
default:
10081015
return -EINVAL;
10091016
}
@@ -1014,7 +1021,7 @@ static int hclge_check_port_speed(struct hnae3_handle *handle, u32 speed)
10141021
return -EINVAL;
10151022
}
10161023

1017-
static void hclge_convert_setting_sr(struct hclge_mac *mac, u8 speed_ability)
1024+
static void hclge_convert_setting_sr(struct hclge_mac *mac, u16 speed_ability)
10181025
{
10191026
if (speed_ability & HCLGE_SUPPORT_10G_BIT)
10201027
linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,
@@ -1031,9 +1038,12 @@ static void hclge_convert_setting_sr(struct hclge_mac *mac, u8 speed_ability)
10311038
if (speed_ability & HCLGE_SUPPORT_100G_BIT)
10321039
linkmode_set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
10331040
mac->supported);
1041+
if (speed_ability & HCLGE_SUPPORT_200G_BIT)
1042+
linkmode_set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT,
1043+
mac->supported);
10341044
}
10351045

1036-
static void hclge_convert_setting_lr(struct hclge_mac *mac, u8 speed_ability)
1046+
static void hclge_convert_setting_lr(struct hclge_mac *mac, u16 speed_ability)
10371047
{
10381048
if (speed_ability & HCLGE_SUPPORT_10G_BIT)
10391049
linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT,
@@ -1050,9 +1060,13 @@ static void hclge_convert_setting_lr(struct hclge_mac *mac, u8 speed_ability)
10501060
if (speed_ability & HCLGE_SUPPORT_100G_BIT)
10511061
linkmode_set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
10521062
mac->supported);
1063+
if (speed_ability & HCLGE_SUPPORT_200G_BIT)
1064+
linkmode_set_bit(
1065+
ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
1066+
mac->supported);
10531067
}
10541068

1055-
static void hclge_convert_setting_cr(struct hclge_mac *mac, u8 speed_ability)
1069+
static void hclge_convert_setting_cr(struct hclge_mac *mac, u16 speed_ability)
10561070
{
10571071
if (speed_ability & HCLGE_SUPPORT_10G_BIT)
10581072
linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT,
@@ -1069,9 +1083,12 @@ static void hclge_convert_setting_cr(struct hclge_mac *mac, u8 speed_ability)
10691083
if (speed_ability & HCLGE_SUPPORT_100G_BIT)
10701084
linkmode_set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
10711085
mac->supported);
1086+
if (speed_ability & HCLGE_SUPPORT_200G_BIT)
1087+
linkmode_set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT,
1088+
mac->supported);
10721089
}
10731090

1074-
static void hclge_convert_setting_kr(struct hclge_mac *mac, u8 speed_ability)
1091+
static void hclge_convert_setting_kr(struct hclge_mac *mac, u16 speed_ability)
10751092
{
10761093
if (speed_ability & HCLGE_SUPPORT_1G_BIT)
10771094
linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
@@ -1091,6 +1108,9 @@ static void hclge_convert_setting_kr(struct hclge_mac *mac, u8 speed_ability)
10911108
if (speed_ability & HCLGE_SUPPORT_100G_BIT)
10921109
linkmode_set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
10931110
mac->supported);
1111+
if (speed_ability & HCLGE_SUPPORT_200G_BIT)
1112+
linkmode_set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT,
1113+
mac->supported);
10941114
}
10951115

10961116
static void hclge_convert_setting_fec(struct hclge_mac *mac)
@@ -1115,6 +1135,7 @@ static void hclge_convert_setting_fec(struct hclge_mac *mac)
11151135
BIT(HNAE3_FEC_AUTO);
11161136
break;
11171137
case HCLGE_MAC_SPEED_100G:
1138+
case HCLGE_MAC_SPEED_200G:
11181139
linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, mac->supported);
11191140
mac->fec_ability = BIT(HNAE3_FEC_RS) | BIT(HNAE3_FEC_AUTO);
11201141
break;
@@ -1125,7 +1146,7 @@ static void hclge_convert_setting_fec(struct hclge_mac *mac)
11251146
}
11261147

11271148
static void hclge_parse_fiber_link_mode(struct hclge_dev *hdev,
1128-
u8 speed_ability)
1149+
u16 speed_ability)
11291150
{
11301151
struct hclge_mac *mac = &hdev->hw.mac;
11311152

@@ -1145,7 +1166,7 @@ static void hclge_parse_fiber_link_mode(struct hclge_dev *hdev,
11451166
}
11461167

11471168
static void hclge_parse_backplane_link_mode(struct hclge_dev *hdev,
1148-
u8 speed_ability)
1169+
u16 speed_ability)
11491170
{
11501171
struct hclge_mac *mac = &hdev->hw.mac;
11511172

@@ -1158,7 +1179,7 @@ static void hclge_parse_backplane_link_mode(struct hclge_dev *hdev,
11581179
}
11591180

11601181
static void hclge_parse_copper_link_mode(struct hclge_dev *hdev,
1161-
u8 speed_ability)
1182+
u16 speed_ability)
11621183
{
11631184
unsigned long *supported = hdev->hw.mac.supported;
11641185

@@ -1188,7 +1209,7 @@ static void hclge_parse_copper_link_mode(struct hclge_dev *hdev,
11881209
linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, supported);
11891210
}
11901211

1191-
static void hclge_parse_link_mode(struct hclge_dev *hdev, u8 speed_ability)
1212+
static void hclge_parse_link_mode(struct hclge_dev *hdev, u16 speed_ability)
11921213
{
11931214
u8 media_type = hdev->hw.mac.media_type;
11941215

@@ -1200,8 +1221,11 @@ static void hclge_parse_link_mode(struct hclge_dev *hdev, u8 speed_ability)
12001221
hclge_parse_backplane_link_mode(hdev, speed_ability);
12011222
}
12021223

1203-
static u32 hclge_get_max_speed(u8 speed_ability)
1224+
static u32 hclge_get_max_speed(u16 speed_ability)
12041225
{
1226+
if (speed_ability & HCLGE_SUPPORT_200G_BIT)
1227+
return HCLGE_MAC_SPEED_200G;
1228+
12051229
if (speed_ability & HCLGE_SUPPORT_100G_BIT)
12061230
return HCLGE_MAC_SPEED_100G;
12071231

@@ -1231,8 +1255,11 @@ static u32 hclge_get_max_speed(u8 speed_ability)
12311255

12321256
static void hclge_parse_cfg(struct hclge_cfg *cfg, struct hclge_desc *desc)
12331257
{
1258+
#define SPEED_ABILITY_EXT_SHIFT 8
1259+
12341260
struct hclge_cfg_param_cmd *req;
12351261
u64 mac_addr_tmp_high;
1262+
u16 speed_ability_ext;
12361263
u64 mac_addr_tmp;
12371264
unsigned int i;
12381265

@@ -1281,6 +1308,11 @@ static void hclge_parse_cfg(struct hclge_cfg *cfg, struct hclge_desc *desc)
12811308
cfg->speed_ability = hnae3_get_field(__le32_to_cpu(req->param[1]),
12821309
HCLGE_CFG_SPEED_ABILITY_M,
12831310
HCLGE_CFG_SPEED_ABILITY_S);
1311+
speed_ability_ext = hnae3_get_field(__le32_to_cpu(req->param[1]),
1312+
HCLGE_CFG_SPEED_ABILITY_EXT_M,
1313+
HCLGE_CFG_SPEED_ABILITY_EXT_S);
1314+
cfg->speed_ability |= speed_ability_ext << SPEED_ABILITY_EXT_SHIFT;
1315+
12841316
cfg->umv_space = hnae3_get_field(__le32_to_cpu(req->param[1]),
12851317
HCLGE_CFG_UMV_TBL_SPACE_M,
12861318
HCLGE_CFG_UMV_TBL_SPACE_S);
@@ -2422,6 +2454,10 @@ static int hclge_cfg_mac_speed_dup_hw(struct hclge_dev *hdev, int speed,
24222454
hnae3_set_field(req->speed_dup, HCLGE_CFG_SPEED_M,
24232455
HCLGE_CFG_SPEED_S, 5);
24242456
break;
2457+
case HCLGE_MAC_SPEED_200G:
2458+
hnae3_set_field(req->speed_dup, HCLGE_CFG_SPEED_M,
2459+
HCLGE_CFG_SPEED_S, 8);
2460+
break;
24252461
default:
24262462
dev_err(&hdev->pdev->dev, "invalid speed (%d)\n", speed);
24272463
return -EINVAL;
@@ -3211,7 +3247,7 @@ static int hclge_notify_roce_client(struct hclge_dev *hdev,
32113247
enum hnae3_reset_notify_type type)
32123248
{
32133249
struct hnae3_client *client = hdev->roce_client;
3214-
int ret = 0;
3250+
int ret;
32153251
u16 i;
32163252

32173253
if (!test_bit(HCLGE_STATE_ROCE_REGISTERED, &hdev->state) || !client)
@@ -11093,7 +11129,7 @@ static void hclge_sync_promisc_mode(struct hclge_dev *hdev)
1109311129
{
1109411130
struct hclge_vport *vport = &hdev->vport[0];
1109511131
struct hnae3_handle *handle = &vport->nic;
11096-
u8 tmp_flags = 0;
11132+
u8 tmp_flags;
1109711133
int ret;
1109811134

1109911135
if (vport->last_promisc_flags != vport->overflow_promisc_flags) {

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