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commit 099c95466b9df2595706f74f023be9682287e899 1 parent 0c173ec
@danielrichman danielrichman authored
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2  misc/oneshot
@@ -3,5 +3,5 @@
set -e
set -x
-arm-none-eabi-gcc -o dormouse.elf -O2 -g -Wall -Wextra -Werror -fno-common -mthumb -mcpu=cortex-m3 -msoft-float -MD -DSTM32F1 -DSTM32F10X_XL test.c -lopencm3_stm32f1 --static -Wl,--start-group -lc -lgcc -lnosys -Wl,--end-group -Tsrc/dormouse.ld -nostartfiles -Wl,--gc-sections -mthumb -mcpu=cortex-m3 -msoft-float -mfix-cortex-m3-ldrd -Wl,-Map,dormouse.map
+arm-none-eabi-gcc -o dormouse.elf -DCM3_ASSERT_VERBOSE -g -Wall -Wextra -Werror -fno-common -mthumb -mcpu=cortex-m3 -msoft-float -MD -DSTM32F1 -DSTM32F10X_XL test.c -lopencm3_stm32f1 --static -Wl,--start-group -lc -lgcc -lnosys -Wl,--end-group -Tsrc/dormouse.ld -nostartfiles -Wl,--gc-sections -mthumb -mcpu=cortex-m3 -msoft-float -mfix-cortex-m3-ldrd -Wl,-Map,dormouse.map
arm-none-eabi-objcopy -Obinary dormouse.elf dormouse.bin
View
2  sd_lib/sdio_glue.h
@@ -21,7 +21,7 @@ uint8_t GPIO_ReadInputDataBit(uint32_t a, uint32_t b);
/* Used to configure the SDIO peripheral */
#define SDIO_INIT_CLK_DIV 178 /* 72/(178+2) = 0.4MHz (the maximum) */
-#define SDIO_TRANSFER_CLK_DIV 0 /* max speed: 72/(0+2) = 18 MHz */
+#define SDIO_TRANSFER_CLK_DIV 64 /* max speed: 72/(0+2) = 18 MHz */
/* Call setup and teardown routines */
void SD_LowLevel_Init(void);
View
18 sd_lib/sdio_glue_ocm3.c
@@ -12,6 +12,7 @@
void sd_hw_setup()
{
+#ifdef SD_DMA_MODE
dma_set_peripheral_address(DMA2, DMA_CHANNEL1, (uint32_t) 0x40005410);
dma_enable_memory_increment_mode(DMA2, DMA_CHANNEL1);
dma_set_peripheral_size(DMA2, DMA_CHANNEL1, DMA_CCR_PSIZE_32BIT);
@@ -19,6 +20,7 @@ void sd_hw_setup()
dma_set_priority(DMA2, DMA_CHANNEL1, DMA_CCR_PL_HIGH);
nvic_enable_irq(NVIC_SDIO_IRQ);
+#endif
}
uint8_t GPIO_ReadInputDataBit(uint32_t a, uint32_t b)
@@ -55,26 +57,42 @@ void SD_LowLevel_Init(void)
void SD_LowLevel_DMA_TxConfig(uint32_t *BufferSRC, uint32_t BufferSize)
{
+#ifdef SD_DMA_MODE
dma_disable_channel(DMA2, DMA_CHANNEL1);
dma_clear_interrupt_flags(DMA2, DMA_CHANNEL1, 0xf);
dma_set_read_from_memory(DMA2, DMA_CHANNEL1);
dma_set_memory_address(DMA2, DMA_CHANNEL1, (uint32_t) BufferSRC);
dma_set_number_of_data(DMA2, DMA_CHANNEL1, BufferSize / 4);
dma_enable_channel(DMA2, DMA_CHANNEL1);
+#else
+ BufferSRC = BufferSRC;
+ BufferSize = BufferSize;
+#endif
}
void SD_LowLevel_DMA_RxConfig(uint32_t *BufferDST, uint32_t BufferSize)
{
+#ifdef SD_DMA_MODE
+ dma_channel_reset(DMA2, DMA_CHANNEL1);
dma_disable_channel(DMA2, DMA_CHANNEL1);
+
dma_clear_interrupt_flags(DMA2, DMA_CHANNEL1, 0xf);
dma_set_read_from_peripheral(DMA2, DMA_CHANNEL1);
dma_set_memory_address(DMA2, DMA_CHANNEL1, (uint32_t) BufferDST);
dma_set_number_of_data(DMA2, DMA_CHANNEL1, BufferSize / 4);
dma_enable_channel(DMA2, DMA_CHANNEL1);
+#else
+ BufferDST = BufferDST;
+ BufferSize = BufferSize;
+#endif
}
uint32_t SD_DMAEndOfTransferStatus(void)
{
+#ifdef SD_DMA_MODE
/* TODO No error checking :-( ? */
return dma_get_interrupt_flag(DMA2, DMA_CHANNEL1, DMA_TCIF);
+#else
+ return 1;
+#endif
}
View
3  sd_lib/sdio_glue_stm32.c
@@ -43,14 +43,17 @@ int sd_read(uint32_t address, char *buf, uint16_t size)
SD_Error status = SD_OK;
SDTransferState transfer_state = SD_TRANSFER_BUSY;
+ debug("SD_ReadBlock()\n");
status = SD_ReadBlock((uint8_t *) buf, address, size);
if (status != SD_OK)
goto bail;
+ debug("SD_WaitReadOperation()\n");
status = SD_WaitReadOperation();
if (status != SD_OK)
goto bail;
+ debug("wait for SD_GetStatus() == SD_TRANSFER_OK\n");
while (transfer_state != SD_TRANSFER_OK)
transfer_state = SD_GetStatus();
View
17 src/accel_lowg.c
@@ -55,19 +55,21 @@ void accel_lowg_init()
spi_enable_ss_output(SPI1);
spi_enable(SPI1);
- dma_set_peripheral_address(DMA1, DMA_CHANNEL1, SPI1_DR);
+ dma_set_peripheral_address(DMA1, DMA_CHANNEL1, (uint32_t) &SPI1_DR);
dma_set_read_from_memory(DMA1, DMA_CHANNEL1);
dma_enable_memory_increment_mode(DMA1, DMA_CHANNEL1);
dma_set_peripheral_size(DMA1, DMA_CHANNEL1, DMA_CCR_PSIZE_8BIT);
dma_set_memory_size(DMA1, DMA_CHANNEL1, DMA_CCR_MSIZE_8BIT);
dma_set_priority(DMA1, DMA_CHANNEL1, DMA_CCR_PL_HIGH);
- dma_set_peripheral_address(DMA1, DMA_CHANNEL2, SPI1_DR);
+ dma_set_peripheral_address(DMA1, DMA_CHANNEL2, (uint32_t) &SPI1_DR);
dma_set_read_from_peripheral(DMA1, DMA_CHANNEL2);
dma_enable_memory_increment_mode(DMA1, DMA_CHANNEL2);
dma_set_peripheral_size(DMA1, DMA_CHANNEL2, DMA_CCR_PSIZE_8BIT);
dma_set_memory_size(DMA1, DMA_CHANNEL2, DMA_CCR_MSIZE_8BIT);
dma_set_priority(DMA1, DMA_CHANNEL2, DMA_CCR_PL_HIGH);
+
+ dma_enable_transfer_complete_interrupt(DMA1, DMA_CHANNEL1);
dma_enable_transfer_complete_interrupt(DMA1, DMA_CHANNEL2);
timer_reset(TIM3);
@@ -106,9 +108,9 @@ void accel_lowg_go()
void tim3_isr()
{
- timer_clear_flag(TIM3, TIM_SR_UIF);
+ debug("tim3 isr. read_state = %i\n", read_state);
- gpio_toggle(GPIOA, GPIO4);
+ timer_clear_flag(TIM3, TIM_SR_UIF);
cm3_assert(read_state == ALG_RS_IDLE);
assert_idle();
@@ -129,6 +131,8 @@ void spi1_isr()
fifo_count = (spi_read(SPI1) & ((1 << 6) - 1));
spi_enable_rx_buffer_not_empty_interrupt(SPI1);
+ debug("fifo_count = %i\n", fifo_count);
+
if (fifo_count == 0)
{
read_state = ALG_RS_IDLE;
@@ -152,6 +156,11 @@ void spi1_isr()
}
}
+void dma1_channel1_isr()
+{
+ debug("channel 1 completed\n");
+}
+
void dma1_channel2_isr()
{
debug("dma1_channel2 isr. read_state = %i\n", read_state);
View
13 src/buffer.c
@@ -186,8 +186,17 @@ static void list_push_tail(struct buffer_list *list,
{
cm3_assert((*item)->next == NULL);
- list->tail->next = *item;
- list->tail = *item;
+ if (list->tail != NULL)
+ {
+ list->tail->next = *item;
+ list->tail = *item;
+ }
+ else
+ {
+ cm3_assert(list->head == NULL);
+ cm3_assert(list->length == 0);
+ list->head = list->tail = *item;
+ }
*item = NULL;
View
2  src/debug.c
@@ -6,8 +6,6 @@
#include <libopencm3/stm32/gpio.h>
#include <libopencm3/stm32/usart.h>
-#include "buffer.h"
-#include "leds.h"
#include "memory.h"
char debug_buf[512];
View
41 src/main.c
@@ -11,6 +11,12 @@
#include <libopencm3/cm3/assert.h>
+#include <libopencm3/stm32/f1/rcc.h>
+#include <libopencm3/stm32/f1/flash.h>
+#include <libopencm3/stm32/f1/gpio.h>
+#include <libopencm3/stm32/f1/dma.h>
+#include <libopencm3/stm32/usart.h>
+
/* sd: DMA2:1, SDIO, GPIOC, GPIOD
* leds: TIM2, GPIOA, GPIOB, GPIOC
* accel_lowg: GPIOA, DMA1:1, DMA1:2, SPI1, TIM3
@@ -30,6 +36,8 @@
/* TODO: check dma error flags! */
+void blah();
+
int main()
{
rcc_clock_setup_in_hse_8mhz_out_72mhz();
@@ -57,23 +65,26 @@ int main()
debug_send("buffer_init()\n");
buffer_init();
+
+ blah(); blah(); blah();
+
debug_send("leds_init()\n");
leds_init();
debug_send("general_status_init()\n");
general_status_init();
- debug_send("accel_lowg_init()\n");
- accel_lowg_init();
- debug_send("baro_init()\n");
- baro_init();
+// debug_send("accel_lowg_init()\n");
+// accel_lowg_init();
+// debug_send("baro_init()\n");
+// baro_init();
debug_send("accel_highg_init()\n");
accel_highg_init();
debug_send("starting\n");
- debug_send("accel_lowg_go()\n");
- accel_lowg_go();
- debug_send("baro_go()\n");
- baro_go();
+// debug_send("accel_lowg_go()\n");
+// accel_lowg_go();
+// debug_send("baro_go()\n");
+// baro_go();
debug_send("accel_highg_go()\n");
accel_highg_go();
@@ -82,3 +93,17 @@ int main()
sd_main();
return 0;
}
+
+void blah()
+{
+ struct buffer_list_item *buffer;
+ debug("allocate\n");
+ buffer_alloc(&buffer);
+ debug("copy\n");
+ strcpy(buffer->buf, "Hello World");
+ debug("write\n");
+ buffer_queue(&buffer);
+
+ debug("Enqueued hello world\n");
+}
+
View
2  src/sd.c
@@ -133,7 +133,9 @@ static int is_block_used(uint32_t address, int *is_used)
int status;
/* Is this block used? First header byte will be nonzero */
+ debug("sd_read: %li\n", address);
status = sd_read(address, buf, sd_block_size);
+ if (status == 2) { *is_used = 0; return 0; }
if (status != 0) return status;
*is_used = (buf[0] != 0);
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