EEsim is a circuit simulator based on ngspice and it runs inside the browser using WebAssembly technology. The input is spice based netlist, and the output is results of the analysis that you're doing in the simulations. You are able to plot and view the results directly in the browser using high-performance WebGL plotting library webgl-plot, or download the data in CSV format for further analysis. Notice that your netlist and results are processed locally and always remain inside your browser and are never uploaded to network. The focus of this implementation is rapid analysis, sharing circuits ideas and results in VLSI and chip-design communities.
Copy and paste this circuit into editor and click Run. Input is also compatible with ngspice netlist.
Basic RCL circuit
Basic RLC circuit .include modelcard.CMOS90 r vdd 2 100.0 l vdd 2 1 c vdd 2 0.01 m1 2 1 0 0 N90 W=100.0u L=0.09u vdd vdd 0 1.8 vin 1 0 0 pulse (0 1.8 0 0.1 0.1 15 30) .tran 0.1 50 .end
Use your mouse to pan & zoom on the plot. left click for area zoom and right click hold and drag for pan. To reset the view double click.
To learn more about SPICE netlits refer to ngspice manual
See Transistor Models for more information.
Thanks to Konstantinos Bantounos for testing.