ECE 337 Bitcoin Miner
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amm_master_qsys_with_pcie
ip/Master_Template
mem_manager
output_files
sha
sha_output
software
timer_controller
.gitignore
BitcoinMiner-Hold- 'clock_50_1'.rpt
BitcoinMiner-Minimum Pulse Width- 'clock_50_1'.rpt
BitcoinMiner-Minimum Pulse Width- 'pcie_ref_clk'.rpt
BitcoinMiner-Recovery- 'clock_50_1'.rpt
BitcoinMiner-Removal- 'clock_50_1'.rpt
BitcoinMiner-Setup- 'clock_50_1'.rpt
BitcoinMiner-Summary.rpt
BitcoinMiner.qpf
BitcoinMiner.qsf
BitcoinMiner.sdc
BitcoinMiner.sv
BitcoinMiner_nativelink_simulation.rpt
EP4CGX150DF31.qsf
README.md
SEG_HEX.v
amm_master_qsys_with_pcie.qsys
amm_master_qsys_with_pcie.sopcinfo

README.md

BitcoinMinerFPGA

ECE 337 Bitcoin Miner

To Do:

  • Finish SHA block
  • Finish Mem Manager
  • Figure out FPGA
  • Presentation

How SHA cycle works:

- counts = 0 1 2 3 ... 30 31 32 33 34 35 .. 60 61 62 63 
- if count == 0 : 
  clk -> load data, count = 1 ; 1 sha cycle will be done
- if count == 1 : 
  clk -> count= 2 ; 2 sha cycle
- if count == 31 : 
  clk -> count= 32; 32 shacycles
- if count == 32 : 
  clk ->load data, count = 33 ; 1 sha cycle
- if count == 63 : 
  clk -> count = 0; 32 sha cycle