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  1. FPGA Design Suite based on C to Verilog design flow.

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  2. synthesiseable ieee 754 floating point library in verilog

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  3. FPGA based transmitter

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  4. Mathematical Functions in Verilog

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  5. Software Defined Radio in FPGA uses LVDS IO pins as 1-bit ADC

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  6. Chips 2.0 Demo for Atlys Spartan 6 development platform. Web app using C to Verilog TCP/IP server.

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24 contributions in the last year

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November 2020

dawsonjon has no activity yet for this period.

October 2020

Created 1 repository

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