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FPGA Design Suite based on C to Verilog design flow.
synthesiseable ieee 754 floating point library in verilog
FPGA based transmitter
Software Defined Radio in FPGA uses LVDS IO pins as 1-bit ADC
Mathematical Functions in Verilog
Chips 2.0 Demo for Atlys Spartan 6 development platform. Web app using C to Verilog TCP/IP server.