provide some thoughts on DCPU-16 architecture
- utility routine to disassemble one instruction
- emulator disassembles the current instruction in state dump
- assembler includes disassembly in the output
readme: mention the assembler
dcpu: only set O when the spec says to set it
Thank you, a1k0n on Hacker News for pointing out this bug.
a16: cleanup and bugfixes
- don't use a second word for literal arguments 0x00-0x1f
- allow the [imm + reg] form as well as [imm, reg]
- disallow [reg,imm] or [reg+imm] forms for the time being
- return example.s to original syntax
a16: add jsr support, bugfixes, assemble example from dcpu16 spec
readme: some words of explanation
update license banners with the 2-clause BSD license
a16: add support for labels and the "word" pseudo-op
dcpu: load image from commandline (or out.hex if none), not stdin
a16: an assmbler for the DCPU-16
Work in progress. Support for labels is the next todo.
notch says initial state for all registers is zero
dcpu: correctly initialize SP to 0xFFFF
test.hex - make "crash" an illegal opcode instead of infinite loop
- program load, tracing, test binary (from spec)
It compiles but is otherwise untested.