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Commits on Jan 23, 2017
  1. Merge pull request #5 from cvtsi2sd/master

    Fix undefined behavior in random_genXX helpers
    asterix24 committed on GitHub Jan 23, 2017
  2. Fix undefined behavior in random_genXX helpers

    random_gen16 and random_gen32 always passed an uint8_t to random_gen,
    while specifying 2/4 bytes of length; this led to potential stack
    damage and/or to reduced entropy in the result (only the last byte of
    randomness was kept)
    cvtsi2sd committed Jan 23, 2017
Commits on Jul 29, 2016
Commits on Mar 3, 2016
  1. Merge pull request #4 from aurelien-rainone/fix/fastboot-usb-win8+

    Fix problem with Fastboot and USB on Win8+
    asterix24 committed Mar 3, 2016
Commits on Jun 8, 2015
Commits on Nov 11, 2014
  1. The info dict could be empty.

    asterix24 committed Nov 11, 2014
  2. Possible fix of issue #3.

    asterix24 committed Nov 11, 2014
Commits on Mar 7, 2014
Commits on Mar 6, 2014
  1. Fixed serial port baud rate initialization.

    	signed-off-by: Mattia Barbon <mattia@develer.com>
    asterix24 committed Mar 6, 2014
  2. Fix for nightly test.

    asterix24 committed Mar 6, 2014
  3. Add support for kern logger.

    asterix24 committed Mar 6, 2014
  4. Add boot arch.

    asterix24 committed Mar 6, 2014
  5. Handle lwip debug without switching context (lwip debug disabled for …

    …now).
    
    	Signed-off-by: Francesco Sacchi <batt@develer.com>
    asterix24 committed Mar 6, 2014
  6. Remove lwip warnings.

        Signed-off-by: Gianni Valdambrini <aleister@develer.com>
    asterix24 committed Mar 6, 2014
  7. Typo.

    asterix24 committed Mar 6, 2014
  8. Add make opt flag.

    asterix24 committed Mar 6, 2014
  9. Fix board prj.

    asterix24 committed Mar 6, 2014
  10. Update cfg.

    asterix24 committed Mar 6, 2014
  11. Update cfg of all prj.

    asterix24 committed Mar 6, 2014
  12. Add arduino mega project.

    asterix24 committed Mar 6, 2014
  13. Add parenthesis to endianness macros.

    When using these macros with complex arguments, for example
    "1 << var", operator precedences problems and unintended effects
    may arise.
    
    Signed-off-by: Daniele Basile <asterix@develer.com>
    aleph6502 committed with asterix24 May 2, 2013
  14. Update doxyfile configuration.

    Signed-off-by: Daniele Basile <asterix@develer.com>
    asterix24 committed Apr 16, 2013
Commits on Mar 5, 2014
  1. Add module to wizard.

    asterix24 committed Mar 5, 2014
  2. Add ignore file.

    asterix24 committed Mar 5, 2014
  3. Trap error to prevent wizard craches.

    Signed-off-by: Daniele Basile <asterix@develer.com>
    asterix24 committed Mar 5, 2014