From 3d19706e761afb12f2e8cf185a40680bbcb27fc2 Mon Sep 17 00:00:00 2001 From: Daniel Kroening Date: Wed, 1 Oct 2025 03:18:17 -0700 Subject: [PATCH] Verilog: cleanout unused Boolean operators from type checker The Boolean ID_xor, ID_xnor, ID_nand, ID_nor are only ever generated as output by the Verilog type checker, and should never be inputs. This removes the case that handles them as inputs. --- src/verilog/verilog_typecheck_expr.cpp | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/src/verilog/verilog_typecheck_expr.cpp b/src/verilog/verilog_typecheck_expr.cpp index c56a14b5c..29a2917c9 100644 --- a/src/verilog/verilog_typecheck_expr.cpp +++ b/src/verilog/verilog_typecheck_expr.cpp @@ -3508,9 +3508,7 @@ exprt verilog_typecheck_exprt::convert_binary_expr(binary_exprt expr) return std::move(expr); } - else if( - expr.id() == ID_and || expr.id() == ID_or || expr.id() == ID_xor || - expr.id() == ID_xnor || expr.id() == ID_nand || expr.id() == ID_nor) + else if(expr.id() == ID_and || expr.id() == ID_or) { for(auto &op : expr.operands()) { @@ -3524,6 +3522,13 @@ exprt verilog_typecheck_exprt::convert_binary_expr(binary_exprt expr) return std::move(expr); } + else if( + expr.id() == ID_xor || expr.id() == ID_xnor || expr.id() == ID_nand || + expr.id() == ID_nor) + { + // should not occur -- only generated by the typechecker + PRECONDITION(false); + } else if(expr.id() == ID_verilog_value_range) { for(auto &op : expr.operands())