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DAC in test mode

Mitsutaka Okazaki edited this page Jan 2, 2020 · 34 revisions

From conclusion, there is no standalone 4-bit DAC circuit. There is a way to realize 7.5-bit DAC by using the normal channel with setting carefully test mode, frequency and voice registers.

Note

A 4-bit DAC rumor

There was a rumor that YM2413 has 4-bit DAC test mode: The higher 4-bits of F-Number(L) register (R#16) behaves 4-bit DAC if some bits on test register (R#15) are on.

The Clubguide Magazine #3, which was referred as the fact of 4-bit DAC mode, uses the following steps to stream 4-bit PCM data (Thanks Laurens for detailed information).

  • Write 255 to R#15
  • Write 255 to R#48
  • Write 255 to R#32
  • Then send PCM (data AND F0H) to R#16

The following sample was recorded from real YM2413 chip by using the method above.

However, this does not mean that there is a standalone 4-bit DAC circuit. In this case, higher 4-bits of R#16 coincidentally behaves like 4-bit DAC.

Why R#16 behaves as a DAC?

The notatable point is that the TEST register (R#15) bit 2 is set in the case above. According to YM2413 TEST register section of this document, if bit 2 is set, the phase generator offset will resets to 0 every YM2413 slot cycle. The phase counter value will be fixed to the phase increment value which derived from f-number, block and and multiple level of instrument.

The phase counter is 19-bit length and the higher 10-bits are used as a lookup index of sine ROM table. This means that, when the bit 2 of R#15 is set, we can lookup desired index of sine table by setting frequency registers (0x1n, 0x2n). Thus the desired DAC output can be obtained.

Note that in the above case, 255 is written to R#48. This selects Electric Guitar(15) instrument and set minimum volume to the channel. Electric Guitar tone does not follow pure sine. Thus the resulting output of writing R#16 might be a borken apporoximately DAC-like something.

We also need to pay attention that R#15 bit 0 is also set. This disables the envelope generator and its output will be forced to zero (max volume). This is the reason why DAC output is not muted even minimum volume is set to the channel. Actually, it is no need to set bit 0 if we keep envelope output maximum in another way, for example, set sustainable tone by using user-defined envelope.

Realize 7.5bit DAC in test mode

We can realize a DAC in better way by setting pure-sine user voice to the channel. The original idea came from Laurens's tweet.

  • Set pure sine, ML=4, sustainable tone as user voice
    • Write 0x00, 0x24, 0x3f, 0x00, 0x00, 0xf0, 0x0f, 0x0f to R#0-7
  • Write 0x04 to R#15 (Set bit 2 to 1)
  • Write 0x00 to R#48 (Select user-defined voice and max volume)
  • Write 0x1e to R#32 (Key-on and set BLK=7 and F-Number(H)=0)

ML=4 and block=7 are important. Because of these, F-Number register is mapped in the 19-bit phase counter as following. Thus we can index the first quarter of sine table directly by writing F-Number(L) register.

To stream PCM, write PCM2IDX[data] to R#16 where data is 8-bit unsigned PCM data and PCM2IDX is a conversion table from a linear PCM value to a ROM sine table index. The author tested with the following table which contains 201 output levels for 256 input range (approximately 7.65-bit PCM).

unsinged char PCM2IDX[256]={
 0, 0, 1, 1, 2, 3, 3, 4, 5, 5, 6, 7, 7, 8, 8, 9, 
10, 10, 11, 12, 12, 13, 14, 14, 15, 15, 16, 17, 17, 18, 19, 19, 
20, 21, 21, 22, 22, 23, 24, 24, 25, 26, 26, 27, 28, 28, 29, 30, 
30, 31, 32, 32, 33, 33, 34, 35, 35, 36, 37, 37, 38, 39, 39, 40, 
41, 41, 42, 43, 43, 44, 45, 45, 46, 47, 47, 48, 49, 49, 50, 51, 
51, 52, 53, 53, 54, 55, 55, 56, 57, 57, 58, 59, 59, 60, 61, 61, 
62, 63, 64, 64, 65, 66, 66, 67, 68, 68, 69, 70, 70, 71, 72, 73, 
73, 74, 75, 75, 76, 77, 78, 78, 79, 80, 80, 81, 82, 83, 83, 84, 
85, 86, 86, 87, 88, 89, 89, 90, 91, 92, 92, 93, 94, 95, 95, 96, 
97, 98, 98, 99, 100, 101, 102, 102, 103, 104, 105, 105, 106, 107, 108, 109, 
110, 110, 111, 112, 113, 114, 114, 115, 116, 117, 118, 119, 120, 120, 121, 122, 
123, 124, 125, 126, 127, 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 
138, 139, 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 
154, 155, 156, 157, 159, 160, 161, 162, 163, 164, 166, 167, 168, 169, 171, 172, 
173, 174, 176, 177, 179, 180, 181, 183, 184, 186, 187, 189, 191, 192, 194, 196, 
198, 199, 201, 203, 205, 208, 210, 212, 215, 217, 220, 223, 227, 231, 235, 241 }

Updated: more sophisticated table has been calcurated by Laurens. See the 15.7KHz playback demo on real chip and this thread for detail.

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