Summer design of course "digital current" in 2012 at Tsinghua University. Copyright (c) 2012, MU Tong, LI Ziyi, SUN Zelei.
Verilog Assembly Python
Fetching latest commit…
Cannot retrieve the latest commit at this time.
Failed to load latest commit information.
alu
asmblr
development
multicycle
peripheral
sample
single-cycle
.gitattributes
.gitignore
Makefile
README.md

README.md

DCE12MISP

Summer design of course "digital current" in 2012 at Tsinghua University.

Copyright (c) 2012, MU Tong, LI Ziyi, SUN Zelei.