fix Issue 17215 - ICE(cgcod.c:findreg) with SIMD and -O -inline

- caused by assigning 2*REGSIZE XMM vectors partially - only triggers since SROA sees this 8 bytes access
dlang · Feb 24, 2017 · 46d1948 · 46d1948
1 parent 0f4ce2f
commit 46d1948
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Showing 2 changed files with 10 additions and 1 deletion.
diff --git a/src/backend/cgelem.c b/src/backend/cgelem.c
@@ -3511,7 +3511,7 @@ STATIC elem * eleq(elem *e, goal_t goal)
             e1->Eoper == OPvar &&
             e2->Eoper == OPvar &&
             goal == GOALnone &&
-            !tyfloating(e1->Ety)
+            !tyfloating(e1->Ety) && !tyvector(e1->Ety)
            )
         {
             tym_t ty = (REGSIZE == 8) ? TYllong : TYint;

diff --git a/test/compilable/test17215.d b/test/compilable/test17215.d
@@ -0,0 +1,9 @@
+// REQUIRED_ARGS: -O
+version (X86_64):
+alias vec = __vector(int[4]);
+
+vec binop(vec a)
+{
+    vec b = a;
+    return b;
+}