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16-Byte atomicStore, atomicLoad and CAS added.
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16-Byte operations added for atomicStore, atomicLoad and CAS added to core.atomic.
Double-word cas operations were not present for 64 bit machines. (They were already present for 32-bit machines).
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adamsaka committed Jan 5, 2015
1 parent 24c7abf commit cf015be
Showing 1 changed file with 72 additions and 1 deletion.
73 changes: 72 additions & 1 deletion src/core/atomic.d
Original file line number Diff line number Diff line change
Expand Up @@ -20,16 +20,19 @@ version( D_InlineAsm_X86 )
version = AsmX86;
version = AsmX86_32;
enum has64BitCAS = true;
enum has128BitCAS = false;
}
else version( D_InlineAsm_X86_64 )
{
version = AsmX86;
version = AsmX86_64;
enum has64BitCAS = true;
enum has128BitCAS = true;
}
else
{
enum has64BitCAS = false;
enum has128BitCAS = false;
}

private
Expand Down Expand Up @@ -688,7 +691,7 @@ else version( AsmX86_64 )
}

bool cas(T,V1,V2)( shared(T)* here, const shared(V1)* ifThis, shared(V2)* writeThis ) nothrow
if( is(T U : U*) && __traits( compiles, { *here = writeThis; } ) )
if( is(T U : U*) && __traits( compliles, { *here = writeThis; } ) )
{
return casImpl(here, ifThis, writeThis);
}
Expand Down Expand Up @@ -769,6 +772,30 @@ else version( AsmX86_64 )
setz AL;
}
}
else static if( T.sizeof == long.sizeof*2 && has128BitCAS)
{
//////////////////////////////////////////////////////////////////
// 16 Byte CAS on a 64-Bit Processor
//////////////////////////////////////////////////////////////////

asm pure nothrow @nogc
{
push RDI;
push RBX;
lea RDI, writeThis;
mov RBX, [RDI];
mov RCX, 8[RDI];
lea RDI, ifThis;
mov RAX, [RDI];
mov RDX, 8[RDI];
mov RDI, here;
lock; // lock always needed to make this op atomic
cmpxchg16b [RDI];
setz AL;
pop RBX;
pop RDI;
}
}
else
{
static assert( false, "Invalid template type specified." );
Expand Down Expand Up @@ -929,6 +956,27 @@ else version( AsmX86_64 )
}
}
}
else static if( T.sizeof == long.sizeof*2 && has128BitCAS )
{
//////////////////////////////////////////////////////////////////
// 16 Byte Load on a 64-Bit Processor
//////////////////////////////////////////////////////////////////

asm pure nothrow @nogc
{
push RDI;
push RBX;
mov RBX, 0;
mov RCX, 0;
mov RAX, 0;
mov RDX, 0;
mov RDI, val;
lock; // lock always needed to make this op atomic
cmpxchg16b [RDI];
pop RBX;
pop RDI;
}
}
else
{
static assert( false, "Invalid template type specified." );
Expand Down Expand Up @@ -1043,6 +1091,29 @@ else version( AsmX86_64 )
}
}
}
else static if( T.sizeof == long.sizeof*2 && has128BitCAS )
{
//////////////////////////////////////////////////////////////////
// 16 Byte Store on a 64-Bit Processor
//////////////////////////////////////////////////////////////////

asm pure nothrow @nogc
{
push RDI;
push RBX;
lea RDI, newval;
mov RBX, [RDI];
mov RCX, 8[RDI];
mov RDI, val;
mov RAX, [RDI];
mov RDX, 8[RDI];
L1: lock; // lock always needed to make this op atomic
cmpxchg16b [RDI];
jne L1;
pop RBX;
pop RDI;
}
}
else
{
static assert( false, "Invalid template type specified." );
Expand Down

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